drivers/cfi_flash.c

   1 /*
   2  * (C) Copyright 2002-2004
   3  * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
   4  *
   5  * Copyright (C) 2003 Arabella Software Ltd.
   6  * Yuli Barcohen <yuli@arabellasw.com>
   7  *
   8  * Copyright (C) 2004
   9  * Ed Okerson
  10  *
  11  * Copyright (C) 2006
  12  * Tolunay Orkun <listmember@orkun.us>
  13  *
  14  * See file CREDITS for list of people who contributed to this
  15  * project.
  16  *
  17  * This program is free software; you can redistribute it and/or
  18  * modify it under the terms of the GNU General Public License as
  19  * published by the Free Software Foundation; either version 2 of
  20  * the License, or (at your option) any later version.
  21  *
  22  * This program is distributed in the hope that it will be useful,
  23  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  24  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  25  * GNU General Public License for more details.
  26  *
  27  * You should have received a copy of the GNU General Public License
  28  * along with this program; if not, write to the Free Software
  29  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  30  * MA 02111-1307 USA
  31  *
  32  */
  33
  34 /* The DEBUG define must be before common to enable debugging */
  35 /* #define DEBUG        */
  36
  37 #include <common.h>
  38 #include <asm/processor.h>
  39 #include <asm/byteorder.h>
  40 #include <environment.h>
  41 #ifdef  CFG_FLASH_CFI_DRIVER
  42
  43 /*
  44  * This file implements a Common Flash Interface (CFI) driver for U-Boot.
  45  * The width of the port and the width of the chips are determined at initialization.
  46  * These widths are used to calculate the address for access CFI data structures.
  47  *
  48  * References
  49  * JEDEC Standard JESD68 - Common Flash Interface (CFI)
  50  * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
  51  * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
  52  * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
  53  * AMD CFI Specification, Release 2.0 December 1, 2001
  54  * AMD/Spansion Application Note: Migration from Single-byte to Three-byte
  55  *   Device IDs, Publication Number 25538 Revision A, November 8, 2001
  56  *
  57  * define CFG_WRITE_SWAPPED_DATA, if you have to swap the Bytes between
  58  * reading and writing ... (yes there is such a Hardware).
  59  */
  60
  61 #ifndef CFG_FLASH_BANKS_LIST
  62 #define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
  63 #endif
  64
  65 #define FLASH_CMD_CFI                   0x98
  66 #define FLASH_CMD_READ_ID               0x90
  67 #define FLASH_CMD_RESET                 0xff
  68 #define FLASH_CMD_BLOCK_ERASE           0x20
  69 #define FLASH_CMD_ERASE_CONFIRM         0xD0
  70 #define FLASH_CMD_WRITE                 0x40
  71 #define FLASH_CMD_PROTECT               0x60
  72 #define FLASH_CMD_PROTECT_SET           0x01
  73 #define FLASH_CMD_PROTECT_CLEAR         0xD0
  74 #define FLASH_CMD_CLEAR_STATUS          0x50
  75 #define FLASH_CMD_WRITE_TO_BUFFER       0xE8
  76 #define FLASH_CMD_WRITE_BUFFER_CONFIRM  0xD0
  77
  78 #define FLASH_STATUS_DONE               0x80
  79 #define FLASH_STATUS_ESS                0x40
  80 #define FLASH_STATUS_ECLBS              0x20
  81 #define FLASH_STATUS_PSLBS              0x10
  82 #define FLASH_STATUS_VPENS              0x08
  83 #define FLASH_STATUS_PSS                0x04
  84 #define FLASH_STATUS_DPS                0x02
  85 #define FLASH_STATUS_R                  0x01
  86 #define FLASH_STATUS_PROTECT            0x01
  87
  88 #define AMD_CMD_RESET                   0xF0
  89 #define AMD_CMD_WRITE                   0xA0
  90 #define AMD_CMD_ERASE_START             0x80
  91 #define AMD_CMD_ERASE_SECTOR            0x30
  92 #define AMD_CMD_UNLOCK_START            0xAA
  93 #define AMD_CMD_UNLOCK_ACK              0x55
  94 #define AMD_CMD_WRITE_TO_BUFFER         0x25
  95 #define AMD_CMD_WRITE_BUFFER_CONFIRM    0x29
  96
  97 #define AMD_STATUS_TOGGLE               0x40
  98 #define AMD_STATUS_ERROR                0x20
  99
 100 #define AMD_ADDR_ERASE_START    ((info->portwidth == FLASH_CFI_8BIT) ? 0xAAA : 0x555)
 101 #define AMD_ADDR_START          ((info->portwidth == FLASH_CFI_8BIT) ? 0xAAA : 0x555)
 102 #define AMD_ADDR_ACK            ((info->portwidth == FLASH_CFI_8BIT) ? 0x555 : 0x2AA)
 103
 104 #define FLASH_OFFSET_MANUFACTURER_ID    0x00
 105 #define FLASH_OFFSET_DEVICE_ID          0x01
 106 #define FLASH_OFFSET_DEVICE_ID2         0x0E
 107 #define FLASH_OFFSET_DEVICE_ID3         0x0F
 108 #define FLASH_OFFSET_CFI                0x55
 109 #define FLASH_OFFSET_CFI_ALT            0x555
 110 #define FLASH_OFFSET_CFI_RESP           0x10
 111 #define FLASH_OFFSET_PRIMARY_VENDOR     0x13
 112 #define FLASH_OFFSET_EXT_QUERY_T_P_ADDR 0x15    /* extended query table primary addr */
 113 #define FLASH_OFFSET_WTOUT              0x1F
 114 #define FLASH_OFFSET_WBTOUT             0x20
 115 #define FLASH_OFFSET_ETOUT              0x21
 116 #define FLASH_OFFSET_CETOUT             0x22
 117 #define FLASH_OFFSET_WMAX_TOUT          0x23
 118 #define FLASH_OFFSET_WBMAX_TOUT         0x24
 119 #define FLASH_OFFSET_EMAX_TOUT          0x25
 120 #define FLASH_OFFSET_CEMAX_TOUT         0x26
 121 #define FLASH_OFFSET_SIZE               0x27
 122 #define FLASH_OFFSET_INTERFACE          0x28
 123 #define FLASH_OFFSET_BUFFER_SIZE        0x2A
 124 #define FLASH_OFFSET_NUM_ERASE_REGIONS  0x2C
 125 #define FLASH_OFFSET_ERASE_REGIONS      0x2D
 126 #define FLASH_OFFSET_PROTECT            0x02
 127 #define FLASH_OFFSET_USER_PROTECTION    0x85
 128 #define FLASH_OFFSET_INTEL_PROTECTION   0x81
 129
 130 #define CFI_CMDSET_NONE                 0
 131 #define CFI_CMDSET_INTEL_EXTENDED       1
 132 #define CFI_CMDSET_AMD_STANDARD         2
 133 #define CFI_CMDSET_INTEL_STANDARD       3
 134 #define CFI_CMDSET_AMD_EXTENDED         4
 135 #define CFI_CMDSET_MITSU_STANDARD       256
 136 #define CFI_CMDSET_MITSU_EXTENDED       257
 137 #define CFI_CMDSET_SST                  258
 138
 139 #ifdef CFG_FLASH_CFI_AMD_RESET /* needed for STM_ID_29W320DB on UC100 */
 140 # undef  FLASH_CMD_RESET
 141 # define FLASH_CMD_RESET        AMD_CMD_RESET /* use AMD-Reset instead */
 142 #endif
 143
 144 typedef union {
 145         unsigned char c;
 146         unsigned short w;
 147         unsigned long l;
 148         unsigned long long ll;
 149 } cfiword_t;
 150
 151 typedef union {
 152         volatile unsigned char *cp;
 153         volatile unsigned short *wp;
 154         volatile unsigned long *lp;
 155         volatile unsigned long long *llp;
 156 } cfiptr_t;
 157
 158 #define NUM_ERASE_REGIONS       4 /* max. number of erase regions */
 159
 160 static uint flash_offset_cfi[2]={FLASH_OFFSET_CFI,FLASH_OFFSET_CFI_ALT};
 161
 162 /* use CFG_MAX_FLASH_BANKS_DETECT if defined */
 163 #ifdef CFG_MAX_FLASH_BANKS_DETECT
 164 static ulong bank_base[CFG_MAX_FLASH_BANKS_DETECT] = CFG_FLASH_BANKS_LIST;
 165 flash_info_t flash_info[CFG_MAX_FLASH_BANKS_DETECT];    /* FLASH chips info */
 166 #else
 167 static ulong bank_base[CFG_MAX_FLASH_BANKS] = CFG_FLASH_BANKS_LIST;
 168 flash_info_t flash_info[CFG_MAX_FLASH_BANKS];           /* FLASH chips info */
 169 #endif
 170
 171 /*
 172  * Check if chip width is defined. If not, start detecting with 8bit.
 173  */
 174 #ifndef CFG_FLASH_CFI_WIDTH
 175 #define CFG_FLASH_CFI_WIDTH     FLASH_CFI_8BIT
 176 #endif
 177
 178
 179 /*-----------------------------------------------------------------------
 180  * Functions
 181  */
 182
 183 typedef unsigned long flash_sect_t;
 184
 185 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c);
 186 static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf);
 187 static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
 188 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect);
 189 static int flash_isequal (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
 190 static int flash_isset (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
 191 static int flash_toggle (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
 192 static void flash_read_jedec_ids (flash_info_t * info);
 193 static int flash_detect_cfi (flash_info_t * info);
 194 static int flash_write_cfiword (flash_info_t * info, ulong dest, cfiword_t cword);
 195 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
 196                                     ulong tout, char *prompt);
 197 ulong flash_get_size (ulong base, int banknum);
 198 #if defined(CFG_ENV_IS_IN_FLASH) || defined(CFG_ENV_ADDR_REDUND) || (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
 199 static flash_info_t *flash_get_info(ulong base);
 200 #endif
 201 #ifdef CFG_FLASH_USE_BUFFER_WRITE
 202 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp, int len);
 203 #endif
 204
 205 /*-----------------------------------------------------------------------
 206  * create an address based on the offset and the port width
 207  */
 208 inline uchar *flash_make_addr (flash_info_t * info, flash_sect_t sect, uint offset)
 209 {
 210         return ((uchar *) (info->start[sect] + (offset * info->portwidth)));
 211 }
 212
 213 #ifdef DEBUG
 214 /*-----------------------------------------------------------------------
 215  * Debug support
 216  */
 217 void print_longlong (char *str, unsigned long long data)
 218 {
 219         int i;
 220         char *cp;
 221
 222         cp = (unsigned char *) &data;
 223         for (i = 0; i < 8; i++)
 224                 sprintf (&str[i * 2], "%2.2x", *cp++);
 225 }
 226 static void flash_printqry (flash_info_t * info, flash_sect_t sect)
 227 {
 228         cfiptr_t cptr;
 229         int x, y;
 230
 231         for (x = 0; x < 0x40; x += 16U / info->portwidth) {
 232                 cptr.cp =
 233                         flash_make_addr (info, sect,
 234                                          x + FLASH_OFFSET_CFI_RESP);
 235                 debug ("%p : ", cptr.cp);
 236                 for (y = 0; y < 16; y++) {
 237                         debug ("%2.2x ", cptr.cp[y]);
 238                 }
 239                 debug (" ");
 240                 for (y = 0; y < 16; y++) {
 241                         if (cptr.cp[y] >= 0x20 && cptr.cp[y] <= 0x7e) {
 242                                 debug ("%c", cptr.cp[y]);
 243                         } else {
 244                                 debug (".");
 245                         }
 246                 }
 247                 debug ("\n");
 248         }
 249 }
 250 #endif
 251
 252
 253 /*-----------------------------------------------------------------------
 254  * read a character at a port width address
 255  */
 256 inline uchar flash_read_uchar (flash_info_t * info, uint offset)
 257 {
 258         uchar *cp;
 259
 260         cp = flash_make_addr (info, 0, offset);
 261 #if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA)
 262         return (cp[0]);
 263 #else
 264         return (cp[info->portwidth - 1]);
 265 #endif
 266 }
 267
 268 /*-----------------------------------------------------------------------
 269  * read a short word by swapping for ppc format.
 270  */
 271 ushort flash_read_ushort (flash_info_t * info, flash_sect_t sect, uint offset)
 272 {
 273         uchar *addr;
 274         ushort retval;
 275
 276 #ifdef DEBUG
 277         int x;
 278 #endif
 279         addr = flash_make_addr (info, sect, offset);
 280
 281 #ifdef DEBUG
 282         debug ("ushort addr is at %p info->portwidth = %d\n", addr,
 283                info->portwidth);
 284         for (x = 0; x < 2 * info->portwidth; x++) {
 285                 debug ("addr[%x] = 0x%x\n", x, addr[x]);
 286         }
 287 #endif
 288 #if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA)
 289         retval = ((addr[(info->portwidth)] << 8) | addr[0]);
 290 #else
 291         retval = ((addr[(2 * info->portwidth) - 1] << 8) |
 292                   addr[info->portwidth - 1]);
 293 #endif
 294
 295         debug ("retval = 0x%x\n", retval);
 296         return retval;
 297 }
 298
 299 /*-----------------------------------------------------------------------
 300  * read a long word by picking the least significant byte of each maximum
 301  * port size word. Swap for ppc format.
 302  */
 303 ulong flash_read_long (flash_info_t * info, flash_sect_t sect, uint offset)
 304 {
 305         uchar *addr;
 306         ulong retval;
 307
 308 #ifdef DEBUG
 309         int x;
 310 #endif
 311         addr = flash_make_addr (info, sect, offset);
 312
 313 #ifdef DEBUG
 314         debug ("long addr is at %p info->portwidth = %d\n", addr,
 315                info->portwidth);
 316         for (x = 0; x < 4 * info->portwidth; x++) {
 317                 debug ("addr[%x] = 0x%x\n", x, addr[x]);
 318         }
 319 #endif
 320 #if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA)
 321         retval = (addr[0] << 16) | (addr[(info->portwidth)] << 24) |
 322                 (addr[(2 * info->portwidth)]) | (addr[(3 * info->portwidth)] << 8);
 323 #else
 324         retval = (addr[(2 * info->portwidth) - 1] << 24) |
 325                 (addr[(info->portwidth) - 1] << 16) |
 326                 (addr[(4 * info->portwidth) - 1] << 8) |
 327                 addr[(3 * info->portwidth) - 1];
 328 #endif
 329         return retval;
 330 }
 331
 332
 333 /*-----------------------------------------------------------------------
 334  */
 335 unsigned long flash_init (void)
 336 {
 337         unsigned long size = 0;
 338         int i;
 339
 340 #ifdef CFG_FLASH_PROTECTION
 341         char *s = getenv("unlock");
 342 #endif
 343
 344         /* Init: no FLASHes known */
 345         for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
 346                 flash_info[i].flash_id = FLASH_UNKNOWN;
 347                 size += flash_info[i].size = flash_get_size (bank_base[i], i);
 348                 if (flash_info[i].flash_id == FLASH_UNKNOWN) {
 349 #ifndef CFG_FLASH_QUIET_TEST
 350                         printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n",
 351                                 i+1, flash_info[i].size, flash_info[i].size << 20);
 352 #endif /* CFG_FLASH_QUIET_TEST */
 353                 }
 354 #ifdef CFG_FLASH_PROTECTION
 355                 else if ((s != NULL) && (strcmp(s, "yes") == 0)) {
 356                         /*
 357                          * Only the U-Boot image and it's environment is protected,
 358                          * all other sectors are unprotected (unlocked) if flash
 359                          * hardware protection is used (CFG_FLASH_PROTECTION) and
 360                          * the environment variable "unlock" is set to "yes".
 361                          */
 362                         if (flash_info[i].legacy_unlock) {
 363                                 int k;
 364
 365                                 /*
 366                                  * Disable legacy_unlock temporarily, since
 367                                  * flash_real_protect would relock all other sectors
 368                                  * again otherwise.
 369                                  */
 370                                 flash_info[i].legacy_unlock = 0;
 371
 372                                 /*
 373                                  * Legacy unlocking (e.g. Intel J3) -> unlock only one
 374                                  * sector. This will unlock all sectors.
 375                                  */
 376                                 flash_real_protect (&flash_info[i], 0, 0);
 377
 378                                 flash_info[i].legacy_unlock = 1;
 379
 380                                 /*
 381                                  * Manually mark other sectors as unlocked (unprotected)
 382                                  */
 383                                 for (k = 1; k < flash_info[i].sector_count; k++)
 384                                         flash_info[i].protect[k] = 0;
 385                         } else {
 386                                 /*
 387                                  * No legancy unlocking -> unlock all sectors
 388                                  */
 389                                 flash_protect (FLAG_PROTECT_CLEAR,
 390                                                flash_info[i].start[0],
 391                                                flash_info[i].start[0] + flash_info[i].size - 1,
 392                                                &flash_info[i]);
 393                         }
 394                 }
 395 #endif /* CFG_FLASH_PROTECTION */
 396         }
 397
 398         /* Monitor protection ON by default */
 399 #if (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
 400         flash_protect (FLAG_PROTECT_SET,
 401                        CFG_MONITOR_BASE,
 402                        CFG_MONITOR_BASE + monitor_flash_len  - 1,
 403                        flash_get_info(CFG_MONITOR_BASE));
 404 #endif
 405
 406         /* Environment protection ON by default */
 407 #ifdef CFG_ENV_IS_IN_FLASH
 408         flash_protect (FLAG_PROTECT_SET,
 409                        CFG_ENV_ADDR,
 410                        CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1,
 411                        flash_get_info(CFG_ENV_ADDR));
 412 #endif
 413
 414         /* Redundant environment protection ON by default */
 415 #ifdef CFG_ENV_ADDR_REDUND
 416         flash_protect (FLAG_PROTECT_SET,
 417                        CFG_ENV_ADDR_REDUND,
 418                        CFG_ENV_ADDR_REDUND + CFG_ENV_SIZE_REDUND - 1,
 419                        flash_get_info(CFG_ENV_ADDR_REDUND));
 420 #endif
 421         return (size);
 422 }
 423
 424 /*-----------------------------------------------------------------------
 425  */
 426 #if defined(CFG_ENV_IS_IN_FLASH) || defined(CFG_ENV_ADDR_REDUND) || (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
 427 static flash_info_t *flash_get_info(ulong base)
 428 {
 429         int i;
 430         flash_info_t * info = 0;
 431
 432         for (i = 0; i < CFG_MAX_FLASH_BANKS; i ++) {
 433                 info = & flash_info[i];
 434                 if (info->size && info->start[0] <= base &&
 435                     base <= info->start[0] + info->size - 1)
 436                         break;
 437         }
 438
 439         return i == CFG_MAX_FLASH_BANKS ? 0 : info;
 440 }
 441 #endif
 442
 443 /*-----------------------------------------------------------------------
 444  */
 445 int flash_erase (flash_info_t * info, int s_first, int s_last)
 446 {
 447         int rcode = 0;
 448         int prot;
 449         flash_sect_t sect;
 450
 451         if (info->flash_id != FLASH_MAN_CFI) {
 452                 puts ("Can't erase unknown flash type - aborted\n");
 453                 return 1;
 454         }
 455         if ((s_first < 0) || (s_first > s_last)) {
 456                 puts ("- no sectors to erase\n");
 457                 return 1;
 458         }
 459
 460         prot = 0;
 461         for (sect = s_first; sect <= s_last; ++sect) {
 462                 if (info->protect[sect]) {
 463                         prot++;
 464                 }
 465         }
 466         if (prot) {
 467                 printf ("- Warning: %d protected sectors will not be erased!\n", prot);
 468         } else {
 469                 putc ('\n');
 470         }
 471
 472
 473         for (sect = s_first; sect <= s_last; sect++) {
 474                 if (info->protect[sect] == 0) { /* not protected */
 475                         switch (info->vendor) {
 476                         case CFI_CMDSET_INTEL_STANDARD:
 477                         case CFI_CMDSET_INTEL_EXTENDED:
 478                                 flash_write_cmd (info, sect, 0, FLASH_CMD_CLEAR_STATUS);
 479                                 flash_write_cmd (info, sect, 0, FLASH_CMD_BLOCK_ERASE);
 480                                 flash_write_cmd (info, sect, 0, FLASH_CMD_ERASE_CONFIRM);
 481                                 break;
 482                         case CFI_CMDSET_AMD_STANDARD:
 483                         case CFI_CMDSET_AMD_EXTENDED:
 484                                 flash_unlock_seq (info, sect);
 485                                 flash_write_cmd (info, sect, AMD_ADDR_ERASE_START,
 486                                                         AMD_CMD_ERASE_START);
 487                                 flash_unlock_seq (info, sect);
 488                                 flash_write_cmd (info, sect, 0, AMD_CMD_ERASE_SECTOR);
 489                                 break;
 490                         default:
 491                                 debug ("Unkown flash vendor %d\n",
 492                                        info->vendor);
 493                                 break;
 494                         }
 495
 496                         if (flash_full_status_check
 497                             (info, sect, info->erase_blk_tout, "erase")) {
 498                                 rcode = 1;
 499                         } else
 500                                 putc ('.');
 501                 }
 502         }
 503         puts (" done\n");
 504         return rcode;
 505 }
 506
 507 /*-----------------------------------------------------------------------
 508  */
 509 void flash_print_info (flash_info_t * info)
 510 {
 511         int i;
 512
 513         if (info->flash_id != FLASH_MAN_CFI) {
 514                 puts ("missing or unknown FLASH type\n");
 515                 return;
 516         }
 517
 518         printf ("CFI conformant FLASH (%d x %d)",
 519                 (info->portwidth << 3), (info->chipwidth << 3));
 520         printf ("  Size: %ld MB in %d Sectors\n",
 521                 info->size >> 20, info->sector_count);
 522         printf ("  ");
 523         switch (info->vendor) {
 524                 case CFI_CMDSET_INTEL_STANDARD:
 525                         printf ("Intel Standard");
 526                         break;
 527                 case CFI_CMDSET_INTEL_EXTENDED:
 528                         printf ("Intel Extended");
 529                         break;
 530                 case CFI_CMDSET_AMD_STANDARD:
 531                         printf ("AMD Standard");
 532                         break;
 533                 case CFI_CMDSET_AMD_EXTENDED:
 534                         printf ("AMD Extended");
 535                         break;
 536                 default:
 537                         printf ("Unknown (%d)", info->vendor);
 538                         break;
 539         }
 540         printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x%02X",
 541                 info->manufacturer_id, info->device_id);
 542         if (info->device_id == 0x7E) {
 543                 printf("%04X", info->device_id2);
 544         }
 545         printf ("\n  Erase timeout: %ld ms, write timeout: %ld ms\n",
 546                 info->erase_blk_tout,
 547                 info->write_tout);
 548         if (info->buffer_size > 1) {
 549                 printf ("  Buffer write timeout: %ld ms, buffer size: %d bytes\n",
 550                 info->buffer_write_tout,
 551                 info->buffer_size);
 552         }
 553
 554         puts ("\n  Sector Start Addresses:");
 555         for (i = 0; i < info->sector_count; ++i) {
 556                 if ((i % 5) == 0)
 557                         printf ("\n");
 558 #ifdef CFG_FLASH_EMPTY_INFO
 559                 int k;
 560                 int size;
 561                 int erased;
 562                 volatile unsigned long *flash;
 563
 564                 /*
 565                  * Check if whole sector is erased
 566                  */
 567                 if (i != (info->sector_count - 1))
 568                         size = info->start[i + 1] - info->start[i];
 569                 else
 570                         size = info->start[0] + info->size - info->start[i];
 571                 erased = 1;
 572                 flash = (volatile unsigned long *) info->start[i];
 573                 size = size >> 2;       /* divide by 4 for longword access */
 574                 for (k = 0; k < size; k++) {
 575                         if (*flash++ != 0xffffffff) {
 576                                 erased = 0;
 577                                 break;
 578                         }
 579                 }
 580
 581                 /* print empty and read-only info */
 582                 printf ("  %08lX %c %s ",
 583                         info->start[i],
 584                         erased ? 'E' : ' ',
 585                         info->protect[i] ? "RO" : "  ");
 586 #else   /* ! CFG_FLASH_EMPTY_INFO */
 587                 printf ("  %08lX   %s ",
 588                         info->start[i],
 589                         info->protect[i] ? "RO" : "  ");
 590 #endif
 591         }
 592         putc ('\n');
 593         return;
 594 }
 595
 596 /*-----------------------------------------------------------------------
 597  * Copy memory to flash, returns:
 598  * 0 - OK
 599  * 1 - write timeout
 600  * 2 - Flash not erased
 601  */
 602 int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
 603 {
 604         ulong wp;
 605         ulong cp;
 606         int aln;
 607         cfiword_t cword;
 608         int i, rc;
 609
 610 #ifdef CFG_FLASH_USE_BUFFER_WRITE
 611         int buffered_size;
 612 #endif
 613         /* get lower aligned address */
 614         /* get lower aligned address */
 615         wp = (addr & ~(info->portwidth - 1));
 616
 617         /* handle unaligned start */
 618         if ((aln = addr - wp) != 0) {
 619                 cword.l = 0;
 620                 cp = wp;
 621                 for (i = 0; i < aln; ++i, ++cp)
 622                         flash_add_byte (info, &cword, (*(uchar *) cp));
 623
 624                 for (; (i < info->portwidth) && (cnt > 0); i++) {
 625                         flash_add_byte (info, &cword, *src++);
 626                         cnt--;
 627                         cp++;
 628                 }
 629                 for (; (cnt == 0) && (i < info->portwidth); ++i, ++cp)
 630                         flash_add_byte (info, &cword, (*(uchar *) cp));
 631                 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
 632                         return rc;
 633                 wp = cp;
 634         }
 635
 636         /* handle the aligned part */
 637 #ifdef CFG_FLASH_USE_BUFFER_WRITE
 638         buffered_size = (info->portwidth / info->chipwidth);
 639         buffered_size *= info->buffer_size;
 640         while (cnt >= info->portwidth) {
 641                 /* prohibit buffer write when buffer_size is 1 */
 642                 if (info->buffer_size == 1) {
 643                         cword.l = 0;
 644                         for (i = 0; i < info->portwidth; i++)
 645                                 flash_add_byte (info, &cword, *src++);
 646                         if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
 647                                 return rc;
 648                         wp += info->portwidth;
 649                         cnt -= info->portwidth;
 650                         continue;
 651                 }
 652
 653                 /* write buffer until next buffered_size aligned boundary */
 654                 i = buffered_size - (wp % buffered_size);
 655                 if (i > cnt)
 656                         i = cnt;
 657                 if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
 658                         return rc;
 659                 i -= i & (info->portwidth - 1);
 660                 wp += i;
 661                 src += i;
 662                 cnt -= i;
 663         }
 664 #else
 665         while (cnt >= info->portwidth) {
 666                 cword.l = 0;
 667                 for (i = 0; i < info->portwidth; i++) {
 668                         flash_add_byte (info, &cword, *src++);
 669                 }
 670                 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
 671                         return rc;
 672                 wp += info->portwidth;
 673                 cnt -= info->portwidth;
 674         }
 675 #endif /* CFG_FLASH_USE_BUFFER_WRITE */
 676         if (cnt == 0) {
 677                 return (0);
 678         }
 679
 680         /*
 681          * handle unaligned tail bytes
 682          */
 683         cword.l = 0;
 684         for (i = 0, cp = wp; (i < info->portwidth) && (cnt > 0); ++i, ++cp) {
 685                 flash_add_byte (info, &cword, *src++);
 686                 --cnt;
 687         }
 688         for (; i < info->portwidth; ++i, ++cp) {
 689                 flash_add_byte (info, &cword, (*(uchar *) cp));
 690         }
 691
 692         return flash_write_cfiword (info, wp, cword);
 693 }
 694
 695 /*-----------------------------------------------------------------------
 696  */
 697 #ifdef CFG_FLASH_PROTECTION
 698
 699 int flash_real_protect (flash_info_t * info, long sector, int prot)
 700 {
 701         int retcode = 0;
 702
 703         flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
 704         flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
 705         if (prot)
 706                 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET);
 707         else
 708                 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
 709
 710         if ((retcode =
 711              flash_full_status_check (info, sector, info->erase_blk_tout,
 712                                       prot ? "protect" : "unprotect")) == 0) {
 713
 714                 info->protect[sector] = prot;
 715
 716                 /*
 717                  * On some of Intel's flash chips (marked via legacy_unlock)
 718                  * unprotect unprotects all locking.
 719                  */
 720                 if ((prot == 0) && (info->legacy_unlock)) {
 721                         flash_sect_t i;
 722
 723                         for (i = 0; i < info->sector_count; i++) {
 724                                 if (info->protect[i])
 725                                         flash_real_protect (info, i, 1);
 726                         }
 727                 }
 728         }
 729         return retcode;
 730 }
 731
 732 /*-----------------------------------------------------------------------
 733  * flash_read_user_serial - read the OneTimeProgramming cells
 734  */
 735 void flash_read_user_serial (flash_info_t * info, void *buffer, int offset,
 736                              int len)
 737 {
 738         uchar *src;
 739         uchar *dst;
 740
 741         dst = buffer;
 742         src = flash_make_addr (info, 0, FLASH_OFFSET_USER_PROTECTION);
 743         flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
 744         memcpy (dst, src + offset, len);
 745         flash_write_cmd (info, 0, 0, info->cmd_reset);
 746 }
 747
 748 /*
 749  * flash_read_factory_serial - read the device Id from the protection area
 750  */
 751 void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset,
 752                                 int len)
 753 {
 754         uchar *src;
 755
 756         src = flash_make_addr (info, 0, FLASH_OFFSET_INTEL_PROTECTION);
 757         flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
 758         memcpy (buffer, src + offset, len);
 759         flash_write_cmd (info, 0, 0, info->cmd_reset);
 760 }
 761
 762 #endif /* CFG_FLASH_PROTECTION */
 763
 764 /*
 765  * flash_is_busy - check to see if the flash is busy
 766  * This routine checks the status of the chip and returns true if the chip is busy
 767  */
 768 static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
 769 {
 770         int retval;
 771
 772         switch (info->vendor) {
 773         case CFI_CMDSET_INTEL_STANDARD:
 774         case CFI_CMDSET_INTEL_EXTENDED:
 775                 retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
 776                 break;
 777         case CFI_CMDSET_AMD_STANDARD:
 778         case CFI_CMDSET_AMD_EXTENDED:
 779                 retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE);
 780                 break;
 781         default:
 782                 retval = 0;
 783         }
 784         debug ("flash_is_busy: %d\n", retval);
 785         return retval;
 786 }
 787
 788 /*-----------------------------------------------------------------------
 789  *  wait for XSR.7 to be set. Time out with an error if it does not.
 790  *  This routine does not set the flash to read-array mode.
 791  */
 792 static int flash_status_check (flash_info_t * info, flash_sect_t sector,
 793                                ulong tout, char *prompt)
 794 {
 795         ulong start;
 796
 797 #if CFG_HZ != 1000
 798         tout *= CFG_HZ/1000;
 799 #endif
 800
 801         /* Wait for command completion */
 802         start = get_timer (0);
 803         while (flash_is_busy (info, sector)) {
 804                 if (get_timer (start) > tout) {
 805                         printf ("Flash %s timeout at address %lx data %lx\n",
 806                                 prompt, info->start[sector],
 807                                 flash_read_long (info, sector, 0));
 808                         flash_write_cmd (info, sector, 0, info->cmd_reset);
 809                         return ERR_TIMOUT;
 810                 }
 811                 udelay (1);             /* also triggers watchdog */
 812         }
 813         return ERR_OK;
 814 }
 815
 816 /*-----------------------------------------------------------------------
 817  * Wait for XSR.7 to be set, if it times out print an error, otherwise do a full status check.
 818  * This routine sets the flash to read-array mode.
 819  */
 820 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
 821                                     ulong tout, char *prompt)
 822 {
 823         int retcode;
 824
 825         retcode = flash_status_check (info, sector, tout, prompt);
 826         switch (info->vendor) {
 827         case CFI_CMDSET_INTEL_EXTENDED:
 828         case CFI_CMDSET_INTEL_STANDARD:
 829                 if ((retcode == ERR_OK)
 830                     && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
 831                         retcode = ERR_INVAL;
 832                         printf ("Flash %s error at address %lx\n", prompt,
 833                                 info->start[sector]);
 834                         if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS | FLASH_STATUS_PSLBS)) {
 835                                 puts ("Command Sequence Error.\n");
 836                         } else if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS)) {
 837                                 puts ("Block Erase Error.\n");
 838                                 retcode = ERR_NOT_ERASED;
 839                         } else if (flash_isset (info, sector, 0, FLASH_STATUS_PSLBS)) {
 840                                 puts ("Locking Error\n");
 841                         }
 842                         if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
 843                                 puts ("Block locked.\n");
 844                                 retcode = ERR_PROTECTED;
 845                         }
 846                         if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
 847                                 puts ("Vpp Low Error.\n");
 848                 }
 849                 flash_write_cmd (info, sector, 0, info->cmd_reset);
 850                 break;
 851         default:
 852                 break;
 853         }
 854         return retcode;
 855 }
 856
 857 /*-----------------------------------------------------------------------
 858  */
 859 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
 860 {
 861 #if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA)
 862         unsigned short  w;
 863         unsigned int    l;
 864         unsigned long long ll;
 865 #endif
 866
 867         switch (info->portwidth) {
 868         case FLASH_CFI_8BIT:
 869                 cword->c = c;
 870                 break;
 871         case FLASH_CFI_16BIT:
 872 #if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA)
 873                 w = c;
 874                 w <<= 8;
 875                 cword->w = (cword->w >> 8) | w;
 876 #else
 877                 cword->w = (cword->w << 8) | c;
 878 #endif
 879                 break;
 880         case FLASH_CFI_32BIT:
 881 #if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA)
 882                 l = c;
 883                 l <<= 24;
 884                 cword->l = (cword->l >> 8) | l;
 885 #else
 886                 cword->l = (cword->l << 8) | c;
 887 #endif
 888                 break;
 889         case FLASH_CFI_64BIT:
 890 #if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA)
 891                 ll = c;
 892                 ll <<= 56;
 893                 cword->ll = (cword->ll >> 8) | ll;
 894 #else
 895                 cword->ll = (cword->ll << 8) | c;
 896 #endif
 897                 break;
 898         }
 899 }
 900
 901
 902 /*-----------------------------------------------------------------------
 903  * make a proper sized command based on the port and chip widths
 904  */
 905 static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf)
 906 {
 907         int i;
 908         uchar *cp = (uchar *) cmdbuf;
 909
 910 #if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA)
 911         for (i = info->portwidth; i > 0; i--)
 912 #else
 913         for (i = 1; i <= info->portwidth; i++)
 914 #endif
 915                 *cp++ = (i & (info->chipwidth - 1)) ? '\0' : cmd;
 916 }
 917
 918 /*
 919  * Write a proper sized command to the correct address
 920  */
 921 static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
 922 {
 923
 924         volatile cfiptr_t addr;
 925         cfiword_t cword;
 926
 927         addr.cp = flash_make_addr (info, sect, offset);
 928         flash_make_cmd (info, cmd, &cword);
 929         switch (info->portwidth) {
 930         case FLASH_CFI_8BIT:
 931                 debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr.cp, cmd,
 932                        cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 933                 *addr.cp = cword.c;
 934 #ifdef CONFIG_BLACKFIN
 935                 asm("ssync;");
 936 #endif
 937                 break;
 938         case FLASH_CFI_16BIT:
 939                 debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr.wp,
 940                        cmd, cword.w,
 941                        info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 942                 *addr.wp = cword.w;
 943 #ifdef CONFIG_BLACKFIN
 944                 asm("ssync;");
 945 #endif
 946                 break;
 947         case FLASH_CFI_32BIT:
 948                 debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr.lp,
 949                        cmd, cword.l,
 950                        info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 951                 *addr.lp = cword.l;
 952 #ifdef CONFIG_BLACKFIN
 953                 asm("ssync;");
 954 #endif
 955                 break;
 956         case FLASH_CFI_64BIT:
 957 #ifdef DEBUG
 958                 {
 959                         char str[20];
 960
 961                         print_longlong (str, cword.ll);
 962
 963                         debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
 964                                addr.llp, cmd, str,
 965                                info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 966                 }
 967 #endif
 968                 *addr.llp = cword.ll;
 969 #ifdef CONFIG_BLACKFIN
 970                 asm("ssync;");
 971 #endif
 972                 break;
 973         }
 974 }
 975
 976 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
 977 {
 978         flash_write_cmd (info, sect, AMD_ADDR_START, AMD_CMD_UNLOCK_START);
 979         flash_write_cmd (info, sect, AMD_ADDR_ACK, AMD_CMD_UNLOCK_ACK);
 980 }
 981
 982 /*-----------------------------------------------------------------------
 983  */
 984 static int flash_isequal (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
 985 {
 986         cfiptr_t cptr;
 987         cfiword_t cword;
 988         int retval;
 989
 990         cptr.cp = flash_make_addr (info, sect, offset);
 991         flash_make_cmd (info, cmd, &cword);
 992
 993         debug ("is= cmd %x(%c) addr %p ", cmd, cmd, cptr.cp);
 994         switch (info->portwidth) {
 995         case FLASH_CFI_8BIT:
 996                 debug ("is= %x %x\n", cptr.cp[0], cword.c);
 997                 retval = (cptr.cp[0] == cword.c);
 998                 break;
 999         case FLASH_CFI_16BIT:
1000                 debug ("is= %4.4x %4.4x\n", cptr.wp[0], cword.w);
1001                 retval = (cptr.wp[0] == cword.w);
1002                 break;
1003         case FLASH_CFI_32BIT:
1004                 debug ("is= %8.8lx %8.8lx\n", cptr.lp[0], cword.l);
1005                 retval = (cptr.lp[0] == cword.l);
1006                 break;
1007         case FLASH_CFI_64BIT:
1008 #ifdef DEBUG
1009                 {
1010                         char str1[20];
1011                         char str2[20];
1012
1013                         print_longlong (str1, cptr.llp[0]);
1014                         print_longlong (str2, cword.ll);
1015                         debug ("is= %s %s\n", str1, str2);
1016                 }
1017 #endif
1018                 retval = (cptr.llp[0] == cword.ll);
1019                 break;
1020         default:
1021                 retval = 0;
1022                 break;
1023         }
1024         return retval;
1025 }
1026
1027 /*-----------------------------------------------------------------------
1028  */
1029 static int flash_isset (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
1030 {
1031         cfiptr_t cptr;
1032         cfiword_t cword;
1033         int retval;
1034
1035         cptr.cp = flash_make_addr (info, sect, offset);
1036         flash_make_cmd (info, cmd, &cword);
1037         switch (info->portwidth) {
1038         case FLASH_CFI_8BIT:
1039                 retval = ((cptr.cp[0] & cword.c) == cword.c);
1040                 break;
1041         case FLASH_CFI_16BIT:
1042                 retval = ((cptr.wp[0] & cword.w) == cword.w);
1043                 break;
1044         case FLASH_CFI_32BIT:
1045                 retval = ((cptr.lp[0] & cword.l) == cword.l);
1046                 break;
1047         case FLASH_CFI_64BIT:
1048                 retval = ((cptr.llp[0] & cword.ll) == cword.ll);
1049                 break;
1050         default:
1051                 retval = 0;
1052                 break;
1053         }
1054         return retval;
1055 }
1056
1057 /*-----------------------------------------------------------------------
1058  */
1059 static int flash_toggle (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
1060 {
1061         cfiptr_t cptr;
1062         cfiword_t cword;
1063         int retval;
1064
1065         cptr.cp = flash_make_addr (info, sect, offset);
1066         flash_make_cmd (info, cmd, &cword);
1067         switch (info->portwidth) {
1068         case FLASH_CFI_8BIT:
1069                 retval = ((cptr.cp[0] & cword.c) != (cptr.cp[0] & cword.c));
1070                 break;
1071         case FLASH_CFI_16BIT:
1072                 retval = ((cptr.wp[0] & cword.w) != (cptr.wp[0] & cword.w));
1073                 break;
1074         case FLASH_CFI_32BIT:
1075                 retval = ((cptr.lp[0] & cword.l) != (cptr.lp[0] & cword.l));
1076                 break;
1077         case FLASH_CFI_64BIT:
1078                 retval = ((cptr.llp[0] & cword.ll) !=
1079                           (cptr.llp[0] & cword.ll));
1080                 break;
1081         default:
1082                 retval = 0;
1083                 break;
1084         }
1085         return retval;
1086 }
1087
1088 /*-----------------------------------------------------------------------
1089  * read jedec ids from device and set corresponding fields in info struct
1090  *
1091  * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
1092  *
1093 */
1094 static void flash_read_jedec_ids (flash_info_t * info)
1095 {
1096         info->manufacturer_id = 0;
1097         info->device_id       = 0;
1098         info->device_id2      = 0;
1099
1100         switch (info->vendor) {
1101         case CFI_CMDSET_INTEL_STANDARD:
1102         case CFI_CMDSET_INTEL_EXTENDED:
1103                 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1104                 flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1105                 udelay(1000); /* some flash are slow to respond */
1106                 info->manufacturer_id = flash_read_uchar (info,
1107                                                 FLASH_OFFSET_MANUFACTURER_ID);
1108                 info->device_id = flash_read_uchar (info,
1109                                                 FLASH_OFFSET_DEVICE_ID);
1110                 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1111                 break;
1112         case CFI_CMDSET_AMD_STANDARD:
1113         case CFI_CMDSET_AMD_EXTENDED:
1114                 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1115                 flash_unlock_seq(info, 0);
1116                 flash_write_cmd(info, 0, AMD_ADDR_START, FLASH_CMD_READ_ID);
1117                 udelay(1000); /* some flash are slow to respond */
1118                 info->manufacturer_id = flash_read_uchar (info,
1119                                                 FLASH_OFFSET_MANUFACTURER_ID);
1120                 info->device_id = flash_read_uchar (info,
1121                                                 FLASH_OFFSET_DEVICE_ID);
1122                 if (info->device_id == 0x7E) {
1123                         /* AMD 3-byte (expanded) device ids */
1124                         info->device_id2 = flash_read_uchar (info,
1125                                                 FLASH_OFFSET_DEVICE_ID2);
1126                         info->device_id2 <<= 8;
1127                         info->device_id2 |= flash_read_uchar (info,
1128                                                 FLASH_OFFSET_DEVICE_ID3);
1129                 }
1130                 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1131                 break;
1132         default:
1133                 break;
1134         }
1135 }
1136
1137 /*-----------------------------------------------------------------------
1138  * detect if flash is compatible with the Common Flash Interface (CFI)
1139  * http://www.jedec.org/download/search/jesd68.pdf
1140  *
1141 */
1142 static int flash_detect_cfi (flash_info_t * info)
1143 {
1144         int cfi_offset;
1145         debug ("flash detect cfi\n");
1146
1147         for (info->portwidth = CFG_FLASH_CFI_WIDTH;
1148              info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
1149                 for (info->chipwidth = FLASH_CFI_BY8;
1150                      info->chipwidth <= info->portwidth;
1151                      info->chipwidth <<= 1) {
1152                         flash_write_cmd (info, 0, 0, info->cmd_reset);
1153                         for (cfi_offset=0; cfi_offset < sizeof(flash_offset_cfi)/sizeof(uint); cfi_offset++) {
1154                                 flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset], FLASH_CMD_CFI);
1155                                 if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
1156                                  && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
1157                                  && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
1158                                         info->interface = flash_read_ushort (info, 0, FLASH_OFFSET_INTERFACE);
1159                                         info->cfi_offset=flash_offset_cfi[cfi_offset];
1160                                         debug ("device interface is %d\n",
1161                                                 info->interface);
1162                                         debug ("found port %d chip %d ",
1163                                                 info->portwidth, info->chipwidth);
1164                                         debug ("port %d bits chip %d bits\n",
1165                                                 info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1166                                                 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1167                                         return 1;
1168                                 }
1169                         }
1170                 }
1171         }
1172         debug ("not found\n");
1173         return 0;
1174 }
1175
1176 /*
1177  * The following code cannot be run from FLASH!
1178  *
1179  */
1180 ulong flash_get_size (ulong base, int banknum)
1181 {
1182         flash_info_t *info = &flash_info[banknum];
1183         int i, j;
1184         flash_sect_t sect_cnt;
1185         unsigned long sector;
1186         unsigned long tmp;
1187         int size_ratio;
1188         uchar num_erase_regions;
1189         int erase_region_size;
1190         int erase_region_count;
1191         int geometry_reversed = 0;
1192
1193         info->ext_addr = 0;
1194         info->cfi_version = 0;
1195 #ifdef CFG_FLASH_PROTECTION
1196         info->legacy_unlock = 0;
1197 #endif
1198
1199         info->start[0] = base;
1200
1201         if (flash_detect_cfi (info)) {
1202                 info->vendor = flash_read_ushort (info, 0,
1203                                         FLASH_OFFSET_PRIMARY_VENDOR);
1204                 flash_read_jedec_ids (info);
1205                 flash_write_cmd (info, 0, info->cfi_offset, FLASH_CMD_CFI);
1206                 num_erase_regions = flash_read_uchar (info,
1207                                         FLASH_OFFSET_NUM_ERASE_REGIONS);
1208                 info->ext_addr = flash_read_ushort (info, 0,
1209                                         FLASH_OFFSET_EXT_QUERY_T_P_ADDR);
1210                 if (info->ext_addr) {
1211                         info->cfi_version = (ushort) flash_read_uchar (info,
1212                                                 info->ext_addr + 3) << 8;
1213                         info->cfi_version |= (ushort) flash_read_uchar (info,
1214                                                 info->ext_addr + 4);
1215                 }
1216 #ifdef DEBUG
1217                 flash_printqry (info, 0);
1218 #endif
1219                 switch (info->vendor) {
1220                 case CFI_CMDSET_INTEL_STANDARD:
1221                 case CFI_CMDSET_INTEL_EXTENDED:
1222                 default:
1223                         info->cmd_reset = FLASH_CMD_RESET;
1224 #ifdef CFG_FLASH_PROTECTION
1225                         /* read legacy lock/unlock bit from intel flash */
1226                         if (info->ext_addr) {
1227                                 info->legacy_unlock = flash_read_uchar (info,
1228                                                 info->ext_addr + 5) & 0x08;
1229                         }
1230 #endif
1231                         break;
1232                 case CFI_CMDSET_AMD_STANDARD:
1233                 case CFI_CMDSET_AMD_EXTENDED:
1234                         info->cmd_reset = AMD_CMD_RESET;
1235                         /* check if flash geometry needs reversal */
1236                         if (num_erase_regions <= 1)
1237                                 break;
1238                         /* reverse geometry if top boot part */
1239                         if (info->cfi_version < 0x3131) {
1240                                 /* CFI < 1.1, try to guess from device id */
1241                                 if ((info->device_id & 0x80) != 0) {
1242                                         geometry_reversed = 1;
1243                                 }
1244                                 break;
1245                         }
1246                         /* CFI >= 1.1, deduct from top/bottom flag */
1247                         /* note: ext_addr is valid since cfi_version > 0 */
1248                         if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
1249                                 geometry_reversed = 1;
1250                         }
1251                         break;
1252                 }
1253
1254                 debug ("manufacturer is %d\n", info->vendor);
1255                 debug ("manufacturer id is 0x%x\n", info->manufacturer_id);
1256                 debug ("device id is 0x%x\n", info->device_id);
1257                 debug ("device id2 is 0x%x\n", info->device_id2);
1258                 debug ("cfi version is 0x%04x\n", info->cfi_version);
1259
1260                 size_ratio = info->portwidth / info->chipwidth;
1261                 /* if the chip is x8/x16 reduce the ratio by half */
1262                 if ((info->interface == FLASH_CFI_X8X16)
1263                     && (info->chipwidth == FLASH_CFI_BY8)) {
1264                         size_ratio >>= 1;
1265                 }
1266                 debug ("size_ratio %d port %d bits chip %d bits\n",
1267                        size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1268                        info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1269                 debug ("found %d erase regions\n", num_erase_regions);
1270                 sect_cnt = 0;
1271                 sector = base;
1272                 for (i = 0; i < num_erase_regions; i++) {
1273                         if (i > NUM_ERASE_REGIONS) {
1274                                 printf ("%d erase regions found, only %d used\n",
1275                                         num_erase_regions, NUM_ERASE_REGIONS);
1276                                 break;
1277                         }
1278                         if (geometry_reversed)
1279                                 tmp = flash_read_long (info, 0,
1280                                                FLASH_OFFSET_ERASE_REGIONS +
1281                                                (num_erase_regions - 1 - i) * 4);
1282                         else
1283                                 tmp = flash_read_long (info, 0,
1284                                                FLASH_OFFSET_ERASE_REGIONS +
1285                                                i * 4);
1286                         erase_region_size =
1287                                 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
1288                         tmp >>= 16;
1289                         erase_region_count = (tmp & 0xffff) + 1;
1290                         debug ("erase_region_count = %d erase_region_size = %d\n",
1291                                 erase_region_count, erase_region_size);
1292                         for (j = 0; j < erase_region_count; j++) {
1293                                 info->start[sect_cnt] = sector;
1294                                 sector += (erase_region_size * size_ratio);
1295
1296                                 /*
1297                                  * Only read protection status from supported devices (intel...)
1298                                  */
1299                                 switch (info->vendor) {
1300                                 case CFI_CMDSET_INTEL_EXTENDED:
1301                                 case CFI_CMDSET_INTEL_STANDARD:
1302                                         info->protect[sect_cnt] =
1303                                                 flash_isset (info, sect_cnt,
1304                                                              FLASH_OFFSET_PROTECT,
1305                                                              FLASH_STATUS_PROTECT);
1306                                         break;
1307                                 default:
1308                                         info->protect[sect_cnt] = 0; /* default: not protected */
1309                                 }
1310
1311                                 sect_cnt++;
1312                         }
1313                 }
1314
1315                 info->sector_count = sect_cnt;
1316                 /* multiply the size by the number of chips */
1317                 info->size = (1 << flash_read_uchar (info, FLASH_OFFSET_SIZE)) * size_ratio;
1318                 info->buffer_size = (1 << flash_read_ushort (info, 0, FLASH_OFFSET_BUFFER_SIZE));
1319                 tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_ETOUT);
1320                 info->erase_blk_tout = (tmp * (1 << flash_read_uchar (info, FLASH_OFFSET_EMAX_TOUT)));
1321                 tmp = (1 << flash_read_uchar (info, FLASH_OFFSET_WBTOUT)) *
1322                         (1 << flash_read_uchar (info, FLASH_OFFSET_WBMAX_TOUT));
1323                 info->buffer_write_tout = tmp / 1000 + (tmp % 1000 ? 1 : 0); /* round up when converting to ms */
1324                 tmp = (1 << flash_read_uchar (info, FLASH_OFFSET_WTOUT)) *
1325                       (1 << flash_read_uchar (info, FLASH_OFFSET_WMAX_TOUT));
1326                 info->write_tout = tmp / 1000 + (tmp % 1000 ? 1 : 0); /* round up when converting to ms */
1327                 info->flash_id = FLASH_MAN_CFI;
1328                 if ((info->interface == FLASH_CFI_X8X16) && (info->chipwidth == FLASH_CFI_BY8)) {
1329                         info->portwidth >>= 1;  /* XXX - Need to test on x8/x16 in parallel. */
1330                 }
1331         }
1332
1333         flash_write_cmd (info, 0, 0, info->cmd_reset);
1334         return (info->size);
1335 }
1336
1337 /* loop through the sectors from the highest address
1338  * when the passed address is greater or equal to the sector address
1339  * we have a match
1340  */
1341 static flash_sect_t find_sector (flash_info_t * info, ulong addr)
1342 {
1343         flash_sect_t sector;
1344
1345         for (sector = info->sector_count - 1; sector >= 0; sector--) {
1346                 if (addr >= info->start[sector])
1347                         break;
1348         }
1349         return sector;
1350 }
1351
1352 /*-----------------------------------------------------------------------
1353  */
1354 static int flash_write_cfiword (flash_info_t * info, ulong dest,
1355                                 cfiword_t cword)
1356 {
1357         cfiptr_t ctladdr;
1358         cfiptr_t cptr;
1359         int flag;
1360
1361         ctladdr.cp = flash_make_addr (info, 0, 0);
1362         cptr.cp = (uchar *) dest;
1363
1364         /* Check if Flash is (sufficiently) erased */
1365         switch (info->portwidth) {
1366         case FLASH_CFI_8BIT:
1367                 flag = ((cptr.cp[0] & cword.c) == cword.c);
1368                 break;
1369         case FLASH_CFI_16BIT:
1370                 flag = ((cptr.wp[0] & cword.w) == cword.w);
1371                 break;
1372         case FLASH_CFI_32BIT:
1373                 flag = ((cptr.lp[0] & cword.l) == cword.l);
1374                 break;
1375         case FLASH_CFI_64BIT:
1376                 flag = ((cptr.llp[0] & cword.ll) == cword.ll);
1377                 break;
1378         default:
1379                 return 2;
1380         }
1381         if (!flag)
1382                 return 2;
1383
1384         /* Disable interrupts which might cause a timeout here */
1385         flag = disable_interrupts ();
1386
1387         switch (info->vendor) {
1388         case CFI_CMDSET_INTEL_EXTENDED:
1389         case CFI_CMDSET_INTEL_STANDARD:
1390                 flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
1391                 flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
1392                 break;
1393         case CFI_CMDSET_AMD_EXTENDED:
1394         case CFI_CMDSET_AMD_STANDARD:
1395                 flash_unlock_seq (info, 0);
1396                 flash_write_cmd (info, 0, AMD_ADDR_START, AMD_CMD_WRITE);
1397                 break;
1398         }
1399
1400         switch (info->portwidth) {
1401         case FLASH_CFI_8BIT:
1402                 cptr.cp[0] = cword.c;
1403                 break;
1404         case FLASH_CFI_16BIT:
1405                 cptr.wp[0] = cword.w;
1406                 break;
1407         case FLASH_CFI_32BIT:
1408                 cptr.lp[0] = cword.l;
1409                 break;
1410         case FLASH_CFI_64BIT:
1411                 cptr.llp[0] = cword.ll;
1412                 break;
1413         }
1414
1415         /* re-enable interrupts if necessary */
1416         if (flag)
1417                 enable_interrupts ();
1418
1419         return flash_full_status_check (info, find_sector (info, dest),
1420                                         info->write_tout, "write");
1421 }
1422
1423 #ifdef CFG_FLASH_USE_BUFFER_WRITE
1424
1425 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
1426                                   int len)
1427 {
1428         flash_sect_t sector;
1429         int cnt;
1430         int retcode;
1431         volatile cfiptr_t src;
1432         volatile cfiptr_t dst;
1433
1434         switch (info->vendor) {
1435         case CFI_CMDSET_INTEL_STANDARD:
1436         case CFI_CMDSET_INTEL_EXTENDED:
1437                 src.cp = cp;
1438                 dst.cp = (uchar *) dest;
1439                 sector = find_sector (info, dest);
1440                 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1441                 flash_write_cmd (info, sector, 0, FLASH_CMD_WRITE_TO_BUFFER);
1442                 if ((retcode = flash_status_check (info, sector, info->buffer_write_tout,
1443                                                    "write to buffer")) == ERR_OK) {
1444                         /* reduce the number of loops by the width of the port  */
1445                         switch (info->portwidth) {
1446                         case FLASH_CFI_8BIT:
1447                                 cnt = len;
1448                                 break;
1449                         case FLASH_CFI_16BIT:
1450                                 cnt = len >> 1;
1451                                 break;
1452                         case FLASH_CFI_32BIT:
1453                                 cnt = len >> 2;
1454                                 break;
1455                         case FLASH_CFI_64BIT:
1456                                 cnt = len >> 3;
1457                                 break;
1458                         default:
1459                                 return ERR_INVAL;
1460                                 break;
1461                         }
1462                         flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
1463                         while (cnt-- > 0) {
1464                                 switch (info->portwidth) {
1465                                 case FLASH_CFI_8BIT:
1466                                         *dst.cp++ = *src.cp++;
1467                                         break;
1468                                 case FLASH_CFI_16BIT:
1469                                         *dst.wp++ = *src.wp++;
1470                                         break;
1471                                 case FLASH_CFI_32BIT:
1472                                         *dst.lp++ = *src.lp++;
1473                                         break;
1474                                 case FLASH_CFI_64BIT:
1475                                         *dst.llp++ = *src.llp++;
1476                                         break;
1477                                 default:
1478                                         return ERR_INVAL;
1479                                         break;
1480                                 }
1481                         }
1482                         flash_write_cmd (info, sector, 0,
1483                                          FLASH_CMD_WRITE_BUFFER_CONFIRM);
1484                         retcode = flash_full_status_check (info, sector,
1485                                                            info->buffer_write_tout,
1486                                                            "buffer write");
1487                 }
1488                 return retcode;
1489
1490         case CFI_CMDSET_AMD_STANDARD:
1491         case CFI_CMDSET_AMD_EXTENDED:
1492                 src.cp = cp;
1493                 dst.cp = (uchar *) dest;
1494                 sector = find_sector (info, dest);
1495
1496                 flash_unlock_seq(info,0);
1497                 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_TO_BUFFER);
1498
1499                 switch (info->portwidth) {
1500                 case FLASH_CFI_8BIT:
1501                         cnt = len;
1502                         flash_write_cmd (info, sector, 0,  (uchar) cnt - 1);
1503                         while (cnt-- > 0) *dst.cp++ = *src.cp++;
1504                         break;
1505                 case FLASH_CFI_16BIT:
1506                         cnt = len >> 1;
1507                         flash_write_cmd (info, sector, 0,  (uchar) cnt - 1);
1508                         while (cnt-- > 0) *dst.wp++ = *src.wp++;
1509                         break;
1510                 case FLASH_CFI_32BIT:
1511                         cnt = len >> 2;
1512                         flash_write_cmd (info, sector, 0,  (uchar) cnt - 1);
1513                         while (cnt-- > 0) *dst.lp++ = *src.lp++;
1514                         break;
1515                 case FLASH_CFI_64BIT:
1516                         cnt = len >> 3;
1517                         flash_write_cmd (info, sector, 0,  (uchar) cnt - 1);
1518                         while (cnt-- > 0) *dst.llp++ = *src.llp++;
1519                         break;
1520                 default:
1521                         return ERR_INVAL;
1522                 }
1523
1524                 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
1525                 retcode = flash_full_status_check (info, sector, info->buffer_write_tout,
1526                                                    "buffer write");
1527                 return retcode;
1528
1529         default:
1530                 debug ("Unknown Command Set\n");
1531                 return ERR_INVAL;
1532         }
1533 }
1534 #endif /* CFG_FLASH_USE_BUFFER_WRITE */
1535
1536 #endif /* CFG_FLASH_CFI */