drivers/cfi_flash.c

   1 /*
   2  * (C) Copyright 2002-2004
   3  * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
   4  *
   5  * Copyright (C) 2003 Arabella Software Ltd.
   6  * Yuli Barcohen <yuli@arabellasw.com>
   7  * Modified to work with AMD flashes
   8  *
   9  * Copyright (C) 2004
  10  * Ed Okerson
  11  * Modified to work with little-endian systems.
  12  *
  13  * See file CREDITS for list of people who contributed to this
  14  * project.
  15  *
  16  * This program is free software; you can redistribute it and/or
  17  * modify it under the terms of the GNU General Public License as
  18  * published by the Free Software Foundation; either version 2 of
  19  * the License, or (at your option) any later version.
  20  *
  21  * This program is distributed in the hope that it will be useful,
  22  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  23  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  24  * GNU General Public License for more details.
  25  *
  26  * You should have received a copy of the GNU General Public License
  27  * along with this program; if not, write to the Free Software
  28  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  29  * MA 02111-1307 USA
  30  *
  31  * History
  32  * 01/20/2004 - combined variants of original driver.
  33  * 01/22/2004 - Write performance enhancements for parallel chips (Tolunay)
  34  * 01/23/2004 - Support for x8/x16 chips (Rune Raknerud)
  35  * 01/27/2004 - Little endian support Ed Okerson
  36  *
  37  * Tested Architectures
  38  * Port Width  Chip Width    # of banks    Flash Chip  Board
  39  * 32          16            1             28F128J3    seranoa/eagle
  40  * 64          16            1             28F128J3    seranoa/falcon
  41  *
  42  */
  43
  44 /* The DEBUG define must be before common to enable debugging */
  45 /* #define DEBUG        */
  46
  47 #include <common.h>
  48 #include <asm/processor.h>
  49 #include <asm/byteorder.h>
  50 #include <linux/byteorder/swab.h>
  51 #ifdef  CFG_FLASH_CFI_DRIVER
  52
  53 /*
  54  * This file implements a Common Flash Interface (CFI) driver for U-Boot.
  55  * The width of the port and the width of the chips are determined at initialization.
  56  * These widths are used to calculate the address for access CFI data structures.
  57  * It has been tested on an Intel Strataflash implementation and AMD 29F016D.
  58  *
  59  * References
  60  * JEDEC Standard JESD68 - Common Flash Interface (CFI)
  61  * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
  62  * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
  63  * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
  64  *
  65  * TODO
  66  *
  67  * Use Primary Extended Query table (PRI) and Alternate Algorithm Query
  68  * Table (ALT) to determine if protection is available
  69  *
  70  * Add support for other command sets Use the PRI and ALT to determine command set
  71  * Verify erase and program timeouts.
  72  */
  73
  74 #ifndef CFG_FLASH_BANKS_LIST
  75 #define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
  76 #endif
  77
  78 #define FLASH_CMD_CFI                   0x98
  79 #define FLASH_CMD_READ_ID               0x90
  80 #define FLASH_CMD_RESET                 0xff
  81 #define FLASH_CMD_BLOCK_ERASE           0x20
  82 #define FLASH_CMD_ERASE_CONFIRM         0xD0
  83 #define FLASH_CMD_WRITE                 0x40
  84 #define FLASH_CMD_PROTECT               0x60
  85 #define FLASH_CMD_PROTECT_SET           0x01
  86 #define FLASH_CMD_PROTECT_CLEAR         0xD0
  87 #define FLASH_CMD_CLEAR_STATUS          0x50
  88 #define FLASH_CMD_WRITE_TO_BUFFER       0xE8
  89 #define FLASH_CMD_WRITE_BUFFER_CONFIRM  0xD0
  90
  91 #define FLASH_STATUS_DONE               0x80
  92 #define FLASH_STATUS_ESS                0x40
  93 #define FLASH_STATUS_ECLBS              0x20
  94 #define FLASH_STATUS_PSLBS              0x10
  95 #define FLASH_STATUS_VPENS              0x08
  96 #define FLASH_STATUS_PSS                0x04
  97 #define FLASH_STATUS_DPS                0x02
  98 #define FLASH_STATUS_R                  0x01
  99 #define FLASH_STATUS_PROTECT            0x01
 100
 101 #define AMD_CMD_RESET                   0xF0
 102 #define AMD_CMD_WRITE                   0xA0
 103 #define AMD_CMD_ERASE_START             0x80
 104 #define AMD_CMD_ERASE_SECTOR            0x30
 105 #define AMD_CMD_UNLOCK_START            0xAA
 106 #define AMD_CMD_UNLOCK_ACK              0x55
 107
 108 #define AMD_STATUS_TOGGLE               0x40
 109 #define AMD_STATUS_ERROR                0x20
 110 #define AMD_ADDR_ERASE_START            0x555
 111 #define AMD_ADDR_START                  0x555
 112 #define AMD_ADDR_ACK                    0x2AA
 113
 114 #define FLASH_OFFSET_CFI                0x55
 115 #define FLASH_OFFSET_CFI_RESP           0x10
 116 #define FLASH_OFFSET_PRIMARY_VENDOR     0x13
 117 #define FLASH_OFFSET_WTOUT              0x1F
 118 #define FLASH_OFFSET_WBTOUT             0x20
 119 #define FLASH_OFFSET_ETOUT              0x21
 120 #define FLASH_OFFSET_CETOUT             0x22
 121 #define FLASH_OFFSET_WMAX_TOUT          0x23
 122 #define FLASH_OFFSET_WBMAX_TOUT         0x24
 123 #define FLASH_OFFSET_EMAX_TOUT          0x25
 124 #define FLASH_OFFSET_CEMAX_TOUT         0x26
 125 #define FLASH_OFFSET_SIZE               0x27
 126 #define FLASH_OFFSET_INTERFACE          0x28
 127 #define FLASH_OFFSET_BUFFER_SIZE        0x2A
 128 #define FLASH_OFFSET_NUM_ERASE_REGIONS  0x2C
 129 #define FLASH_OFFSET_ERASE_REGIONS      0x2D
 130 #define FLASH_OFFSET_PROTECT            0x02
 131 #define FLASH_OFFSET_USER_PROTECTION    0x85
 132 #define FLASH_OFFSET_INTEL_PROTECTION   0x81
 133
 134
 135 #define FLASH_MAN_CFI                   0x01000000
 136
 137 #define CFI_CMDSET_NONE             0
 138 #define CFI_CMDSET_INTEL_EXTENDED   1
 139 #define CFI_CMDSET_AMD_STANDARD     2
 140 #define CFI_CMDSET_INTEL_STANDARD   3
 141 #define CFI_CMDSET_AMD_EXTENDED     4
 142 #define CFI_CMDSET_MITSU_STANDARD   256
 143 #define CFI_CMDSET_MITSU_EXTENDED   257
 144 #define CFI_CMDSET_SST              258
 145
 146
 147 #ifdef CFG_FLASH_CFI_AMD_RESET /* needed for STM_ID_29W320DB on UC100 */
 148 # undef  FLASH_CMD_RESET
 149 # define FLASH_CMD_RESET                AMD_CMD_RESET /* use AMD-Reset instead */
 150 #endif
 151
 152
 153 typedef union {
 154         unsigned char c;
 155         unsigned short w;
 156         unsigned long l;
 157         unsigned long long ll;
 158 } cfiword_t;
 159
 160 typedef union {
 161         volatile unsigned char *cp;
 162         volatile unsigned short *wp;
 163         volatile unsigned long *lp;
 164         volatile unsigned long long *llp;
 165 } cfiptr_t;
 166
 167 #define NUM_ERASE_REGIONS 4
 168
 169 static ulong bank_base[CFG_MAX_FLASH_BANKS] = CFG_FLASH_BANKS_LIST;
 170
 171 flash_info_t flash_info[CFG_MAX_FLASH_BANKS];   /* info for FLASH chips   */
 172
 173 /*-----------------------------------------------------------------------
 174  * Functions
 175  */
 176
 177 typedef unsigned long flash_sect_t;
 178
 179 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c);
 180 static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf);
 181 static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
 182 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect);
 183 static int flash_isequal (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
 184 static int flash_isset (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
 185 static int flash_toggle (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
 186 static int flash_detect_cfi (flash_info_t * info);
 187 static ulong flash_get_size (ulong base, int banknum);
 188 static int flash_write_cfiword (flash_info_t * info, ulong dest, cfiword_t cword);
 189 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
 190                                     ulong tout, char *prompt);
 191 #ifdef CFG_FLASH_USE_BUFFER_WRITE
 192 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp, int len);
 193 #endif
 194
 195 /*-----------------------------------------------------------------------
 196  * create an address based on the offset and the port width
 197  */
 198 inline uchar *flash_make_addr (flash_info_t * info, flash_sect_t sect, uint offset)
 199 {
 200         return ((uchar *) (info->start[sect] + (offset * info->portwidth)));
 201 }
 202
 203 #ifdef DEBUG
 204 /*-----------------------------------------------------------------------
 205  * Debug support
 206  */
 207 void print_longlong (char *str, unsigned long long data)
 208 {
 209         int i;
 210         char *cp;
 211
 212         cp = (unsigned char *) &data;
 213         for (i = 0; i < 8; i++)
 214                 sprintf (&str[i * 2], "%2.2x", *cp++);
 215 }
 216 static void flash_printqry (flash_info_t * info, flash_sect_t sect)
 217 {
 218         cfiptr_t cptr;
 219         int x, y;
 220
 221         for (x = 0; x < 0x40; x += 16 / info->portwidth) {
 222                 cptr.cp =
 223                         flash_make_addr (info, sect,
 224                                          x + FLASH_OFFSET_CFI_RESP);
 225                 debug ("%p : ", cptr.cp);
 226                 for (y = 0; y < 16; y++) {
 227                         debug ("%2.2x ", cptr.cp[y]);
 228                 }
 229                 debug (" ");
 230                 for (y = 0; y < 16; y++) {
 231                         if (cptr.cp[y] >= 0x20 && cptr.cp[y] <= 0x7e) {
 232                                 debug ("%c", cptr.cp[y]);
 233                         } else {
 234                                 debug (".");
 235                         }
 236                 }
 237                 debug ("\n");
 238         }
 239 }
 240 #endif
 241
 242
 243 /*-----------------------------------------------------------------------
 244  * read a character at a port width address
 245  */
 246 inline uchar flash_read_uchar (flash_info_t * info, uint offset)
 247 {
 248         uchar *cp;
 249
 250         cp = flash_make_addr (info, 0, offset);
 251 #if defined(__LITTLE_ENDIAN)
 252         return (cp[0]);
 253 #else
 254         return (cp[info->portwidth - 1]);
 255 #endif
 256 }
 257
 258 /*-----------------------------------------------------------------------
 259  * read a short word by swapping for ppc format.
 260  */
 261 ushort flash_read_ushort (flash_info_t * info, flash_sect_t sect, uint offset)
 262 {
 263         uchar *addr;
 264         ushort retval;
 265
 266 #ifdef DEBUG
 267         int x;
 268 #endif
 269         addr = flash_make_addr (info, sect, offset);
 270
 271 #ifdef DEBUG
 272         debug ("ushort addr is at %p info->portwidth = %d\n", addr,
 273                info->portwidth);
 274         for (x = 0; x < 2 * info->portwidth; x++) {
 275                 debug ("addr[%x] = 0x%x\n", x, addr[x]);
 276         }
 277 #endif
 278 #if defined(__LITTLE_ENDIAN)
 279         retval = ((addr[(info->portwidth)] << 8) | addr[0]);
 280 #else
 281         retval = ((addr[(2 * info->portwidth) - 1] << 8) |
 282                   addr[info->portwidth - 1]);
 283 #endif
 284
 285         debug ("retval = 0x%x\n", retval);
 286         return retval;
 287 }
 288
 289 /*-----------------------------------------------------------------------
 290  * read a long word by picking the least significant byte of each maiximum
 291  * port size word. Swap for ppc format.
 292  */
 293 ulong flash_read_long (flash_info_t * info, flash_sect_t sect, uint offset)
 294 {
 295         uchar *addr;
 296         ulong retval;
 297
 298 #ifdef DEBUG
 299         int x;
 300 #endif
 301         addr = flash_make_addr (info, sect, offset);
 302
 303 #ifdef DEBUG
 304         debug ("long addr is at %p info->portwidth = %d\n", addr,
 305                info->portwidth);
 306         for (x = 0; x < 4 * info->portwidth; x++) {
 307                 debug ("addr[%x] = 0x%x\n", x, addr[x]);
 308         }
 309 #endif
 310 #if defined(__LITTLE_ENDIAN)
 311         retval = (addr[0] << 16) | (addr[(info->portwidth)] << 24) |
 312                 (addr[(2 * info->portwidth)]) | (addr[(3 * info->portwidth)] << 8);
 313 #else
 314         retval = (addr[(2 * info->portwidth) - 1] << 24) |
 315                 (addr[(info->portwidth) - 1] << 16) |
 316                 (addr[(4 * info->portwidth) - 1] << 8) |
 317                 addr[(3 * info->portwidth) - 1];
 318 #endif
 319         return retval;
 320 }
 321
 322 /*-----------------------------------------------------------------------
 323  */
 324 unsigned long flash_init (void)
 325 {
 326         unsigned long size = 0;
 327         int i;
 328
 329         /* Init: no FLASHes known */
 330         for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
 331                 flash_info[i].flash_id = FLASH_UNKNOWN;
 332                 size += flash_info[i].size = flash_get_size (bank_base[i], i);
 333                 if (flash_info[i].flash_id == FLASH_UNKNOWN) {
 334                         printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n",
 335                                 i, flash_info[i].size, flash_info[i].size << 20);
 336                 }
 337         }
 338
 339         /* Monitor protection ON by default */
 340 #if (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
 341         flash_protect (FLAG_PROTECT_SET,
 342                        CFG_MONITOR_BASE,
 343                        CFG_MONITOR_BASE + CFG_MONITOR_LEN - 1,
 344                        &flash_info[0]);
 345 #endif
 346
 347         /* Environment protection ON by default */
 348 #ifdef CFG_ENV_IS_IN_FLASH
 349         flash_protect (FLAG_PROTECT_SET,
 350                        CFG_ENV_ADDR,
 351                        CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1,
 352                        &flash_info[0]);
 353 #endif
 354
 355         /* Redundant environment protection ON by default */
 356 #ifdef CFG_ENV_ADDR_REDUND
 357         flash_protect (FLAG_PROTECT_SET,
 358                        CFG_ENV_ADDR_REDUND,
 359                        CFG_ENV_ADDR_REDUND + CFG_ENV_SIZE_REDUND - 1,
 360                        &flash_info[0]);
 361 #endif
 362         return (size);
 363 }
 364
 365 /*-----------------------------------------------------------------------
 366  */
 367 int flash_erase (flash_info_t * info, int s_first, int s_last)
 368 {
 369         int rcode = 0;
 370         int prot;
 371         flash_sect_t sect;
 372
 373         if (info->flash_id != FLASH_MAN_CFI) {
 374                 puts ("Can't erase unknown flash type - aborted\n");
 375                 return 1;
 376         }
 377         if ((s_first < 0) || (s_first > s_last)) {
 378                 puts ("- no sectors to erase\n");
 379                 return 1;
 380         }
 381
 382         prot = 0;
 383         for (sect = s_first; sect <= s_last; ++sect) {
 384                 if (info->protect[sect]) {
 385                         prot++;
 386                 }
 387         }
 388         if (prot) {
 389                 printf ("- Warning: %d protected sectors will not be erased!\n", prot);
 390         } else {
 391                 putc ('\n');
 392         }
 393
 394
 395         for (sect = s_first; sect <= s_last; sect++) {
 396                 if (info->protect[sect] == 0) { /* not protected */
 397                         switch (info->vendor) {
 398                         case CFI_CMDSET_INTEL_STANDARD:
 399                         case CFI_CMDSET_INTEL_EXTENDED:
 400                                 flash_write_cmd (info, sect, 0, FLASH_CMD_CLEAR_STATUS);
 401                                 flash_write_cmd (info, sect, 0, FLASH_CMD_BLOCK_ERASE);
 402                                 flash_write_cmd (info, sect, 0, FLASH_CMD_ERASE_CONFIRM);
 403                                 break;
 404                         case CFI_CMDSET_AMD_STANDARD:
 405                         case CFI_CMDSET_AMD_EXTENDED:
 406                                 flash_unlock_seq (info, sect);
 407                                 flash_write_cmd (info, sect, AMD_ADDR_ERASE_START,
 408                                                         AMD_CMD_ERASE_START);
 409                                 flash_unlock_seq (info, sect);
 410                                 flash_write_cmd (info, sect, 0, AMD_CMD_ERASE_SECTOR);
 411                                 break;
 412                         default:
 413                                 debug ("Unkown flash vendor %d\n",
 414                                        info->vendor);
 415                                 break;
 416                         }
 417
 418                         if (flash_full_status_check
 419                             (info, sect, info->erase_blk_tout, "erase")) {
 420                                 rcode = 1;
 421                         } else
 422                                 putc ('.');
 423                 }
 424         }
 425         puts (" done\n");
 426         return rcode;
 427 }
 428
 429 /*-----------------------------------------------------------------------
 430  */
 431 void flash_print_info (flash_info_t * info)
 432 {
 433         int i;
 434
 435         if (info->flash_id != FLASH_MAN_CFI) {
 436                 puts ("missing or unknown FLASH type\n");
 437                 return;
 438         }
 439
 440         printf ("CFI conformant FLASH (%d x %d)",
 441                 (info->portwidth << 3), (info->chipwidth << 3));
 442         printf ("  Size: %ld MB in %d Sectors\n",
 443                 info->size >> 20, info->sector_count);
 444         printf (" Erase timeout %ld ms, write timeout %ld ms, buffer write timeout %ld ms, buffer size %d\n",
 445                 info->erase_blk_tout,
 446                 info->write_tout,
 447                 info->buffer_write_tout,
 448                 info->buffer_size);
 449
 450         puts ("  Sector Start Addresses:");
 451         for (i = 0; i < info->sector_count; ++i) {
 452 #ifdef CFG_FLASH_EMPTY_INFO
 453                 int k;
 454                 int size;
 455                 int erased;
 456                 volatile unsigned long *flash;
 457
 458                 /*
 459                  * Check if whole sector is erased
 460                  */
 461                 if (i != (info->sector_count - 1))
 462                         size = info->start[i + 1] - info->start[i];
 463                 else
 464                         size = info->start[0] + info->size - info->start[i];
 465                 erased = 1;
 466                 flash = (volatile unsigned long *) info->start[i];
 467                 size = size >> 2;       /* divide by 4 for longword access */
 468                 for (k = 0; k < size; k++) {
 469                         if (*flash++ != 0xffffffff) {
 470                                 erased = 0;
 471                                 break;
 472                         }
 473                 }
 474
 475                 if ((i % 5) == 0)
 476                         printf ("\n");
 477                 /* print empty and read-only info */
 478                 printf (" %08lX%s%s",
 479                         info->start[i],
 480                         erased ? " E" : "  ",
 481                         info->protect[i] ? "RO " : "   ");
 482 #else
 483                 if ((i % 5) == 0)
 484                         printf ("\n   ");
 485                 printf (" %08lX%s",
 486                         info->start[i], info->protect[i] ? " (RO)  " : "     ");
 487 #endif
 488         }
 489         putc ('\n');
 490         return;
 491 }
 492
 493 /*-----------------------------------------------------------------------
 494  * Copy memory to flash, returns:
 495  * 0 - OK
 496  * 1 - write timeout
 497  * 2 - Flash not erased
 498  */
 499 int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
 500 {
 501         ulong wp;
 502         ulong cp;
 503         int aln;
 504         cfiword_t cword;
 505         int i, rc;
 506
 507 #ifdef CFG_FLASH_USE_BUFFER_WRITE
 508         int buffered_size;
 509 #endif
 510         /* get lower aligned address */
 511         /* get lower aligned address */
 512         wp = (addr & ~(info->portwidth - 1));
 513
 514         /* handle unaligned start */
 515         if ((aln = addr - wp) != 0) {
 516                 cword.l = 0;
 517                 cp = wp;
 518                 for (i = 0; i < aln; ++i, ++cp)
 519                         flash_add_byte (info, &cword, (*(uchar *) cp));
 520
 521                 for (; (i < info->portwidth) && (cnt > 0); i++) {
 522                         flash_add_byte (info, &cword, *src++);
 523                         cnt--;
 524                         cp++;
 525                 }
 526                 for (; (cnt == 0) && (i < info->portwidth); ++i, ++cp)
 527                         flash_add_byte (info, &cword, (*(uchar *) cp));
 528                 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
 529                         return rc;
 530                 wp = cp;
 531         }
 532
 533         /* handle the aligned part */
 534 #ifdef CFG_FLASH_USE_BUFFER_WRITE
 535         buffered_size = (info->portwidth / info->chipwidth);
 536         buffered_size *= info->buffer_size;
 537         while (cnt >= info->portwidth) {
 538                 i = buffered_size > cnt ? cnt : buffered_size;
 539                 if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
 540                         return rc;
 541                 i -= (i % info->portwidth);
 542                 wp += i;
 543                 src += i;
 544                 cnt -= i;
 545         }
 546 #else
 547         while (cnt >= info->portwidth) {
 548                 cword.l = 0;
 549                 for (i = 0; i < info->portwidth; i++) {
 550                         flash_add_byte (info, &cword, *src++);
 551                 }
 552                 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
 553                         return rc;
 554                 wp += info->portwidth;
 555                 cnt -= info->portwidth;
 556         }
 557 #endif /* CFG_FLASH_USE_BUFFER_WRITE */
 558         if (cnt == 0) {
 559                 return (0);
 560         }
 561
 562         /*
 563          * handle unaligned tail bytes
 564          */
 565         cword.l = 0;
 566         for (i = 0, cp = wp; (i < info->portwidth) && (cnt > 0); ++i, ++cp) {
 567                 flash_add_byte (info, &cword, *src++);
 568                 --cnt;
 569         }
 570         for (; i < info->portwidth; ++i, ++cp) {
 571                 flash_add_byte (info, &cword, (*(uchar *) cp));
 572         }
 573
 574         return flash_write_cfiword (info, wp, cword);
 575 }
 576
 577 /*-----------------------------------------------------------------------
 578  */
 579 #ifdef CFG_FLASH_PROTECTION
 580
 581 int flash_real_protect (flash_info_t * info, long sector, int prot)
 582 {
 583         int retcode = 0;
 584
 585         flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
 586         flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
 587         if (prot)
 588                 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET);
 589         else
 590                 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
 591
 592         if ((retcode =
 593              flash_full_status_check (info, sector, info->erase_blk_tout,
 594                                       prot ? "protect" : "unprotect")) == 0) {
 595
 596                 info->protect[sector] = prot;
 597                 /* Intel's unprotect unprotects all locking */
 598                 if (prot == 0) {
 599                         flash_sect_t i;
 600
 601                         for (i = 0; i < info->sector_count; i++) {
 602                                 if (info->protect[i])
 603                                         flash_real_protect (info, i, 1);
 604                         }
 605                 }
 606         }
 607         return retcode;
 608 }
 609
 610 /*-----------------------------------------------------------------------
 611  * flash_read_user_serial - read the OneTimeProgramming cells
 612  */
 613 void flash_read_user_serial (flash_info_t * info, void *buffer, int offset,
 614                              int len)
 615 {
 616         uchar *src;
 617         uchar *dst;
 618
 619         dst = buffer;
 620         src = flash_make_addr (info, 0, FLASH_OFFSET_USER_PROTECTION);
 621         flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
 622         memcpy (dst, src + offset, len);
 623         flash_write_cmd (info, 0, 0, FLASH_CMD_RESET);
 624 }
 625
 626 /*
 627  * flash_read_factory_serial - read the device Id from the protection area
 628  */
 629 void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset,
 630                                 int len)
 631 {
 632         uchar *src;
 633
 634         src = flash_make_addr (info, 0, FLASH_OFFSET_INTEL_PROTECTION);
 635         flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
 636         memcpy (buffer, src + offset, len);
 637         flash_write_cmd (info, 0, 0, FLASH_CMD_RESET);
 638 }
 639
 640 #endif /* CFG_FLASH_PROTECTION */
 641
 642 /*
 643  * flash_is_busy - check to see if the flash is busy
 644  * This routine checks the status of the chip and returns true if the chip is busy
 645  */
 646 static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
 647 {
 648         int retval;
 649
 650         switch (info->vendor) {
 651         case CFI_CMDSET_INTEL_STANDARD:
 652         case CFI_CMDSET_INTEL_EXTENDED:
 653                 retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
 654                 break;
 655         case CFI_CMDSET_AMD_STANDARD:
 656         case CFI_CMDSET_AMD_EXTENDED:
 657                 retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE);
 658                 break;
 659         default:
 660                 retval = 0;
 661         }
 662         debug ("flash_is_busy: %d\n", retval);
 663         return retval;
 664 }
 665
 666 /*-----------------------------------------------------------------------
 667  *  wait for XSR.7 to be set. Time out with an error if it does not.
 668  *  This routine does not set the flash to read-array mode.
 669  */
 670 static int flash_status_check (flash_info_t * info, flash_sect_t sector,
 671                                ulong tout, char *prompt)
 672 {
 673         ulong start;
 674
 675         /* Wait for command completion */
 676         start = get_timer (0);
 677         while (flash_is_busy (info, sector)) {
 678                 if (get_timer (start) > info->erase_blk_tout * CFG_HZ) {
 679                         printf ("Flash %s timeout at address %lx data %lx\n",
 680                                 prompt, info->start[sector],
 681                                 flash_read_long (info, sector, 0));
 682                         flash_write_cmd (info, sector, 0, info->cmd_reset);
 683                         return ERR_TIMOUT;
 684                 }
 685         }
 686         return ERR_OK;
 687 }
 688
 689 /*-----------------------------------------------------------------------
 690  * Wait for XSR.7 to be set, if it times out print an error, otherwise do a full status check.
 691  * This routine sets the flash to read-array mode.
 692  */
 693 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
 694                                     ulong tout, char *prompt)
 695 {
 696         int retcode;
 697
 698         retcode = flash_status_check (info, sector, tout, prompt);
 699         switch (info->vendor) {
 700         case CFI_CMDSET_INTEL_EXTENDED:
 701         case CFI_CMDSET_INTEL_STANDARD:
 702                 if ((retcode != ERR_OK)
 703                     && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
 704                         retcode = ERR_INVAL;
 705                         printf ("Flash %s error at address %lx\n", prompt,
 706                                 info->start[sector]);
 707                         if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS | FLASH_STATUS_PSLBS)) {
 708                                 puts ("Command Sequence Error.\n");
 709                         } else if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS)) {
 710                                 puts ("Block Erase Error.\n");
 711                                 retcode = ERR_NOT_ERASED;
 712                         } else if (flash_isset (info, sector, 0, FLASH_STATUS_PSLBS)) {
 713                                 puts ("Locking Error\n");
 714                         }
 715                         if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
 716                                 puts ("Block locked.\n");
 717                                 retcode = ERR_PROTECTED;
 718                         }
 719                         if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
 720                                 puts ("Vpp Low Error.\n");
 721                 }
 722                 flash_write_cmd (info, sector, 0, FLASH_CMD_RESET);
 723                 break;
 724         default:
 725                 break;
 726         }
 727         return retcode;
 728 }
 729
 730 /*-----------------------------------------------------------------------
 731  */
 732 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
 733 {
 734 #if defined(__LITTLE_ENDIAN)
 735         unsigned short  w;
 736         unsigned int    l;
 737         unsigned long long ll;
 738 #endif
 739
 740         switch (info->portwidth) {
 741         case FLASH_CFI_8BIT:
 742                 cword->c = c;
 743                 break;
 744         case FLASH_CFI_16BIT:
 745 #if defined(__LITTLE_ENDIAN)
 746                 w = c;
 747                 w <<= 8;
 748                 cword->w = (cword->w >> 8) | w;
 749 #else
 750                 cword->w = (cword->w << 8) | c;
 751 #endif
 752                 break;
 753         case FLASH_CFI_32BIT:
 754 #if defined(__LITTLE_ENDIAN)
 755                 l = c;
 756                 l <<= 24;
 757                 cword->l = (cword->l >> 8) | l;
 758 #else
 759                 cword->l = (cword->l << 8) | c;
 760 #endif
 761                 break;
 762         case FLASH_CFI_64BIT:
 763 #if defined(__LITTLE_ENDIAN)
 764                 ll = c;
 765                 ll <<= 56;
 766                 cword->ll = (cword->ll >> 8) | ll;
 767 #else
 768                 cword->ll = (cword->ll << 8) | c;
 769 #endif
 770                 break;
 771         }
 772 }
 773
 774
 775 /*-----------------------------------------------------------------------
 776  * make a proper sized command based on the port and chip widths
 777  */
 778 static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf)
 779 {
 780         int i;
 781
 782 #if defined(__LITTLE_ENDIAN)
 783         ushort stmpw;
 784         uint   stmpi;
 785 #endif
 786         uchar *cp = (uchar *) cmdbuf;
 787
 788         for (i = 0; i < info->portwidth; i++)
 789                 *cp++ = ((i + 1) % info->chipwidth) ? '\0' : cmd;
 790 #if defined(__LITTLE_ENDIAN)
 791         switch (info->portwidth) {
 792         case FLASH_CFI_8BIT:
 793                 break;
 794         case FLASH_CFI_16BIT:
 795                 stmpw = *(ushort *) cmdbuf;
 796                 *(ushort *) cmdbuf = __swab16 (stmpw);
 797                 break;
 798         case FLASH_CFI_32BIT:
 799                 stmpi = *(uint *) cmdbuf;
 800                 *(uint *) cmdbuf = __swab32 (stmpi);
 801                 break;
 802         default:
 803                 puts ("WARNING: flash_make_cmd: unsuppported LittleEndian mode\n");
 804                 break;
 805         }
 806 #endif
 807 }
 808
 809 /*
 810  * Write a proper sized command to the correct address
 811  */
 812 static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
 813 {
 814
 815         volatile cfiptr_t addr;
 816         cfiword_t cword;
 817
 818         addr.cp = flash_make_addr (info, sect, offset);
 819         flash_make_cmd (info, cmd, &cword);
 820         switch (info->portwidth) {
 821         case FLASH_CFI_8BIT:
 822                 debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr.cp, cmd,
 823                        cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 824                 *addr.cp = cword.c;
 825                 break;
 826         case FLASH_CFI_16BIT:
 827                 debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr.wp,
 828                        cmd, cword.w,
 829                        info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 830                 *addr.wp = cword.w;
 831                 break;
 832         case FLASH_CFI_32BIT:
 833                 debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr.lp,
 834                        cmd, cword.l,
 835                        info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 836                 *addr.lp = cword.l;
 837                 break;
 838         case FLASH_CFI_64BIT:
 839 #ifdef DEBUG
 840                 {
 841                         char str[20];
 842
 843                         print_longlong (str, cword.ll);
 844
 845                         debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
 846                                addr.llp, cmd, str,
 847                                info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 848                 }
 849 #endif
 850                 *addr.llp = cword.ll;
 851                 break;
 852         }
 853 }
 854
 855 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
 856 {
 857         flash_write_cmd (info, sect, AMD_ADDR_START, AMD_CMD_UNLOCK_START);
 858         flash_write_cmd (info, sect, AMD_ADDR_ACK, AMD_CMD_UNLOCK_ACK);
 859 }
 860
 861 /*-----------------------------------------------------------------------
 862  */
 863 static int flash_isequal (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
 864 {
 865         cfiptr_t cptr;
 866         cfiword_t cword;
 867         int retval;
 868
 869         cptr.cp = flash_make_addr (info, sect, offset);
 870         flash_make_cmd (info, cmd, &cword);
 871
 872         debug ("is= cmd %x(%c) addr %p ", cmd, cmd, cptr.cp);
 873         switch (info->portwidth) {
 874         case FLASH_CFI_8BIT:
 875                 debug ("is= %x %x\n", cptr.cp[0], cword.c);
 876                 retval = (cptr.cp[0] == cword.c);
 877                 break;
 878         case FLASH_CFI_16BIT:
 879                 debug ("is= %4.4x %4.4x\n", cptr.wp[0], cword.w);
 880                 retval = (cptr.wp[0] == cword.w);
 881                 break;
 882         case FLASH_CFI_32BIT:
 883                 debug ("is= %8.8lx %8.8lx\n", cptr.lp[0], cword.l);
 884                 retval = (cptr.lp[0] == cword.l);
 885                 break;
 886         case FLASH_CFI_64BIT:
 887 #ifdef DEBUG
 888                 {
 889                         char str1[20];
 890                         char str2[20];
 891
 892                         print_longlong (str1, cptr.llp[0]);
 893                         print_longlong (str2, cword.ll);
 894                         debug ("is= %s %s\n", str1, str2);
 895                 }
 896 #endif
 897                 retval = (cptr.llp[0] == cword.ll);
 898                 break;
 899         default:
 900                 retval = 0;
 901                 break;
 902         }
 903         return retval;
 904 }
 905
 906 /*-----------------------------------------------------------------------
 907  */
 908 static int flash_isset (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
 909 {
 910         cfiptr_t cptr;
 911         cfiword_t cword;
 912         int retval;
 913
 914         cptr.cp = flash_make_addr (info, sect, offset);
 915         flash_make_cmd (info, cmd, &cword);
 916         switch (info->portwidth) {
 917         case FLASH_CFI_8BIT:
 918                 retval = ((cptr.cp[0] & cword.c) == cword.c);
 919                 break;
 920         case FLASH_CFI_16BIT:
 921                 retval = ((cptr.wp[0] & cword.w) == cword.w);
 922                 break;
 923         case FLASH_CFI_32BIT:
 924                 retval = ((cptr.lp[0] & cword.l) == cword.l);
 925                 break;
 926         case FLASH_CFI_64BIT:
 927                 retval = ((cptr.llp[0] & cword.ll) == cword.ll);
 928                 break;
 929         default:
 930                 retval = 0;
 931                 break;
 932         }
 933         return retval;
 934 }
 935
 936 /*-----------------------------------------------------------------------
 937  */
 938 static int flash_toggle (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
 939 {
 940         cfiptr_t cptr;
 941         cfiword_t cword;
 942         int retval;
 943
 944         cptr.cp = flash_make_addr (info, sect, offset);
 945         flash_make_cmd (info, cmd, &cword);
 946         switch (info->portwidth) {
 947         case FLASH_CFI_8BIT:
 948                 retval = ((cptr.cp[0] & cword.c) != (cptr.cp[0] & cword.c));
 949                 break;
 950         case FLASH_CFI_16BIT:
 951                 retval = ((cptr.wp[0] & cword.w) != (cptr.wp[0] & cword.w));
 952                 break;
 953         case FLASH_CFI_32BIT:
 954                 retval = ((cptr.lp[0] & cword.l) != (cptr.lp[0] & cword.l));
 955                 break;
 956         case FLASH_CFI_64BIT:
 957                 retval = ((cptr.llp[0] & cword.ll) !=
 958                           (cptr.llp[0] & cword.ll));
 959                 break;
 960         default:
 961                 retval = 0;
 962                 break;
 963         }
 964         return retval;
 965 }
 966
 967 /*-----------------------------------------------------------------------
 968  * detect if flash is compatible with the Common Flash Interface (CFI)
 969  * http://www.jedec.org/download/search/jesd68.pdf
 970  *
 971 */
 972 static int flash_detect_cfi (flash_info_t * info)
 973 {
 974         debug ("flash detect cfi\n");
 975
 976         for (info->portwidth = FLASH_CFI_8BIT;
 977              info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
 978                 for (info->chipwidth = FLASH_CFI_BY8;
 979                      info->chipwidth <= info->portwidth;
 980                      info->chipwidth <<= 1) {
 981                         flash_write_cmd (info, 0, 0, FLASH_CMD_RESET);
 982                         flash_write_cmd (info, 0, FLASH_OFFSET_CFI, FLASH_CMD_CFI);
 983                         if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
 984                             && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
 985                             && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
 986                                 info->interface = flash_read_ushort (info, 0, FLASH_OFFSET_INTERFACE);
 987                                 debug ("device interface is %d\n",
 988                                        info->interface);
 989                                 debug ("found port %d chip %d ",
 990                                        info->portwidth, info->chipwidth);
 991                                 debug ("port %d bits chip %d bits\n",
 992                                        info->portwidth << CFI_FLASH_SHIFT_WIDTH,
 993                                        info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 994                                 return 1;
 995                         }
 996                 }
 997         }
 998         debug ("not found\n");
 999         return 0;
1000 }
1001
1002 /*
1003  * The following code cannot be run from FLASH!
1004  *
1005  */
1006 static ulong flash_get_size (ulong base, int banknum)
1007 {
1008         flash_info_t *info = &flash_info[banknum];
1009         int i, j;
1010         flash_sect_t sect_cnt;
1011         unsigned long sector;
1012         unsigned long tmp;
1013         int size_ratio;
1014         uchar num_erase_regions;
1015         int erase_region_size;
1016         int erase_region_count;
1017
1018         info->start[0] = base;
1019
1020         if (flash_detect_cfi (info)) {
1021                 info->vendor = flash_read_ushort (info, 0, FLASH_OFFSET_PRIMARY_VENDOR);
1022 #ifdef DEBUG
1023                 flash_printqry (info, 0);
1024 #endif
1025                 switch (info->vendor) {
1026                 case CFI_CMDSET_INTEL_STANDARD:
1027                 case CFI_CMDSET_INTEL_EXTENDED:
1028                 default:
1029                         info->cmd_reset = FLASH_CMD_RESET;
1030                         break;
1031                 case CFI_CMDSET_AMD_STANDARD:
1032                 case CFI_CMDSET_AMD_EXTENDED:
1033                         info->cmd_reset = AMD_CMD_RESET;
1034                         break;
1035                 }
1036
1037                 debug ("manufacturer is %d\n", info->vendor);
1038                 size_ratio = info->portwidth / info->chipwidth;
1039                 /* if the chip is x8/x16 reduce the ratio by half */
1040                 if ((info->interface == FLASH_CFI_X8X16)
1041                     && (info->chipwidth == FLASH_CFI_BY8)) {
1042                         size_ratio >>= 1;
1043                 }
1044                 num_erase_regions = flash_read_uchar (info, FLASH_OFFSET_NUM_ERASE_REGIONS);
1045                 debug ("size_ratio %d port %d bits chip %d bits\n",
1046                        size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1047                        info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1048                 debug ("found %d erase regions\n", num_erase_regions);
1049                 sect_cnt = 0;
1050                 sector = base;
1051                 for (i = 0; i < num_erase_regions; i++) {
1052                         if (i > NUM_ERASE_REGIONS) {
1053                                 printf ("%d erase regions found, only %d used\n",
1054                                         num_erase_regions, NUM_ERASE_REGIONS);
1055                                 break;
1056                         }
1057                         tmp = flash_read_long (info, 0,
1058                                                FLASH_OFFSET_ERASE_REGIONS +
1059                                                i * 4);
1060                         erase_region_size =
1061                                 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
1062                         tmp >>= 16;
1063                         erase_region_count = (tmp & 0xffff) + 1;
1064                         debug ("erase_region_count = %d erase_region_size = %d\n",
1065                                 erase_region_count, erase_region_size);
1066                         for (j = 0; j < erase_region_count; j++) {
1067                                 info->start[sect_cnt] = sector;
1068                                 sector += (erase_region_size * size_ratio);
1069
1070                                 /*
1071                                  * Only read protection status from supported devices (intel...)
1072                                  */
1073                                 switch (info->vendor) {
1074                                 case CFI_CMDSET_INTEL_EXTENDED:
1075                                 case CFI_CMDSET_INTEL_STANDARD:
1076                                         info->protect[sect_cnt] =
1077                                                 flash_isset (info, sect_cnt,
1078                                                              FLASH_OFFSET_PROTECT,
1079                                                              FLASH_STATUS_PROTECT);
1080                                         break;
1081                                 default:
1082                                         info->protect[sect_cnt] = 0; /* default: not protected */
1083                                 }
1084
1085                                 sect_cnt++;
1086                         }
1087                 }
1088
1089                 info->sector_count = sect_cnt;
1090                 /* multiply the size by the number of chips */
1091                 info->size = (1 << flash_read_uchar (info, FLASH_OFFSET_SIZE)) * size_ratio;
1092                 info->buffer_size = (1 << flash_read_ushort (info, 0, FLASH_OFFSET_BUFFER_SIZE));
1093                 tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_ETOUT);
1094                 info->erase_blk_tout = (tmp * (1 << flash_read_uchar (info, FLASH_OFFSET_EMAX_TOUT)));
1095                 tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_WBTOUT);
1096                 info->buffer_write_tout = (tmp * (1 << flash_read_uchar (info, FLASH_OFFSET_WBMAX_TOUT)));
1097                 tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_WTOUT);
1098                 info->write_tout = (tmp * (1 << flash_read_uchar (info, FLASH_OFFSET_WMAX_TOUT))) / 1000;
1099                 info->flash_id = FLASH_MAN_CFI;
1100                 if ((info->interface == FLASH_CFI_X8X16) && (info->chipwidth == FLASH_CFI_BY8)) {
1101                         info->portwidth >>= 1;  /* XXX - Need to test on x8/x16 in parallel. */
1102                 }
1103         }
1104
1105         flash_write_cmd (info, 0, 0, FLASH_CMD_RESET);
1106         return (info->size);
1107 }
1108
1109
1110 /*-----------------------------------------------------------------------
1111  */
1112 static int flash_write_cfiword (flash_info_t * info, ulong dest,
1113                                 cfiword_t cword)
1114 {
1115
1116         cfiptr_t ctladdr;
1117         cfiptr_t cptr;
1118         int flag;
1119
1120         ctladdr.cp = flash_make_addr (info, 0, 0);
1121         cptr.cp = (uchar *) dest;
1122
1123
1124         /* Check if Flash is (sufficiently) erased */
1125         switch (info->portwidth) {
1126         case FLASH_CFI_8BIT:
1127                 flag = ((cptr.cp[0] & cword.c) == cword.c);
1128                 break;
1129         case FLASH_CFI_16BIT:
1130                 flag = ((cptr.wp[0] & cword.w) == cword.w);
1131                 break;
1132         case FLASH_CFI_32BIT:
1133                 flag = ((cptr.lp[0] & cword.l) == cword.l);
1134                 break;
1135         case FLASH_CFI_64BIT:
1136                 flag = ((cptr.llp[0] & cword.ll) == cword.ll);
1137                 break;
1138         default:
1139                 return 2;
1140         }
1141         if (!flag)
1142                 return 2;
1143
1144         /* Disable interrupts which might cause a timeout here */
1145         flag = disable_interrupts ();
1146
1147         switch (info->vendor) {
1148         case CFI_CMDSET_INTEL_EXTENDED:
1149         case CFI_CMDSET_INTEL_STANDARD:
1150                 flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
1151                 flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
1152                 break;
1153         case CFI_CMDSET_AMD_EXTENDED:
1154         case CFI_CMDSET_AMD_STANDARD:
1155                 flash_unlock_seq (info, 0);
1156                 flash_write_cmd (info, 0, AMD_ADDR_START, AMD_CMD_WRITE);
1157                 break;
1158         }
1159
1160         switch (info->portwidth) {
1161         case FLASH_CFI_8BIT:
1162                 cptr.cp[0] = cword.c;
1163                 break;
1164         case FLASH_CFI_16BIT:
1165                 cptr.wp[0] = cword.w;
1166                 break;
1167         case FLASH_CFI_32BIT:
1168                 cptr.lp[0] = cword.l;
1169                 break;
1170         case FLASH_CFI_64BIT:
1171                 cptr.llp[0] = cword.ll;
1172                 break;
1173         }
1174
1175         /* re-enable interrupts if necessary */
1176         if (flag)
1177                 enable_interrupts ();
1178
1179         return flash_full_status_check (info, 0, info->write_tout, "write");
1180 }
1181
1182 #ifdef CFG_FLASH_USE_BUFFER_WRITE
1183
1184 /* loop through the sectors from the highest address
1185  * when the passed address is greater or equal to the sector address
1186  * we have a match
1187  */
1188 static flash_sect_t find_sector (flash_info_t * info, ulong addr)
1189 {
1190         flash_sect_t sector;
1191
1192         for (sector = info->sector_count - 1; sector >= 0; sector--) {
1193                 if (addr >= info->start[sector])
1194                         break;
1195         }
1196         return sector;
1197 }
1198
1199 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
1200                                   int len)
1201 {
1202         flash_sect_t sector;
1203         int cnt;
1204         int retcode;
1205         volatile cfiptr_t src;
1206         volatile cfiptr_t dst;
1207         /* buffered writes in the AMD chip set is not supported yet */
1208         if((info->vendor ==  CFI_CMDSET_AMD_STANDARD) ||
1209                 (info->vendor == CFI_CMDSET_AMD_EXTENDED))
1210                 return ERR_INVAL;
1211
1212         src.cp = cp;
1213         dst.cp = (uchar *) dest;
1214         sector = find_sector (info, dest);
1215         flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1216         flash_write_cmd (info, sector, 0, FLASH_CMD_WRITE_TO_BUFFER);
1217         if ((retcode =
1218              flash_status_check (info, sector, info->buffer_write_tout,
1219                                  "write to buffer")) == ERR_OK) {
1220                 /* reduce the number of loops by the width of the port  */
1221                 switch (info->portwidth) {
1222                 case FLASH_CFI_8BIT:
1223                         cnt = len;
1224                         break;
1225                 case FLASH_CFI_16BIT:
1226                         cnt = len >> 1;
1227                         break;
1228                 case FLASH_CFI_32BIT:
1229                         cnt = len >> 2;
1230                         break;
1231                 case FLASH_CFI_64BIT:
1232                         cnt = len >> 3;
1233                         break;
1234                 default:
1235                         return ERR_INVAL;
1236                         break;
1237                 }
1238                 flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
1239                 while (cnt-- > 0) {
1240                         switch (info->portwidth) {
1241                         case FLASH_CFI_8BIT:
1242                                 *dst.cp++ = *src.cp++;
1243                                 break;
1244                         case FLASH_CFI_16BIT:
1245                                 *dst.wp++ = *src.wp++;
1246                                 break;
1247                         case FLASH_CFI_32BIT:
1248                                 *dst.lp++ = *src.lp++;
1249                                 break;
1250                         case FLASH_CFI_64BIT:
1251                                 *dst.llp++ = *src.llp++;
1252                                 break;
1253                         default:
1254                                 return ERR_INVAL;
1255                                 break;
1256                         }
1257                 }
1258                 flash_write_cmd (info, sector, 0,
1259                                  FLASH_CMD_WRITE_BUFFER_CONFIRM);
1260                 retcode =
1261                         flash_full_status_check (info, sector,
1262                                                  info->buffer_write_tout,
1263                                                  "buffer write");
1264         }
1265         flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1266         return retcode;
1267 }
1268 #endif /* CFG_FLASH_USE_BUFFER_WRITE */
1269 #endif /* CFG_FLASH_CFI */