1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2019 Andes Technology Corporation
4 * Rick Chen, Andes Technology Corporation <rick@andestech.com>
13 #include <dm/ofnode.h>
14 #include <linux/bitops.h>
17 volatile u64 configure;
23 volatile u64 error_status;
24 volatile u64 ecc_error;
25 volatile u64 cctl_command0;
26 volatile u64 cctl_access_line0;
27 volatile u64 cctl_command1;
28 volatile u64 cctl_access_line1;
29 volatile u64 cctl_command2;
30 volatile u64 cctl_access_line2;
31 volatile u64 cctl_command3;
32 volatile u64 cctl_access_line4;
33 volatile u64 cctl_status;
36 /* Control Register */
39 #define IPREPETCH_OFF 3
40 #define DPREPETCH_OFF 5
41 #define IPREPETCH_MSK (3 << IPREPETCH_OFF)
42 #define DPREPETCH_MSK (3 << DPREPETCH_OFF)
44 #define TRAMOCTL_OFF 8
45 #define TRAMICTL_OFF 10
46 #define TRAMOCTL_MSK (3 << TRAMOCTL_OFF)
47 #define TRAMICTL_MSK BIT(TRAMICTL_OFF)
49 #define DRAMOCTL_OFF 11
50 #define DRAMICTL_OFF 13
51 #define DRAMOCTL_MSK (3 << DRAMOCTL_OFF)
52 #define DRAMICTL_MSK BIT(DRAMICTL_OFF)
54 /* CCTL Command Register */
55 #define CCTL_CMD_REG(base, hart) ((ulong)(base) + 0x40 + (hart) * 0x10)
56 #define L2_WBINVAL_ALL 0x12
58 /* CCTL Status Register */
59 #define CCTL_STATUS_MSK(hart) (0xf << ((hart) * 4))
60 #define CCTL_STATUS_IDLE(hart) (0 << ((hart) * 4))
61 #define CCTL_STATUS_PROCESS(hart) (1 << ((hart) * 4))
62 #define CCTL_STATUS_ILLEGAL(hart) (2 << ((hart) * 4))
64 DECLARE_GLOBAL_DATA_PTR;
74 static int v5l2_enable(struct udevice *dev)
76 struct v5l2_plat *plat = dev_get_platdata(dev);
77 volatile struct l2cache *regs = plat->regs;
80 setbits_le32(®s->control, L2_ENABLE);
85 static int v5l2_disable(struct udevice *dev)
87 struct v5l2_plat *plat = dev_get_platdata(dev);
88 volatile struct l2cache *regs = plat->regs;
89 u8 hart = gd->arch.boot_hart;
90 void __iomem *cctlcmd = (void __iomem *)CCTL_CMD_REG(regs, hart);
92 if ((regs) && (readl(®s->control) & L2_ENABLE)) {
93 writel(L2_WBINVAL_ALL, cctlcmd);
95 while ((readl(®s->cctl_status) & CCTL_STATUS_MSK(hart))) {
96 if ((readl(®s->cctl_status) & CCTL_STATUS_ILLEGAL(hart))) {
97 printf("L2 flush illegal! hanging...");
101 clrbits_le32(®s->control, L2_ENABLE);
107 static int v5l2_ofdata_to_platdata(struct udevice *dev)
109 struct v5l2_plat *plat = dev_get_platdata(dev);
110 struct l2cache *regs;
112 regs = (struct l2cache *)dev_read_addr(dev);
115 plat->iprefetch = -EINVAL;
116 plat->dprefetch = -EINVAL;
117 plat->tram_ctl[0] = -EINVAL;
118 plat->dram_ctl[0] = -EINVAL;
120 /* Instruction and data fetch prefetch depth */
121 dev_read_u32(dev, "andes,inst-prefetch", &plat->iprefetch);
122 dev_read_u32(dev, "andes,data-prefetch", &plat->dprefetch);
124 /* Set tag RAM and data RAM setup and output cycle */
125 dev_read_u32_array(dev, "andes,tag-ram-ctl", plat->tram_ctl, 2);
126 dev_read_u32_array(dev, "andes,data-ram-ctl", plat->dram_ctl, 2);
131 static int v5l2_probe(struct udevice *dev)
133 struct v5l2_plat *plat = dev_get_platdata(dev);
134 struct l2cache *regs = plat->regs;
137 ctl_val = readl(®s->control);
139 if (!(ctl_val & L2_ENABLE))
140 ctl_val |= L2_ENABLE;
142 if (plat->iprefetch != -EINVAL) {
143 ctl_val &= ~(IPREPETCH_MSK);
144 ctl_val |= (plat->iprefetch << IPREPETCH_OFF);
147 if (plat->dprefetch != -EINVAL) {
148 ctl_val &= ~(DPREPETCH_MSK);
149 ctl_val |= (plat->dprefetch << DPREPETCH_OFF);
152 if (plat->tram_ctl[0] != -EINVAL) {
153 ctl_val &= ~(TRAMOCTL_MSK | TRAMICTL_MSK);
154 ctl_val |= plat->tram_ctl[0] << TRAMOCTL_OFF;
155 ctl_val |= plat->tram_ctl[1] << TRAMICTL_OFF;
158 if (plat->dram_ctl[0] != -EINVAL) {
159 ctl_val &= ~(DRAMOCTL_MSK | DRAMICTL_MSK);
160 ctl_val |= plat->dram_ctl[0] << DRAMOCTL_OFF;
161 ctl_val |= plat->dram_ctl[1] << DRAMICTL_OFF;
164 writel(ctl_val, ®s->control);
169 static const struct udevice_id v5l2_cache_ids[] = {
170 { .compatible = "v5l2cache" },
174 static const struct cache_ops v5l2_cache_ops = {
175 .enable = v5l2_enable,
176 .disable = v5l2_disable,
179 U_BOOT_DRIVER(v5l2_cache) = {
180 .name = "v5l2_cache",
182 .of_match = v5l2_cache_ids,
183 .ofdata_to_platdata = v5l2_ofdata_to_platdata,
185 .platdata_auto_alloc_size = sizeof(struct v5l2_plat),
186 .ops = &v5l2_cache_ops,
187 .flags = DM_FLAG_PRE_RELOC,