drivers/bus/sunxi-rsb.c

   1 /*
   2  * RSB (Reduced Serial Bus) driver.
   3  *
   4  * Author: Chen-Yu Tsai <wens@csie.org>
   5  *
   6  * This file is licensed under the terms of the GNU General Public License
   7  * version 2.  This program is licensed "as is" without any warranty of any
   8  * kind, whether express or implied.
   9  *
  10  * The RSB controller looks like an SMBus controller which only supports
  11  * byte and word data transfers. But, it differs from standard SMBus
  12  * protocol on several aspects:
  13  * - it uses addresses set at runtime to address slaves. Runtime addresses
  14  *   are sent to slaves using their 12bit hardware addresses. Up to 15
  15  *   runtime addresses are available.
  16  * - it adds a parity bit every 8bits of data and address for read and
  17  *   write accesses; this replaces the ack bit
  18  * - only one read access is required to read a byte (instead of a write
  19  *   followed by a read access in standard SMBus protocol)
  20  * - there's no Ack bit after each read access
  21  *
  22  * This means this bus cannot be used to interface with standard SMBus
  23  * devices. Devices known to support this interface include the AXP223,
  24  * AXP809, and AXP806 PMICs, and the AC100 audio codec, all from X-Powers.
  25  *
  26  * A description of the operation and wire protocol can be found in the
  27  * RSB section of Allwinner's A80 user manual, which can be found at
  28  *
  29  *     https://github.com/allwinner-zh/documents/tree/master/A80
  30  *
  31  * This document is officially released by Allwinner.
  32  *
  33  * This driver is based on i2c-sun6i-p2wi.c, the P2WI bus driver.
  34  *
  35  */
  36
  37 #include <linux/clk.h>
  38 #include <linux/clk/clk-conf.h>
  39 #include <linux/device.h>
  40 #include <linux/interrupt.h>
  41 #include <linux/io.h>
  42 #include <linux/iopoll.h>
  43 #include <linux/module.h>
  44 #include <linux/of.h>
  45 #include <linux/of_irq.h>
  46 #include <linux/of_platform.h>
  47 #include <linux/platform_device.h>
  48 #include <linux/pm.h>
  49 #include <linux/pm_runtime.h>
  50 #include <linux/regmap.h>
  51 #include <linux/reset.h>
  52 #include <linux/slab.h>
  53 #include <linux/sunxi-rsb.h>
  54 #include <linux/types.h>
  55
  56 /* RSB registers */
  57 #define RSB_CTRL        0x0     /* Global control */
  58 #define RSB_CCR         0x4     /* Clock control */
  59 #define RSB_INTE        0x8     /* Interrupt controls */
  60 #define RSB_INTS        0xc     /* Interrupt status */
  61 #define RSB_ADDR        0x10    /* Address to send with read/write command */
  62 #define RSB_DATA        0x1c    /* Data to read/write */
  63 #define RSB_LCR         0x24    /* Line control */
  64 #define RSB_DMCR        0x28    /* Device mode (init) control */
  65 #define RSB_CMD         0x2c    /* RSB Command */
  66 #define RSB_DAR         0x30    /* Device address / runtime address */
  67
  68 /* CTRL fields */
  69 #define RSB_CTRL_START_TRANS            BIT(7)
  70 #define RSB_CTRL_ABORT_TRANS            BIT(6)
  71 #define RSB_CTRL_GLOBAL_INT_ENB         BIT(1)
  72 #define RSB_CTRL_SOFT_RST               BIT(0)
  73
  74 /* CLK CTRL fields */
  75 #define RSB_CCR_SDA_OUT_DELAY(v)        (((v) & 0x7) << 8)
  76 #define RSB_CCR_MAX_CLK_DIV             0xff
  77 #define RSB_CCR_CLK_DIV(v)              ((v) & RSB_CCR_MAX_CLK_DIV)
  78
  79 /* STATUS fields */
  80 #define RSB_INTS_TRANS_ERR_ACK          BIT(16)
  81 #define RSB_INTS_TRANS_ERR_DATA_BIT(v)  (((v) >> 8) & 0xf)
  82 #define RSB_INTS_TRANS_ERR_DATA         GENMASK(11, 8)
  83 #define RSB_INTS_LOAD_BSY               BIT(2)
  84 #define RSB_INTS_TRANS_ERR              BIT(1)
  85 #define RSB_INTS_TRANS_OVER             BIT(0)
  86
  87 /* LINE CTRL fields*/
  88 #define RSB_LCR_SCL_STATE               BIT(5)
  89 #define RSB_LCR_SDA_STATE               BIT(4)
  90 #define RSB_LCR_SCL_CTL                 BIT(3)
  91 #define RSB_LCR_SCL_CTL_EN              BIT(2)
  92 #define RSB_LCR_SDA_CTL                 BIT(1)
  93 #define RSB_LCR_SDA_CTL_EN              BIT(0)
  94
  95 /* DEVICE MODE CTRL field values */
  96 #define RSB_DMCR_DEVICE_START           BIT(31)
  97 #define RSB_DMCR_MODE_DATA              (0x7c << 16)
  98 #define RSB_DMCR_MODE_REG               (0x3e << 8)
  99 #define RSB_DMCR_DEV_ADDR               0x00
 100
 101 /* CMD values */
 102 #define RSB_CMD_RD8                     0x8b
 103 #define RSB_CMD_RD16                    0x9c
 104 #define RSB_CMD_RD32                    0xa6
 105 #define RSB_CMD_WR8                     0x4e
 106 #define RSB_CMD_WR16                    0x59
 107 #define RSB_CMD_WR32                    0x63
 108 #define RSB_CMD_STRA                    0xe8
 109
 110 /* DAR fields */
 111 #define RSB_DAR_RTA(v)                  (((v) & 0xff) << 16)
 112 #define RSB_DAR_DA(v)                   ((v) & 0xffff)
 113
 114 #define RSB_MAX_FREQ                    20000000
 115
 116 #define RSB_CTRL_NAME                   "sunxi-rsb"
 117
 118 struct sunxi_rsb_addr_map {
 119         u16 hwaddr;
 120         u8 rtaddr;
 121 };
 122
 123 struct sunxi_rsb {
 124         struct device *dev;
 125         void __iomem *regs;
 126         struct clk *clk;
 127         struct reset_control *rstc;
 128         struct completion complete;
 129         struct mutex lock;
 130         unsigned int status;
 131         u32 clk_freq;
 132 };
 133
 134 /* bus / slave device related functions */
 135 static struct bus_type sunxi_rsb_bus;
 136
 137 static int sunxi_rsb_device_match(struct device *dev, struct device_driver *drv)
 138 {
 139         return of_driver_match_device(dev, drv);
 140 }
 141
 142 static int sunxi_rsb_device_probe(struct device *dev)
 143 {
 144         const struct sunxi_rsb_driver *drv = to_sunxi_rsb_driver(dev->driver);
 145         struct sunxi_rsb_device *rdev = to_sunxi_rsb_device(dev);
 146         int ret;
 147
 148         if (!drv->probe)
 149                 return -ENODEV;
 150
 151         if (!rdev->irq) {
 152                 int irq = -ENOENT;
 153
 154                 if (dev->of_node)
 155                         irq = of_irq_get(dev->of_node, 0);
 156
 157                 if (irq == -EPROBE_DEFER)
 158                         return irq;
 159                 if (irq < 0)
 160                         irq = 0;
 161
 162                 rdev->irq = irq;
 163         }
 164
 165         ret = of_clk_set_defaults(dev->of_node, false);
 166         if (ret < 0)
 167                 return ret;
 168
 169         return drv->probe(rdev);
 170 }
 171
 172 static int sunxi_rsb_device_remove(struct device *dev)
 173 {
 174         const struct sunxi_rsb_driver *drv = to_sunxi_rsb_driver(dev->driver);
 175
 176         drv->remove(to_sunxi_rsb_device(dev));
 177
 178         return 0;
 179 }
 180
 181 static struct bus_type sunxi_rsb_bus = {
 182         .name           = RSB_CTRL_NAME,
 183         .match          = sunxi_rsb_device_match,
 184         .probe          = sunxi_rsb_device_probe,
 185         .remove         = sunxi_rsb_device_remove,
 186         .uevent         = of_device_uevent_modalias,
 187 };
 188
 189 static void sunxi_rsb_dev_release(struct device *dev)
 190 {
 191         struct sunxi_rsb_device *rdev = to_sunxi_rsb_device(dev);
 192
 193         kfree(rdev);
 194 }
 195
 196 /**
 197  * sunxi_rsb_device_create() - allocate and add an RSB device
 198  * @rsb:        RSB controller
 199  * @node:       RSB slave device node
 200  * @hwaddr:     RSB slave hardware address
 201  * @rtaddr:     RSB slave runtime address
 202  */
 203 static struct sunxi_rsb_device *sunxi_rsb_device_create(struct sunxi_rsb *rsb,
 204                 struct device_node *node, u16 hwaddr, u8 rtaddr)
 205 {
 206         int err;
 207         struct sunxi_rsb_device *rdev;
 208
 209         rdev = kzalloc(sizeof(*rdev), GFP_KERNEL);
 210         if (!rdev)
 211                 return ERR_PTR(-ENOMEM);
 212
 213         rdev->rsb = rsb;
 214         rdev->hwaddr = hwaddr;
 215         rdev->rtaddr = rtaddr;
 216         rdev->dev.bus = &sunxi_rsb_bus;
 217         rdev->dev.parent = rsb->dev;
 218         rdev->dev.of_node = node;
 219         rdev->dev.release = sunxi_rsb_dev_release;
 220
 221         dev_set_name(&rdev->dev, "%s-%x", RSB_CTRL_NAME, hwaddr);
 222
 223         err = device_register(&rdev->dev);
 224         if (err < 0) {
 225                 dev_err(&rdev->dev, "Can't add %s, status %d\n",
 226                         dev_name(&rdev->dev), err);
 227                 goto err_device_add;
 228         }
 229
 230         dev_dbg(&rdev->dev, "device %s registered\n", dev_name(&rdev->dev));
 231
 232 err_device_add:
 233         put_device(&rdev->dev);
 234
 235         return ERR_PTR(err);
 236 }
 237
 238 /**
 239  * sunxi_rsb_device_unregister(): unregister an RSB device
 240  * @rdev:       rsb_device to be removed
 241  */
 242 static void sunxi_rsb_device_unregister(struct sunxi_rsb_device *rdev)
 243 {
 244         device_unregister(&rdev->dev);
 245 }
 246
 247 static int sunxi_rsb_remove_devices(struct device *dev, void *data)
 248 {
 249         struct sunxi_rsb_device *rdev = to_sunxi_rsb_device(dev);
 250
 251         if (dev->bus == &sunxi_rsb_bus)
 252                 sunxi_rsb_device_unregister(rdev);
 253
 254         return 0;
 255 }
 256
 257 /**
 258  * sunxi_rsb_driver_register() - Register device driver with RSB core
 259  * @rdrv:       device driver to be associated with slave-device.
 260  *
 261  * This API will register the client driver with the RSB framework.
 262  * It is typically called from the driver's module-init function.
 263  */
 264 int sunxi_rsb_driver_register(struct sunxi_rsb_driver *rdrv)
 265 {
 266         rdrv->driver.bus = &sunxi_rsb_bus;
 267         return driver_register(&rdrv->driver);
 268 }
 269 EXPORT_SYMBOL_GPL(sunxi_rsb_driver_register);
 270
 271 /* common code that starts a transfer */
 272 static int _sunxi_rsb_run_xfer(struct sunxi_rsb *rsb)
 273 {
 274         if (readl(rsb->regs + RSB_CTRL) & RSB_CTRL_START_TRANS) {
 275                 dev_dbg(rsb->dev, "RSB transfer still in progress\n");
 276                 return -EBUSY;
 277         }
 278
 279         reinit_completion(&rsb->complete);
 280
 281         writel(RSB_INTS_LOAD_BSY | RSB_INTS_TRANS_ERR | RSB_INTS_TRANS_OVER,
 282                rsb->regs + RSB_INTE);
 283         writel(RSB_CTRL_START_TRANS | RSB_CTRL_GLOBAL_INT_ENB,
 284                rsb->regs + RSB_CTRL);
 285
 286         if (!wait_for_completion_io_timeout(&rsb->complete,
 287                                             msecs_to_jiffies(100))) {
 288                 dev_dbg(rsb->dev, "RSB timeout\n");
 289
 290                 /* abort the transfer */
 291                 writel(RSB_CTRL_ABORT_TRANS, rsb->regs + RSB_CTRL);
 292
 293                 /* clear any interrupt flags */
 294                 writel(readl(rsb->regs + RSB_INTS), rsb->regs + RSB_INTS);
 295
 296                 return -ETIMEDOUT;
 297         }
 298
 299         if (rsb->status & RSB_INTS_LOAD_BSY) {
 300                 dev_dbg(rsb->dev, "RSB busy\n");
 301                 return -EBUSY;
 302         }
 303
 304         if (rsb->status & RSB_INTS_TRANS_ERR) {
 305                 if (rsb->status & RSB_INTS_TRANS_ERR_ACK) {
 306                         dev_dbg(rsb->dev, "RSB slave nack\n");
 307                         return -EINVAL;
 308                 }
 309
 310                 if (rsb->status & RSB_INTS_TRANS_ERR_DATA) {
 311                         dev_dbg(rsb->dev, "RSB transfer data error\n");
 312                         return -EIO;
 313                 }
 314         }
 315
 316         return 0;
 317 }
 318
 319 static int sunxi_rsb_read(struct sunxi_rsb *rsb, u8 rtaddr, u8 addr,
 320                           u32 *buf, size_t len)
 321 {
 322         u32 cmd;
 323         int ret;
 324
 325         if (!buf)
 326                 return -EINVAL;
 327
 328         switch (len) {
 329         case 1:
 330                 cmd = RSB_CMD_RD8;
 331                 break;
 332         case 2:
 333                 cmd = RSB_CMD_RD16;
 334                 break;
 335         case 4:
 336                 cmd = RSB_CMD_RD32;
 337                 break;
 338         default:
 339                 dev_err(rsb->dev, "Invalid access width: %zd\n", len);
 340                 return -EINVAL;
 341         }
 342
 343         ret = pm_runtime_resume_and_get(rsb->dev);
 344         if (ret)
 345                 return ret;
 346
 347         mutex_lock(&rsb->lock);
 348
 349         writel(addr, rsb->regs + RSB_ADDR);
 350         writel(RSB_DAR_RTA(rtaddr), rsb->regs + RSB_DAR);
 351         writel(cmd, rsb->regs + RSB_CMD);
 352
 353         ret = _sunxi_rsb_run_xfer(rsb);
 354         if (ret)
 355                 goto unlock;
 356
 357         *buf = readl(rsb->regs + RSB_DATA) & GENMASK(len * 8 - 1, 0);
 358
 359 unlock:
 360         mutex_unlock(&rsb->lock);
 361
 362         pm_runtime_mark_last_busy(rsb->dev);
 363         pm_runtime_put_autosuspend(rsb->dev);
 364
 365         return ret;
 366 }
 367
 368 static int sunxi_rsb_write(struct sunxi_rsb *rsb, u8 rtaddr, u8 addr,
 369                            const u32 *buf, size_t len)
 370 {
 371         u32 cmd;
 372         int ret;
 373
 374         if (!buf)
 375                 return -EINVAL;
 376
 377         switch (len) {
 378         case 1:
 379                 cmd = RSB_CMD_WR8;
 380                 break;
 381         case 2:
 382                 cmd = RSB_CMD_WR16;
 383                 break;
 384         case 4:
 385                 cmd = RSB_CMD_WR32;
 386                 break;
 387         default:
 388                 dev_err(rsb->dev, "Invalid access width: %zd\n", len);
 389                 return -EINVAL;
 390         }
 391
 392         ret = pm_runtime_resume_and_get(rsb->dev);
 393         if (ret)
 394                 return ret;
 395
 396         mutex_lock(&rsb->lock);
 397
 398         writel(addr, rsb->regs + RSB_ADDR);
 399         writel(RSB_DAR_RTA(rtaddr), rsb->regs + RSB_DAR);
 400         writel(*buf, rsb->regs + RSB_DATA);
 401         writel(cmd, rsb->regs + RSB_CMD);
 402         ret = _sunxi_rsb_run_xfer(rsb);
 403
 404         mutex_unlock(&rsb->lock);
 405
 406         pm_runtime_mark_last_busy(rsb->dev);
 407         pm_runtime_put_autosuspend(rsb->dev);
 408
 409         return ret;
 410 }
 411
 412 /* RSB regmap functions */
 413 struct sunxi_rsb_ctx {
 414         struct sunxi_rsb_device *rdev;
 415         int size;
 416 };
 417
 418 static int regmap_sunxi_rsb_reg_read(void *context, unsigned int reg,
 419                                      unsigned int *val)
 420 {
 421         struct sunxi_rsb_ctx *ctx = context;
 422         struct sunxi_rsb_device *rdev = ctx->rdev;
 423
 424         if (reg > 0xff)
 425                 return -EINVAL;
 426
 427         return sunxi_rsb_read(rdev->rsb, rdev->rtaddr, reg, val, ctx->size);
 428 }
 429
 430 static int regmap_sunxi_rsb_reg_write(void *context, unsigned int reg,
 431                                       unsigned int val)
 432 {
 433         struct sunxi_rsb_ctx *ctx = context;
 434         struct sunxi_rsb_device *rdev = ctx->rdev;
 435
 436         return sunxi_rsb_write(rdev->rsb, rdev->rtaddr, reg, &val, ctx->size);
 437 }
 438
 439 static void regmap_sunxi_rsb_free_ctx(void *context)
 440 {
 441         struct sunxi_rsb_ctx *ctx = context;
 442
 443         kfree(ctx);
 444 }
 445
 446 static struct regmap_bus regmap_sunxi_rsb = {
 447         .reg_write = regmap_sunxi_rsb_reg_write,
 448         .reg_read = regmap_sunxi_rsb_reg_read,
 449         .free_context = regmap_sunxi_rsb_free_ctx,
 450         .reg_format_endian_default = REGMAP_ENDIAN_NATIVE,
 451         .val_format_endian_default = REGMAP_ENDIAN_NATIVE,
 452 };
 453
 454 static struct sunxi_rsb_ctx *regmap_sunxi_rsb_init_ctx(struct sunxi_rsb_device *rdev,
 455                 const struct regmap_config *config)
 456 {
 457         struct sunxi_rsb_ctx *ctx;
 458
 459         switch (config->val_bits) {
 460         case 8:
 461         case 16:
 462         case 32:
 463                 break;
 464         default:
 465                 return ERR_PTR(-EINVAL);
 466         }
 467
 468         ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
 469         if (!ctx)
 470                 return ERR_PTR(-ENOMEM);
 471
 472         ctx->rdev = rdev;
 473         ctx->size = config->val_bits / 8;
 474
 475         return ctx;
 476 }
 477
 478 struct regmap *__devm_regmap_init_sunxi_rsb(struct sunxi_rsb_device *rdev,
 479                                             const struct regmap_config *config,
 480                                             struct lock_class_key *lock_key,
 481                                             const char *lock_name)
 482 {
 483         struct sunxi_rsb_ctx *ctx = regmap_sunxi_rsb_init_ctx(rdev, config);
 484
 485         if (IS_ERR(ctx))
 486                 return ERR_CAST(ctx);
 487
 488         return __devm_regmap_init(&rdev->dev, &regmap_sunxi_rsb, ctx, config,
 489                                   lock_key, lock_name);
 490 }
 491 EXPORT_SYMBOL_GPL(__devm_regmap_init_sunxi_rsb);
 492
 493 /* RSB controller driver functions */
 494 static irqreturn_t sunxi_rsb_irq(int irq, void *dev_id)
 495 {
 496         struct sunxi_rsb *rsb = dev_id;
 497         u32 status;
 498
 499         status = readl(rsb->regs + RSB_INTS);
 500         rsb->status = status;
 501
 502         /* Clear interrupts */
 503         status &= (RSB_INTS_LOAD_BSY | RSB_INTS_TRANS_ERR |
 504                    RSB_INTS_TRANS_OVER);
 505         writel(status, rsb->regs + RSB_INTS);
 506
 507         complete(&rsb->complete);
 508
 509         return IRQ_HANDLED;
 510 }
 511
 512 static int sunxi_rsb_init_device_mode(struct sunxi_rsb *rsb)
 513 {
 514         int ret = 0;
 515         u32 reg;
 516
 517         /* send init sequence */
 518         writel(RSB_DMCR_DEVICE_START | RSB_DMCR_MODE_DATA |
 519                RSB_DMCR_MODE_REG | RSB_DMCR_DEV_ADDR, rsb->regs + RSB_DMCR);
 520
 521         readl_poll_timeout(rsb->regs + RSB_DMCR, reg,
 522                            !(reg & RSB_DMCR_DEVICE_START), 100, 250000);
 523         if (reg & RSB_DMCR_DEVICE_START)
 524                 ret = -ETIMEDOUT;
 525
 526         /* clear interrupt status bits */
 527         writel(readl(rsb->regs + RSB_INTS), rsb->regs + RSB_INTS);
 528
 529         return ret;
 530 }
 531
 532 /*
 533  * There are 15 valid runtime addresses, though Allwinner typically
 534  * skips the first, for unknown reasons, and uses the following three.
 535  *
 536  * 0x17, 0x2d, 0x3a, 0x4e, 0x59, 0x63, 0x74, 0x8b,
 537  * 0x9c, 0xa6, 0xb1, 0xc5, 0xd2, 0xe8, 0xff
 538  *
 539  * No designs with 2 RSB slave devices sharing identical hardware
 540  * addresses on the same bus have been seen in the wild. All designs
 541  * use 0x2d for the primary PMIC, 0x3a for the secondary PMIC if
 542  * there is one, and 0x45 for peripheral ICs.
 543  *
 544  * The hardware does not seem to support re-setting runtime addresses.
 545  * Attempts to do so result in the slave devices returning a NACK.
 546  * Hence we just hardcode the mapping here, like Allwinner does.
 547  */
 548
 549 static const struct sunxi_rsb_addr_map sunxi_rsb_addr_maps[] = {
 550         { 0x3a3, 0x2d }, /* Primary PMIC: AXP223, AXP809, AXP81X, ... */
 551         { 0x745, 0x3a }, /* Secondary PMIC: AXP806, ... */
 552         { 0xe89, 0x4e }, /* Peripheral IC: AC100, ... */
 553 };
 554
 555 static u8 sunxi_rsb_get_rtaddr(u16 hwaddr)
 556 {
 557         int i;
 558
 559         for (i = 0; i < ARRAY_SIZE(sunxi_rsb_addr_maps); i++)
 560                 if (hwaddr == sunxi_rsb_addr_maps[i].hwaddr)
 561                         return sunxi_rsb_addr_maps[i].rtaddr;
 562
 563         return 0; /* 0 is an invalid runtime address */
 564 }
 565
 566 static int of_rsb_register_devices(struct sunxi_rsb *rsb)
 567 {
 568         struct device *dev = rsb->dev;
 569         struct device_node *child, *np = dev->of_node;
 570         u32 hwaddr;
 571         u8 rtaddr;
 572         int ret;
 573
 574         if (!np)
 575                 return -EINVAL;
 576
 577         /* Runtime addresses for all slaves should be set first */
 578         for_each_available_child_of_node(np, child) {
 579                 dev_dbg(dev, "setting child %pOF runtime address\n",
 580                         child);
 581
 582                 ret = of_property_read_u32(child, "reg", &hwaddr);
 583                 if (ret) {
 584                         dev_err(dev, "%pOF: invalid 'reg' property: %d\n",
 585                                 child, ret);
 586                         continue;
 587                 }
 588
 589                 rtaddr = sunxi_rsb_get_rtaddr(hwaddr);
 590                 if (!rtaddr) {
 591                         dev_err(dev, "%pOF: unknown hardware device address\n",
 592                                 child);
 593                         continue;
 594                 }
 595
 596                 /*
 597                  * Since no devices have been registered yet, we are the
 598                  * only ones using the bus, we can skip locking the bus.
 599                  */
 600
 601                 /* setup command parameters */
 602                 writel(RSB_CMD_STRA, rsb->regs + RSB_CMD);
 603                 writel(RSB_DAR_RTA(rtaddr) | RSB_DAR_DA(hwaddr),
 604                        rsb->regs + RSB_DAR);
 605
 606                 /* send command */
 607                 ret = _sunxi_rsb_run_xfer(rsb);
 608                 if (ret)
 609                         dev_warn(dev, "%pOF: set runtime address failed: %d\n",
 610                                  child, ret);
 611         }
 612
 613         /* Then we start adding devices and probing them */
 614         for_each_available_child_of_node(np, child) {
 615                 struct sunxi_rsb_device *rdev;
 616
 617                 dev_dbg(dev, "adding child %pOF\n", child);
 618
 619                 ret = of_property_read_u32(child, "reg", &hwaddr);
 620                 if (ret)
 621                         continue;
 622
 623                 rtaddr = sunxi_rsb_get_rtaddr(hwaddr);
 624                 if (!rtaddr)
 625                         continue;
 626
 627                 rdev = sunxi_rsb_device_create(rsb, child, hwaddr, rtaddr);
 628                 if (IS_ERR(rdev))
 629                         dev_err(dev, "failed to add child device %pOF: %ld\n",
 630                                 child, PTR_ERR(rdev));
 631         }
 632
 633         return 0;
 634 }
 635
 636 static int sunxi_rsb_hw_init(struct sunxi_rsb *rsb)
 637 {
 638         struct device *dev = rsb->dev;
 639         unsigned long p_clk_freq;
 640         u32 clk_delay, reg;
 641         int clk_div, ret;
 642
 643         ret = clk_prepare_enable(rsb->clk);
 644         if (ret) {
 645                 dev_err(dev, "failed to enable clk: %d\n", ret);
 646                 return ret;
 647         }
 648
 649         ret = reset_control_deassert(rsb->rstc);
 650         if (ret) {
 651                 dev_err(dev, "failed to deassert reset line: %d\n", ret);
 652                 goto err_clk_disable;
 653         }
 654
 655         /* reset the controller */
 656         writel(RSB_CTRL_SOFT_RST, rsb->regs + RSB_CTRL);
 657         readl_poll_timeout(rsb->regs + RSB_CTRL, reg,
 658                            !(reg & RSB_CTRL_SOFT_RST), 1000, 100000);
 659
 660         /*
 661          * Clock frequency and delay calculation code is from
 662          * Allwinner U-boot sources.
 663          *
 664          * From A83 user manual:
 665          * bus clock frequency = parent clock frequency / (2 * (divider + 1))
 666          */
 667         p_clk_freq = clk_get_rate(rsb->clk);
 668         clk_div = p_clk_freq / rsb->clk_freq / 2;
 669         if (!clk_div)
 670                 clk_div = 1;
 671         else if (clk_div > RSB_CCR_MAX_CLK_DIV + 1)
 672                 clk_div = RSB_CCR_MAX_CLK_DIV + 1;
 673
 674         clk_delay = clk_div >> 1;
 675         if (!clk_delay)
 676                 clk_delay = 1;
 677
 678         dev_info(dev, "RSB running at %lu Hz\n", p_clk_freq / clk_div / 2);
 679         writel(RSB_CCR_SDA_OUT_DELAY(clk_delay) | RSB_CCR_CLK_DIV(clk_div - 1),
 680                rsb->regs + RSB_CCR);
 681
 682         return 0;
 683
 684 err_clk_disable:
 685         clk_disable_unprepare(rsb->clk);
 686
 687         return ret;
 688 }
 689
 690 static void sunxi_rsb_hw_exit(struct sunxi_rsb *rsb)
 691 {
 692         /* Keep the clock and PM reference counts consistent. */
 693         if (pm_runtime_status_suspended(rsb->dev))
 694                 pm_runtime_resume(rsb->dev);
 695         reset_control_assert(rsb->rstc);
 696         clk_disable_unprepare(rsb->clk);
 697 }
 698
 699 static int __maybe_unused sunxi_rsb_runtime_suspend(struct device *dev)
 700 {
 701         struct sunxi_rsb *rsb = dev_get_drvdata(dev);
 702
 703         clk_disable_unprepare(rsb->clk);
 704
 705         return 0;
 706 }
 707
 708 static int __maybe_unused sunxi_rsb_runtime_resume(struct device *dev)
 709 {
 710         struct sunxi_rsb *rsb = dev_get_drvdata(dev);
 711
 712         return clk_prepare_enable(rsb->clk);
 713 }
 714
 715 static int __maybe_unused sunxi_rsb_suspend(struct device *dev)
 716 {
 717         struct sunxi_rsb *rsb = dev_get_drvdata(dev);
 718
 719         sunxi_rsb_hw_exit(rsb);
 720
 721         return 0;
 722 }
 723
 724 static int __maybe_unused sunxi_rsb_resume(struct device *dev)
 725 {
 726         struct sunxi_rsb *rsb = dev_get_drvdata(dev);
 727
 728         return sunxi_rsb_hw_init(rsb);
 729 }
 730
 731 static int sunxi_rsb_probe(struct platform_device *pdev)
 732 {
 733         struct device *dev = &pdev->dev;
 734         struct device_node *np = dev->of_node;
 735         struct resource *r;
 736         struct sunxi_rsb *rsb;
 737         u32 clk_freq = 3000000;
 738         int irq, ret;
 739
 740         of_property_read_u32(np, "clock-frequency", &clk_freq);
 741         if (clk_freq > RSB_MAX_FREQ) {
 742                 dev_err(dev,
 743                         "clock-frequency (%u Hz) is too high (max = 20MHz)\n",
 744                         clk_freq);
 745                 return -EINVAL;
 746         }
 747
 748         rsb = devm_kzalloc(dev, sizeof(*rsb), GFP_KERNEL);
 749         if (!rsb)
 750                 return -ENOMEM;
 751
 752         rsb->dev = dev;
 753         rsb->clk_freq = clk_freq;
 754         platform_set_drvdata(pdev, rsb);
 755         r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 756         rsb->regs = devm_ioremap_resource(dev, r);
 757         if (IS_ERR(rsb->regs))
 758                 return PTR_ERR(rsb->regs);
 759
 760         irq = platform_get_irq(pdev, 0);
 761         if (irq < 0)
 762                 return irq;
 763
 764         rsb->clk = devm_clk_get(dev, NULL);
 765         if (IS_ERR(rsb->clk)) {
 766                 ret = PTR_ERR(rsb->clk);
 767                 dev_err(dev, "failed to retrieve clk: %d\n", ret);
 768                 return ret;
 769         }
 770
 771         rsb->rstc = devm_reset_control_get(dev, NULL);
 772         if (IS_ERR(rsb->rstc)) {
 773                 ret = PTR_ERR(rsb->rstc);
 774                 dev_err(dev, "failed to retrieve reset controller: %d\n", ret);
 775                 return ret;
 776         }
 777
 778         init_completion(&rsb->complete);
 779         mutex_init(&rsb->lock);
 780
 781         ret = devm_request_irq(dev, irq, sunxi_rsb_irq, 0, RSB_CTRL_NAME, rsb);
 782         if (ret) {
 783                 dev_err(dev, "can't register interrupt handler irq %d: %d\n",
 784                         irq, ret);
 785                 return ret;
 786         }
 787
 788         ret = sunxi_rsb_hw_init(rsb);
 789         if (ret)
 790                 return ret;
 791
 792         /* initialize all devices on the bus into RSB mode */
 793         ret = sunxi_rsb_init_device_mode(rsb);
 794         if (ret)
 795                 dev_warn(dev, "Initialize device mode failed: %d\n", ret);
 796
 797         pm_suspend_ignore_children(dev, true);
 798         pm_runtime_set_active(dev);
 799         pm_runtime_set_autosuspend_delay(dev, MSEC_PER_SEC);
 800         pm_runtime_use_autosuspend(dev);
 801         pm_runtime_enable(dev);
 802
 803         of_rsb_register_devices(rsb);
 804
 805         return 0;
 806 }
 807
 808 static int sunxi_rsb_remove(struct platform_device *pdev)
 809 {
 810         struct sunxi_rsb *rsb = platform_get_drvdata(pdev);
 811
 812         device_for_each_child(rsb->dev, NULL, sunxi_rsb_remove_devices);
 813         pm_runtime_disable(&pdev->dev);
 814         sunxi_rsb_hw_exit(rsb);
 815
 816         return 0;
 817 }
 818
 819 static void sunxi_rsb_shutdown(struct platform_device *pdev)
 820 {
 821         struct sunxi_rsb *rsb = platform_get_drvdata(pdev);
 822
 823         pm_runtime_disable(&pdev->dev);
 824         sunxi_rsb_hw_exit(rsb);
 825 }
 826
 827 static const struct dev_pm_ops sunxi_rsb_dev_pm_ops = {
 828         SET_RUNTIME_PM_OPS(sunxi_rsb_runtime_suspend,
 829                            sunxi_rsb_runtime_resume, NULL)
 830         SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(sunxi_rsb_suspend, sunxi_rsb_resume)
 831 };
 832
 833 static const struct of_device_id sunxi_rsb_of_match_table[] = {
 834         { .compatible = "allwinner,sun8i-a23-rsb" },
 835         {}
 836 };
 837 MODULE_DEVICE_TABLE(of, sunxi_rsb_of_match_table);
 838
 839 static struct platform_driver sunxi_rsb_driver = {
 840         .probe = sunxi_rsb_probe,
 841         .remove = sunxi_rsb_remove,
 842         .shutdown = sunxi_rsb_shutdown,
 843         .driver = {
 844                 .name = RSB_CTRL_NAME,
 845                 .of_match_table = sunxi_rsb_of_match_table,
 846                 .pm = &sunxi_rsb_dev_pm_ops,
 847         },
 848 };
 849
 850 static int __init sunxi_rsb_init(void)
 851 {
 852         int ret;
 853
 854         ret = bus_register(&sunxi_rsb_bus);
 855         if (ret) {
 856                 pr_err("failed to register sunxi sunxi_rsb bus: %d\n", ret);
 857                 return ret;
 858         }
 859
 860         return platform_driver_register(&sunxi_rsb_driver);
 861 }
 862 module_init(sunxi_rsb_init);
 863
 864 static void __exit sunxi_rsb_exit(void)
 865 {
 866         platform_driver_unregister(&sunxi_rsb_driver);
 867         bus_unregister(&sunxi_rsb_bus);
 868 }
 869 module_exit(sunxi_rsb_exit);
 870
 871 MODULE_AUTHOR("Chen-Yu Tsai <wens@csie.org>");
 872 MODULE_DESCRIPTION("Allwinner sunXi Reduced Serial Bus controller driver");
 873 MODULE_LICENSE("GPL v2");