drivers/bus/sunxi-rsb.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * RSB (Reduced Serial Bus) driver.
   4  *
   5  * Author: Chen-Yu Tsai <wens@csie.org>
   6  *
   7  * The RSB controller looks like an SMBus controller which only supports
   8  * byte and word data transfers. But, it differs from standard SMBus
   9  * protocol on several aspects:
  10  * - it uses addresses set at runtime to address slaves. Runtime addresses
  11  *   are sent to slaves using their 12bit hardware addresses. Up to 15
  12  *   runtime addresses are available.
  13  * - it adds a parity bit every 8bits of data and address for read and
  14  *   write accesses; this replaces the ack bit
  15  * - only one read access is required to read a byte (instead of a write
  16  *   followed by a read access in standard SMBus protocol)
  17  * - there's no Ack bit after each read access
  18  *
  19  * This means this bus cannot be used to interface with standard SMBus
  20  * devices. Devices known to support this interface include the AXP223,
  21  * AXP809, and AXP806 PMICs, and the AC100 audio codec, all from X-Powers.
  22  *
  23  * A description of the operation and wire protocol can be found in the
  24  * RSB section of Allwinner's A80 user manual, which can be found at
  25  *
  26  *     https://github.com/allwinner-zh/documents/tree/master/A80
  27  *
  28  * This document is officially released by Allwinner.
  29  *
  30  * This driver is based on i2c-sun6i-p2wi.c, the P2WI bus driver.
  31  */
  32
  33 #include <linux/clk.h>
  34 #include <linux/clk/clk-conf.h>
  35 #include <linux/device.h>
  36 #include <linux/interrupt.h>
  37 #include <linux/io.h>
  38 #include <linux/iopoll.h>
  39 #include <linux/module.h>
  40 #include <linux/of.h>
  41 #include <linux/of_irq.h>
  42 #include <linux/of_platform.h>
  43 #include <linux/platform_device.h>
  44 #include <linux/pm.h>
  45 #include <linux/pm_runtime.h>
  46 #include <linux/regmap.h>
  47 #include <linux/reset.h>
  48 #include <linux/slab.h>
  49 #include <linux/sunxi-rsb.h>
  50 #include <linux/types.h>
  51
  52 /* RSB registers */
  53 #define RSB_CTRL        0x0     /* Global control */
  54 #define RSB_CCR         0x4     /* Clock control */
  55 #define RSB_INTE        0x8     /* Interrupt controls */
  56 #define RSB_INTS        0xc     /* Interrupt status */
  57 #define RSB_ADDR        0x10    /* Address to send with read/write command */
  58 #define RSB_DATA        0x1c    /* Data to read/write */
  59 #define RSB_LCR         0x24    /* Line control */
  60 #define RSB_DMCR        0x28    /* Device mode (init) control */
  61 #define RSB_CMD         0x2c    /* RSB Command */
  62 #define RSB_DAR         0x30    /* Device address / runtime address */
  63
  64 /* CTRL fields */
  65 #define RSB_CTRL_START_TRANS            BIT(7)
  66 #define RSB_CTRL_ABORT_TRANS            BIT(6)
  67 #define RSB_CTRL_GLOBAL_INT_ENB         BIT(1)
  68 #define RSB_CTRL_SOFT_RST               BIT(0)
  69
  70 /* CLK CTRL fields */
  71 #define RSB_CCR_SDA_OUT_DELAY(v)        (((v) & 0x7) << 8)
  72 #define RSB_CCR_MAX_CLK_DIV             0xff
  73 #define RSB_CCR_CLK_DIV(v)              ((v) & RSB_CCR_MAX_CLK_DIV)
  74
  75 /* STATUS fields */
  76 #define RSB_INTS_TRANS_ERR_ACK          BIT(16)
  77 #define RSB_INTS_TRANS_ERR_DATA_BIT(v)  (((v) >> 8) & 0xf)
  78 #define RSB_INTS_TRANS_ERR_DATA         GENMASK(11, 8)
  79 #define RSB_INTS_LOAD_BSY               BIT(2)
  80 #define RSB_INTS_TRANS_ERR              BIT(1)
  81 #define RSB_INTS_TRANS_OVER             BIT(0)
  82
  83 /* LINE CTRL fields*/
  84 #define RSB_LCR_SCL_STATE               BIT(5)
  85 #define RSB_LCR_SDA_STATE               BIT(4)
  86 #define RSB_LCR_SCL_CTL                 BIT(3)
  87 #define RSB_LCR_SCL_CTL_EN              BIT(2)
  88 #define RSB_LCR_SDA_CTL                 BIT(1)
  89 #define RSB_LCR_SDA_CTL_EN              BIT(0)
  90
  91 /* DEVICE MODE CTRL field values */
  92 #define RSB_DMCR_DEVICE_START           BIT(31)
  93 #define RSB_DMCR_MODE_DATA              (0x7c << 16)
  94 #define RSB_DMCR_MODE_REG               (0x3e << 8)
  95 #define RSB_DMCR_DEV_ADDR               0x00
  96
  97 /* CMD values */
  98 #define RSB_CMD_RD8                     0x8b
  99 #define RSB_CMD_RD16                    0x9c
 100 #define RSB_CMD_RD32                    0xa6
 101 #define RSB_CMD_WR8                     0x4e
 102 #define RSB_CMD_WR16                    0x59
 103 #define RSB_CMD_WR32                    0x63
 104 #define RSB_CMD_STRA                    0xe8
 105
 106 /* DAR fields */
 107 #define RSB_DAR_RTA(v)                  (((v) & 0xff) << 16)
 108 #define RSB_DAR_DA(v)                   ((v) & 0xffff)
 109
 110 #define RSB_MAX_FREQ                    20000000
 111
 112 #define RSB_CTRL_NAME                   "sunxi-rsb"
 113
 114 struct sunxi_rsb_addr_map {
 115         u16 hwaddr;
 116         u8 rtaddr;
 117 };
 118
 119 struct sunxi_rsb {
 120         struct device *dev;
 121         void __iomem *regs;
 122         struct clk *clk;
 123         struct reset_control *rstc;
 124         struct completion complete;
 125         struct mutex lock;
 126         unsigned int status;
 127         u32 clk_freq;
 128 };
 129
 130 /* bus / slave device related functions */
 131 static struct bus_type sunxi_rsb_bus;
 132
 133 static int sunxi_rsb_device_match(struct device *dev, struct device_driver *drv)
 134 {
 135         return of_driver_match_device(dev, drv);
 136 }
 137
 138 static int sunxi_rsb_device_probe(struct device *dev)
 139 {
 140         const struct sunxi_rsb_driver *drv = to_sunxi_rsb_driver(dev->driver);
 141         struct sunxi_rsb_device *rdev = to_sunxi_rsb_device(dev);
 142         int ret;
 143
 144         if (!drv->probe)
 145                 return -ENODEV;
 146
 147         if (!rdev->irq) {
 148                 int irq = -ENOENT;
 149
 150                 if (dev->of_node)
 151                         irq = of_irq_get(dev->of_node, 0);
 152
 153                 if (irq == -EPROBE_DEFER)
 154                         return irq;
 155                 if (irq < 0)
 156                         irq = 0;
 157
 158                 rdev->irq = irq;
 159         }
 160
 161         ret = of_clk_set_defaults(dev->of_node, false);
 162         if (ret < 0)
 163                 return ret;
 164
 165         return drv->probe(rdev);
 166 }
 167
 168 static void sunxi_rsb_device_remove(struct device *dev)
 169 {
 170         const struct sunxi_rsb_driver *drv = to_sunxi_rsb_driver(dev->driver);
 171
 172         drv->remove(to_sunxi_rsb_device(dev));
 173 }
 174
 175 static int sunxi_rsb_device_modalias(const struct device *dev, struct kobj_uevent_env *env)
 176 {
 177         return of_device_uevent_modalias(dev, env);
 178 }
 179
 180 static struct bus_type sunxi_rsb_bus = {
 181         .name           = RSB_CTRL_NAME,
 182         .match          = sunxi_rsb_device_match,
 183         .probe          = sunxi_rsb_device_probe,
 184         .remove         = sunxi_rsb_device_remove,
 185         .uevent         = sunxi_rsb_device_modalias,
 186 };
 187
 188 static void sunxi_rsb_dev_release(struct device *dev)
 189 {
 190         struct sunxi_rsb_device *rdev = to_sunxi_rsb_device(dev);
 191
 192         kfree(rdev);
 193 }
 194
 195 /**
 196  * sunxi_rsb_device_create() - allocate and add an RSB device
 197  * @rsb:        RSB controller
 198  * @node:       RSB slave device node
 199  * @hwaddr:     RSB slave hardware address
 200  * @rtaddr:     RSB slave runtime address
 201  */
 202 static struct sunxi_rsb_device *sunxi_rsb_device_create(struct sunxi_rsb *rsb,
 203                 struct device_node *node, u16 hwaddr, u8 rtaddr)
 204 {
 205         int err;
 206         struct sunxi_rsb_device *rdev;
 207
 208         rdev = kzalloc(sizeof(*rdev), GFP_KERNEL);
 209         if (!rdev)
 210                 return ERR_PTR(-ENOMEM);
 211
 212         rdev->rsb = rsb;
 213         rdev->hwaddr = hwaddr;
 214         rdev->rtaddr = rtaddr;
 215         rdev->dev.bus = &sunxi_rsb_bus;
 216         rdev->dev.parent = rsb->dev;
 217         rdev->dev.of_node = node;
 218         rdev->dev.release = sunxi_rsb_dev_release;
 219
 220         dev_set_name(&rdev->dev, "%s-%x", RSB_CTRL_NAME, hwaddr);
 221
 222         err = device_register(&rdev->dev);
 223         if (err < 0) {
 224                 dev_err(&rdev->dev, "Can't add %s, status %d\n",
 225                         dev_name(&rdev->dev), err);
 226                 goto err_device_add;
 227         }
 228
 229         dev_dbg(&rdev->dev, "device %s registered\n", dev_name(&rdev->dev));
 230
 231         return rdev;
 232
 233 err_device_add:
 234         put_device(&rdev->dev);
 235
 236         return ERR_PTR(err);
 237 }
 238
 239 /**
 240  * sunxi_rsb_device_unregister(): unregister an RSB device
 241  * @rdev:       rsb_device to be removed
 242  */
 243 static void sunxi_rsb_device_unregister(struct sunxi_rsb_device *rdev)
 244 {
 245         device_unregister(&rdev->dev);
 246 }
 247
 248 static int sunxi_rsb_remove_devices(struct device *dev, void *data)
 249 {
 250         struct sunxi_rsb_device *rdev = to_sunxi_rsb_device(dev);
 251
 252         if (dev->bus == &sunxi_rsb_bus)
 253                 sunxi_rsb_device_unregister(rdev);
 254
 255         return 0;
 256 }
 257
 258 /**
 259  * sunxi_rsb_driver_register() - Register device driver with RSB core
 260  * @rdrv:       device driver to be associated with slave-device.
 261  *
 262  * This API will register the client driver with the RSB framework.
 263  * It is typically called from the driver's module-init function.
 264  */
 265 int sunxi_rsb_driver_register(struct sunxi_rsb_driver *rdrv)
 266 {
 267         rdrv->driver.bus = &sunxi_rsb_bus;
 268         return driver_register(&rdrv->driver);
 269 }
 270 EXPORT_SYMBOL_GPL(sunxi_rsb_driver_register);
 271
 272 /* common code that starts a transfer */
 273 static int _sunxi_rsb_run_xfer(struct sunxi_rsb *rsb)
 274 {
 275         u32 int_mask, status;
 276         bool timeout;
 277
 278         if (readl(rsb->regs + RSB_CTRL) & RSB_CTRL_START_TRANS) {
 279                 dev_dbg(rsb->dev, "RSB transfer still in progress\n");
 280                 return -EBUSY;
 281         }
 282
 283         reinit_completion(&rsb->complete);
 284
 285         int_mask = RSB_INTS_LOAD_BSY | RSB_INTS_TRANS_ERR | RSB_INTS_TRANS_OVER;
 286         writel(int_mask, rsb->regs + RSB_INTE);
 287         writel(RSB_CTRL_START_TRANS | RSB_CTRL_GLOBAL_INT_ENB,
 288                rsb->regs + RSB_CTRL);
 289
 290         if (irqs_disabled()) {
 291                 timeout = readl_poll_timeout_atomic(rsb->regs + RSB_INTS,
 292                                                     status, (status & int_mask),
 293                                                     10, 100000);
 294                 writel(status, rsb->regs + RSB_INTS);
 295         } else {
 296                 timeout = !wait_for_completion_io_timeout(&rsb->complete,
 297                                                           msecs_to_jiffies(100));
 298                 status = rsb->status;
 299         }
 300
 301         if (timeout) {
 302                 dev_dbg(rsb->dev, "RSB timeout\n");
 303
 304                 /* abort the transfer */
 305                 writel(RSB_CTRL_ABORT_TRANS, rsb->regs + RSB_CTRL);
 306
 307                 /* clear any interrupt flags */
 308                 writel(readl(rsb->regs + RSB_INTS), rsb->regs + RSB_INTS);
 309
 310                 return -ETIMEDOUT;
 311         }
 312
 313         if (status & RSB_INTS_LOAD_BSY) {
 314                 dev_dbg(rsb->dev, "RSB busy\n");
 315                 return -EBUSY;
 316         }
 317
 318         if (status & RSB_INTS_TRANS_ERR) {
 319                 if (status & RSB_INTS_TRANS_ERR_ACK) {
 320                         dev_dbg(rsb->dev, "RSB slave nack\n");
 321                         return -EINVAL;
 322                 }
 323
 324                 if (status & RSB_INTS_TRANS_ERR_DATA) {
 325                         dev_dbg(rsb->dev, "RSB transfer data error\n");
 326                         return -EIO;
 327                 }
 328         }
 329
 330         return 0;
 331 }
 332
 333 static int sunxi_rsb_read(struct sunxi_rsb *rsb, u8 rtaddr, u8 addr,
 334                           u32 *buf, size_t len)
 335 {
 336         u32 cmd;
 337         int ret;
 338
 339         if (!buf)
 340                 return -EINVAL;
 341
 342         switch (len) {
 343         case 1:
 344                 cmd = RSB_CMD_RD8;
 345                 break;
 346         case 2:
 347                 cmd = RSB_CMD_RD16;
 348                 break;
 349         case 4:
 350                 cmd = RSB_CMD_RD32;
 351                 break;
 352         default:
 353                 dev_err(rsb->dev, "Invalid access width: %zd\n", len);
 354                 return -EINVAL;
 355         }
 356
 357         ret = pm_runtime_resume_and_get(rsb->dev);
 358         if (ret)
 359                 return ret;
 360
 361         mutex_lock(&rsb->lock);
 362
 363         writel(addr, rsb->regs + RSB_ADDR);
 364         writel(RSB_DAR_RTA(rtaddr), rsb->regs + RSB_DAR);
 365         writel(cmd, rsb->regs + RSB_CMD);
 366
 367         ret = _sunxi_rsb_run_xfer(rsb);
 368         if (ret)
 369                 goto unlock;
 370
 371         *buf = readl(rsb->regs + RSB_DATA) & GENMASK(len * 8 - 1, 0);
 372
 373 unlock:
 374         mutex_unlock(&rsb->lock);
 375
 376         pm_runtime_mark_last_busy(rsb->dev);
 377         pm_runtime_put_autosuspend(rsb->dev);
 378
 379         return ret;
 380 }
 381
 382 static int sunxi_rsb_write(struct sunxi_rsb *rsb, u8 rtaddr, u8 addr,
 383                            const u32 *buf, size_t len)
 384 {
 385         u32 cmd;
 386         int ret;
 387
 388         if (!buf)
 389                 return -EINVAL;
 390
 391         switch (len) {
 392         case 1:
 393                 cmd = RSB_CMD_WR8;
 394                 break;
 395         case 2:
 396                 cmd = RSB_CMD_WR16;
 397                 break;
 398         case 4:
 399                 cmd = RSB_CMD_WR32;
 400                 break;
 401         default:
 402                 dev_err(rsb->dev, "Invalid access width: %zd\n", len);
 403                 return -EINVAL;
 404         }
 405
 406         ret = pm_runtime_resume_and_get(rsb->dev);
 407         if (ret)
 408                 return ret;
 409
 410         mutex_lock(&rsb->lock);
 411
 412         writel(addr, rsb->regs + RSB_ADDR);
 413         writel(RSB_DAR_RTA(rtaddr), rsb->regs + RSB_DAR);
 414         writel(*buf, rsb->regs + RSB_DATA);
 415         writel(cmd, rsb->regs + RSB_CMD);
 416         ret = _sunxi_rsb_run_xfer(rsb);
 417
 418         mutex_unlock(&rsb->lock);
 419
 420         pm_runtime_mark_last_busy(rsb->dev);
 421         pm_runtime_put_autosuspend(rsb->dev);
 422
 423         return ret;
 424 }
 425
 426 /* RSB regmap functions */
 427 struct sunxi_rsb_ctx {
 428         struct sunxi_rsb_device *rdev;
 429         int size;
 430 };
 431
 432 static int regmap_sunxi_rsb_reg_read(void *context, unsigned int reg,
 433                                      unsigned int *val)
 434 {
 435         struct sunxi_rsb_ctx *ctx = context;
 436         struct sunxi_rsb_device *rdev = ctx->rdev;
 437
 438         if (reg > 0xff)
 439                 return -EINVAL;
 440
 441         return sunxi_rsb_read(rdev->rsb, rdev->rtaddr, reg, val, ctx->size);
 442 }
 443
 444 static int regmap_sunxi_rsb_reg_write(void *context, unsigned int reg,
 445                                       unsigned int val)
 446 {
 447         struct sunxi_rsb_ctx *ctx = context;
 448         struct sunxi_rsb_device *rdev = ctx->rdev;
 449
 450         return sunxi_rsb_write(rdev->rsb, rdev->rtaddr, reg, &val, ctx->size);
 451 }
 452
 453 static void regmap_sunxi_rsb_free_ctx(void *context)
 454 {
 455         struct sunxi_rsb_ctx *ctx = context;
 456
 457         kfree(ctx);
 458 }
 459
 460 static struct regmap_bus regmap_sunxi_rsb = {
 461         .reg_write = regmap_sunxi_rsb_reg_write,
 462         .reg_read = regmap_sunxi_rsb_reg_read,
 463         .free_context = regmap_sunxi_rsb_free_ctx,
 464         .reg_format_endian_default = REGMAP_ENDIAN_NATIVE,
 465         .val_format_endian_default = REGMAP_ENDIAN_NATIVE,
 466 };
 467
 468 static struct sunxi_rsb_ctx *regmap_sunxi_rsb_init_ctx(struct sunxi_rsb_device *rdev,
 469                 const struct regmap_config *config)
 470 {
 471         struct sunxi_rsb_ctx *ctx;
 472
 473         switch (config->val_bits) {
 474         case 8:
 475         case 16:
 476         case 32:
 477                 break;
 478         default:
 479                 return ERR_PTR(-EINVAL);
 480         }
 481
 482         ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
 483         if (!ctx)
 484                 return ERR_PTR(-ENOMEM);
 485
 486         ctx->rdev = rdev;
 487         ctx->size = config->val_bits / 8;
 488
 489         return ctx;
 490 }
 491
 492 struct regmap *__devm_regmap_init_sunxi_rsb(struct sunxi_rsb_device *rdev,
 493                                             const struct regmap_config *config,
 494                                             struct lock_class_key *lock_key,
 495                                             const char *lock_name)
 496 {
 497         struct sunxi_rsb_ctx *ctx = regmap_sunxi_rsb_init_ctx(rdev, config);
 498
 499         if (IS_ERR(ctx))
 500                 return ERR_CAST(ctx);
 501
 502         return __devm_regmap_init(&rdev->dev, &regmap_sunxi_rsb, ctx, config,
 503                                   lock_key, lock_name);
 504 }
 505 EXPORT_SYMBOL_GPL(__devm_regmap_init_sunxi_rsb);
 506
 507 /* RSB controller driver functions */
 508 static irqreturn_t sunxi_rsb_irq(int irq, void *dev_id)
 509 {
 510         struct sunxi_rsb *rsb = dev_id;
 511         u32 status;
 512
 513         status = readl(rsb->regs + RSB_INTS);
 514         rsb->status = status;
 515
 516         /* Clear interrupts */
 517         status &= (RSB_INTS_LOAD_BSY | RSB_INTS_TRANS_ERR |
 518                    RSB_INTS_TRANS_OVER);
 519         writel(status, rsb->regs + RSB_INTS);
 520
 521         complete(&rsb->complete);
 522
 523         return IRQ_HANDLED;
 524 }
 525
 526 static int sunxi_rsb_init_device_mode(struct sunxi_rsb *rsb)
 527 {
 528         int ret = 0;
 529         u32 reg;
 530
 531         /* send init sequence */
 532         writel(RSB_DMCR_DEVICE_START | RSB_DMCR_MODE_DATA |
 533                RSB_DMCR_MODE_REG | RSB_DMCR_DEV_ADDR, rsb->regs + RSB_DMCR);
 534
 535         readl_poll_timeout(rsb->regs + RSB_DMCR, reg,
 536                            !(reg & RSB_DMCR_DEVICE_START), 100, 250000);
 537         if (reg & RSB_DMCR_DEVICE_START)
 538                 ret = -ETIMEDOUT;
 539
 540         /* clear interrupt status bits */
 541         writel(readl(rsb->regs + RSB_INTS), rsb->regs + RSB_INTS);
 542
 543         return ret;
 544 }
 545
 546 /*
 547  * There are 15 valid runtime addresses, though Allwinner typically
 548  * skips the first, for unknown reasons, and uses the following three.
 549  *
 550  * 0x17, 0x2d, 0x3a, 0x4e, 0x59, 0x63, 0x74, 0x8b,
 551  * 0x9c, 0xa6, 0xb1, 0xc5, 0xd2, 0xe8, 0xff
 552  *
 553  * No designs with 2 RSB slave devices sharing identical hardware
 554  * addresses on the same bus have been seen in the wild. All designs
 555  * use 0x2d for the primary PMIC, 0x3a for the secondary PMIC if
 556  * there is one, and 0x45 for peripheral ICs.
 557  *
 558  * The hardware does not seem to support re-setting runtime addresses.
 559  * Attempts to do so result in the slave devices returning a NACK.
 560  * Hence we just hardcode the mapping here, like Allwinner does.
 561  */
 562
 563 static const struct sunxi_rsb_addr_map sunxi_rsb_addr_maps[] = {
 564         { 0x3a3, 0x2d }, /* Primary PMIC: AXP223, AXP809, AXP81X, ... */
 565         { 0x745, 0x3a }, /* Secondary PMIC: AXP806, ... */
 566         { 0xe89, 0x4e }, /* Peripheral IC: AC100, ... */
 567 };
 568
 569 static u8 sunxi_rsb_get_rtaddr(u16 hwaddr)
 570 {
 571         int i;
 572
 573         for (i = 0; i < ARRAY_SIZE(sunxi_rsb_addr_maps); i++)
 574                 if (hwaddr == sunxi_rsb_addr_maps[i].hwaddr)
 575                         return sunxi_rsb_addr_maps[i].rtaddr;
 576
 577         return 0; /* 0 is an invalid runtime address */
 578 }
 579
 580 static int of_rsb_register_devices(struct sunxi_rsb *rsb)
 581 {
 582         struct device *dev = rsb->dev;
 583         struct device_node *child, *np = dev->of_node;
 584         u32 hwaddr;
 585         u8 rtaddr;
 586         int ret;
 587
 588         if (!np)
 589                 return -EINVAL;
 590
 591         /* Runtime addresses for all slaves should be set first */
 592         for_each_available_child_of_node(np, child) {
 593                 dev_dbg(dev, "setting child %pOF runtime address\n",
 594                         child);
 595
 596                 ret = of_property_read_u32(child, "reg", &hwaddr);
 597                 if (ret) {
 598                         dev_err(dev, "%pOF: invalid 'reg' property: %d\n",
 599                                 child, ret);
 600                         continue;
 601                 }
 602
 603                 rtaddr = sunxi_rsb_get_rtaddr(hwaddr);
 604                 if (!rtaddr) {
 605                         dev_err(dev, "%pOF: unknown hardware device address\n",
 606                                 child);
 607                         continue;
 608                 }
 609
 610                 /*
 611                  * Since no devices have been registered yet, we are the
 612                  * only ones using the bus, we can skip locking the bus.
 613                  */
 614
 615                 /* setup command parameters */
 616                 writel(RSB_CMD_STRA, rsb->regs + RSB_CMD);
 617                 writel(RSB_DAR_RTA(rtaddr) | RSB_DAR_DA(hwaddr),
 618                        rsb->regs + RSB_DAR);
 619
 620                 /* send command */
 621                 ret = _sunxi_rsb_run_xfer(rsb);
 622                 if (ret)
 623                         dev_warn(dev, "%pOF: set runtime address failed: %d\n",
 624                                  child, ret);
 625         }
 626
 627         /* Then we start adding devices and probing them */
 628         for_each_available_child_of_node(np, child) {
 629                 struct sunxi_rsb_device *rdev;
 630
 631                 dev_dbg(dev, "adding child %pOF\n", child);
 632
 633                 ret = of_property_read_u32(child, "reg", &hwaddr);
 634                 if (ret)
 635                         continue;
 636
 637                 rtaddr = sunxi_rsb_get_rtaddr(hwaddr);
 638                 if (!rtaddr)
 639                         continue;
 640
 641                 rdev = sunxi_rsb_device_create(rsb, child, hwaddr, rtaddr);
 642                 if (IS_ERR(rdev))
 643                         dev_err(dev, "failed to add child device %pOF: %ld\n",
 644                                 child, PTR_ERR(rdev));
 645         }
 646
 647         return 0;
 648 }
 649
 650 static int sunxi_rsb_hw_init(struct sunxi_rsb *rsb)
 651 {
 652         struct device *dev = rsb->dev;
 653         unsigned long p_clk_freq;
 654         u32 clk_delay, reg;
 655         int clk_div, ret;
 656
 657         ret = clk_prepare_enable(rsb->clk);
 658         if (ret) {
 659                 dev_err(dev, "failed to enable clk: %d\n", ret);
 660                 return ret;
 661         }
 662
 663         ret = reset_control_deassert(rsb->rstc);
 664         if (ret) {
 665                 dev_err(dev, "failed to deassert reset line: %d\n", ret);
 666                 goto err_clk_disable;
 667         }
 668
 669         /* reset the controller */
 670         writel(RSB_CTRL_SOFT_RST, rsb->regs + RSB_CTRL);
 671         readl_poll_timeout(rsb->regs + RSB_CTRL, reg,
 672                            !(reg & RSB_CTRL_SOFT_RST), 1000, 100000);
 673
 674         /*
 675          * Clock frequency and delay calculation code is from
 676          * Allwinner U-boot sources.
 677          *
 678          * From A83 user manual:
 679          * bus clock frequency = parent clock frequency / (2 * (divider + 1))
 680          */
 681         p_clk_freq = clk_get_rate(rsb->clk);
 682         clk_div = p_clk_freq / rsb->clk_freq / 2;
 683         if (!clk_div)
 684                 clk_div = 1;
 685         else if (clk_div > RSB_CCR_MAX_CLK_DIV + 1)
 686                 clk_div = RSB_CCR_MAX_CLK_DIV + 1;
 687
 688         clk_delay = clk_div >> 1;
 689         if (!clk_delay)
 690                 clk_delay = 1;
 691
 692         dev_info(dev, "RSB running at %lu Hz\n", p_clk_freq / clk_div / 2);
 693         writel(RSB_CCR_SDA_OUT_DELAY(clk_delay) | RSB_CCR_CLK_DIV(clk_div - 1),
 694                rsb->regs + RSB_CCR);
 695
 696         return 0;
 697
 698 err_clk_disable:
 699         clk_disable_unprepare(rsb->clk);
 700
 701         return ret;
 702 }
 703
 704 static void sunxi_rsb_hw_exit(struct sunxi_rsb *rsb)
 705 {
 706         reset_control_assert(rsb->rstc);
 707
 708         /* Keep the clock and PM reference counts consistent. */
 709         if (!pm_runtime_status_suspended(rsb->dev))
 710                 clk_disable_unprepare(rsb->clk);
 711 }
 712
 713 static int __maybe_unused sunxi_rsb_runtime_suspend(struct device *dev)
 714 {
 715         struct sunxi_rsb *rsb = dev_get_drvdata(dev);
 716
 717         clk_disable_unprepare(rsb->clk);
 718
 719         return 0;
 720 }
 721
 722 static int __maybe_unused sunxi_rsb_runtime_resume(struct device *dev)
 723 {
 724         struct sunxi_rsb *rsb = dev_get_drvdata(dev);
 725
 726         return clk_prepare_enable(rsb->clk);
 727 }
 728
 729 static int __maybe_unused sunxi_rsb_suspend(struct device *dev)
 730 {
 731         struct sunxi_rsb *rsb = dev_get_drvdata(dev);
 732
 733         sunxi_rsb_hw_exit(rsb);
 734
 735         return 0;
 736 }
 737
 738 static int __maybe_unused sunxi_rsb_resume(struct device *dev)
 739 {
 740         struct sunxi_rsb *rsb = dev_get_drvdata(dev);
 741
 742         return sunxi_rsb_hw_init(rsb);
 743 }
 744
 745 static int sunxi_rsb_probe(struct platform_device *pdev)
 746 {
 747         struct device *dev = &pdev->dev;
 748         struct device_node *np = dev->of_node;
 749         struct resource *r;
 750         struct sunxi_rsb *rsb;
 751         u32 clk_freq = 3000000;
 752         int irq, ret;
 753
 754         of_property_read_u32(np, "clock-frequency", &clk_freq);
 755         if (clk_freq > RSB_MAX_FREQ) {
 756                 dev_err(dev,
 757                         "clock-frequency (%u Hz) is too high (max = 20MHz)\n",
 758                         clk_freq);
 759                 return -EINVAL;
 760         }
 761
 762         rsb = devm_kzalloc(dev, sizeof(*rsb), GFP_KERNEL);
 763         if (!rsb)
 764                 return -ENOMEM;
 765
 766         rsb->dev = dev;
 767         rsb->clk_freq = clk_freq;
 768         platform_set_drvdata(pdev, rsb);
 769         r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 770         rsb->regs = devm_ioremap_resource(dev, r);
 771         if (IS_ERR(rsb->regs))
 772                 return PTR_ERR(rsb->regs);
 773
 774         irq = platform_get_irq(pdev, 0);
 775         if (irq < 0)
 776                 return irq;
 777
 778         rsb->clk = devm_clk_get(dev, NULL);
 779         if (IS_ERR(rsb->clk)) {
 780                 ret = PTR_ERR(rsb->clk);
 781                 dev_err(dev, "failed to retrieve clk: %d\n", ret);
 782                 return ret;
 783         }
 784
 785         rsb->rstc = devm_reset_control_get(dev, NULL);
 786         if (IS_ERR(rsb->rstc)) {
 787                 ret = PTR_ERR(rsb->rstc);
 788                 dev_err(dev, "failed to retrieve reset controller: %d\n", ret);
 789                 return ret;
 790         }
 791
 792         init_completion(&rsb->complete);
 793         mutex_init(&rsb->lock);
 794
 795         ret = devm_request_irq(dev, irq, sunxi_rsb_irq, 0, RSB_CTRL_NAME, rsb);
 796         if (ret) {
 797                 dev_err(dev, "can't register interrupt handler irq %d: %d\n",
 798                         irq, ret);
 799                 return ret;
 800         }
 801
 802         ret = sunxi_rsb_hw_init(rsb);
 803         if (ret)
 804                 return ret;
 805
 806         /* initialize all devices on the bus into RSB mode */
 807         ret = sunxi_rsb_init_device_mode(rsb);
 808         if (ret)
 809                 dev_warn(dev, "Initialize device mode failed: %d\n", ret);
 810
 811         pm_suspend_ignore_children(dev, true);
 812         pm_runtime_set_active(dev);
 813         pm_runtime_set_autosuspend_delay(dev, MSEC_PER_SEC);
 814         pm_runtime_use_autosuspend(dev);
 815         pm_runtime_enable(dev);
 816
 817         of_rsb_register_devices(rsb);
 818
 819         return 0;
 820 }
 821
 822 static int sunxi_rsb_remove(struct platform_device *pdev)
 823 {
 824         struct sunxi_rsb *rsb = platform_get_drvdata(pdev);
 825
 826         device_for_each_child(rsb->dev, NULL, sunxi_rsb_remove_devices);
 827         pm_runtime_disable(&pdev->dev);
 828         sunxi_rsb_hw_exit(rsb);
 829
 830         return 0;
 831 }
 832
 833 static const struct dev_pm_ops sunxi_rsb_dev_pm_ops = {
 834         SET_RUNTIME_PM_OPS(sunxi_rsb_runtime_suspend,
 835                            sunxi_rsb_runtime_resume, NULL)
 836         SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(sunxi_rsb_suspend, sunxi_rsb_resume)
 837 };
 838
 839 static const struct of_device_id sunxi_rsb_of_match_table[] = {
 840         { .compatible = "allwinner,sun8i-a23-rsb" },
 841         {}
 842 };
 843 MODULE_DEVICE_TABLE(of, sunxi_rsb_of_match_table);
 844
 845 static struct platform_driver sunxi_rsb_driver = {
 846         .probe = sunxi_rsb_probe,
 847         .remove = sunxi_rsb_remove,
 848         .driver = {
 849                 .name = RSB_CTRL_NAME,
 850                 .of_match_table = sunxi_rsb_of_match_table,
 851                 .pm = &sunxi_rsb_dev_pm_ops,
 852         },
 853 };
 854
 855 static int __init sunxi_rsb_init(void)
 856 {
 857         int ret;
 858
 859         ret = bus_register(&sunxi_rsb_bus);
 860         if (ret) {
 861                 pr_err("failed to register sunxi sunxi_rsb bus: %d\n", ret);
 862                 return ret;
 863         }
 864
 865         ret = platform_driver_register(&sunxi_rsb_driver);
 866         if (ret) {
 867                 bus_unregister(&sunxi_rsb_bus);
 868                 return ret;
 869         }
 870
 871         return 0;
 872 }
 873 module_init(sunxi_rsb_init);
 874
 875 static void __exit sunxi_rsb_exit(void)
 876 {
 877         platform_driver_unregister(&sunxi_rsb_driver);
 878         bus_unregister(&sunxi_rsb_bus);
 879 }
 880 module_exit(sunxi_rsb_exit);
 881
 882 MODULE_AUTHOR("Chen-Yu Tsai <wens@csie.org>");
 883 MODULE_DESCRIPTION("Allwinner sunXi Reduced Serial Bus controller driver");
 884 MODULE_LICENSE("GPL v2");