1 # SPDX-License-Identifier: GPL-2.0
11 config ARM_CCI400_COMMON
15 config ARM_CCI400_PORT_CTRL
17 depends on ARM && OF && CPU_V7
18 select ARM_CCI400_COMMON
20 Low level power management driver for CCI400 cache coherent
21 interconnect for ARM platforms.
23 config ARM_INTEGRATOR_LM
24 bool "ARM Integrator Logic Module bus"
26 depends on ARCH_INTEGRATOR || COMPILE_TEST
27 default ARCH_INTEGRATOR
29 Say y here to enable support for the ARM Logic Module bus
30 found on the ARM Integrator AP (Application Platform)
32 config BRCMSTB_GISB_ARB
33 tristate "Broadcom STB GISB bus arbiter"
34 depends on ARM || ARM64 || MIPS
35 default ARCH_BRCMSTB || BMIPS_GENERIC
37 Driver for the Broadcom Set Top Box System-on-a-chip internal bus
38 arbiter. This driver provides timeout and target abort error handling
39 and internal bus master decoding.
42 bool "Baikal-T1 APB-bus driver"
43 depends on MIPS_BAIKAL_T1 || COMPILE_TEST
46 Baikal-T1 AXI-APB bridge is used to access the SoC subsystem CSRs.
47 IO requests are routed to this bus by means of the DW AMBA 3 AXI
48 Interconnect. In case of any APB protocol collisions, slave device
49 not responding on timeout an IRQ is raised with an erroneous address
50 reported to the APB terminator (APB Errors Handler Block). This
51 driver provides the interrupt handler to detect the erroneous
52 address, prints an error message about the address fault, updates an
53 errors counter. The counter and the APB-bus operations timeout can be
54 accessed via corresponding sysfs nodes.
57 bool "Baikal-T1 AXI-bus driver"
58 depends on MIPS_BAIKAL_T1 || COMPILE_TEST
61 AXI3-bus is the main communication bus connecting all high-speed
62 peripheral IP-cores with RAM controller and with MIPS P5600 cores on
63 Baikal-T1 SoC. Traffic arbitration is done by means of DW AMBA 3 AXI
64 Interconnect (so called AXI Main Interconnect) routing IO requests
65 from one SoC block to another. This driver provides a way to detect
66 any bus protocol errors and device not responding situations by
67 means of an embedded on top of the interconnect errors handler
68 block (EHB). AXI Interconnect QoS arbitration tuning is currently
72 tristate "CZ.NIC Turris Mox module configuration bus"
73 depends on SPI_MASTER && OF
75 Say yes here to add support for the module configuration bus found
76 on CZ.NIC's Turris Mox. This is needed for the ability to discover
77 the order in which the modules are connected and to get/set some of
78 their settings. For example the GPIOs on Mox SFP module are
79 configured through this bus.
82 bool "Support for ISA I/O space on HiSilicon Hip06/7"
83 depends on (ARM64 && ARCH_HISI) || (COMPILE_TEST && !ALPHA && !HEXAGON && !PARISC)
85 select INDIRECT_PIO if ARM64
87 Driver to enable I/O access to devices attached to the Low Pin
88 Count bus on the HiSilicon Hip06/7 SoC.
91 bool "Freescale EIM DRIVER"
94 Driver for i.MX WEIM controller.
95 The WEIM(Wireless External Interface Module) works like a bus.
96 You can attach many different devices on it, such as NOR, onenand.
98 config INTEL_IXP4XX_EB
99 bool "Intel IXP4xx expansion bus interface driver"
101 depends on ARCH_IXP4XX || COMPILE_TEST
105 Driver for the Intel IXP4xx expansion bus interface. The driver is
106 needed to set up various chip select configuration parameters before
107 devices on the expansion bus can be discovered.
110 bool "MIPS Common Device Memory Map (CDMM) Driver"
111 depends on CPU_MIPSR2 || CPU_MIPSR5
113 Driver needed for the MIPS Common Device Memory Map bus in MIPS
114 cores. This bus is for per-CPU tightly coupled devices such as the
115 Fast Debug Channel (FDC).
117 For this to work, either your bootloader needs to enable the CDMM
118 region at an unused physical address on the boot CPU, or else your
119 platform code needs to implement mips_cdmm_phys_base() (see
124 depends on PLAT_ORION
126 Driver needed for the MBus configuration on Marvell EBU SoCs
127 (Kirkwood, Dove, Orion5x, MV78XX0 and Armada 370/XP).
129 config OMAP_INTERCONNECT
130 tristate "OMAP INTERCONNECT DRIVER"
131 depends on ARCH_OMAP2PLUS
134 Driver to enable OMAP interconnect error handling driver.
137 tristate "OMAP OCP2SCP DRIVER"
138 depends on ARCH_OMAP2PLUS
140 Driver to enable ocp2scp module which transforms ocp interface
141 protocol to scp protocol. In OMAP4, USB PHY is connected via
142 OCP2SCP and in OMAP5, both USB PHY and SATA PHY is connected via
146 bool "Qualcomm External Bus Interface 2 (EBI2)"
148 depends on ARCH_QCOM || COMPILE_TEST
151 Say y here to enable support for the Qualcomm External Bus
152 Interface 2, which can be used to connect things like NAND Flash,
153 SRAM, ethernet adapters, FPGAs and LCD displays.
155 config QCOM_SSC_BLOCK_BUS
156 bool "Qualcomm SSC Block Bus Init Driver"
159 Say y here to enable support for initializing the bus that connects
160 the SSC block's internal bus to the cNoC (configurantion NoC) on
162 The SSC (Snapdragon Sensor Core) block contains a gpio controller,
163 i2c/spi/uart controllers, a hexagon core, and a clock controller
164 which provides clocks for the above.
166 config SUN50I_DE2_BUS
167 bool "Allwinner A64 DE2 Bus Driver"
169 depends on ARCH_SUNXI
172 Say y here to enable support for Allwinner A64 DE2 bus driver. It's
173 mostly transparent, but a SRAM region needs to be claimed in the SRAM
174 controller to make the all blocks in the DE2 part accessible.
177 tristate "Allwinner sunXi Reduced Serial Bus Driver"
178 default MACH_SUN8I || MACH_SUN9I || ARM64
179 depends on ARCH_SUNXI
182 Say y here to enable support for Allwinner's Reduced Serial Bus
183 (RSB) support. This controller is responsible for communicating
184 with various RSB based devices, such as AXP223, AXP8XX PMICs,
187 config TEGRA_ACONNECT
188 tristate "Tegra ACONNECT Bus Driver"
189 depends on ARCH_TEGRA_210_SOC
192 Driver for the Tegra ACONNECT bus which is used to interface with
193 the devices inside the Audio Processing Engine (APE) for Tegra210.
196 tristate "Tegra Generic Memory Interface bus driver"
197 depends on ARCH_TEGRA
199 Driver for the Tegra Generic Memory Interface bus which can be used
200 to attach devices such as NOR, UART, FPGA and more.
204 default y if (ARCH_OMAP2PLUS) && (PWM_TIECAP || PWM_TIEHRPWM || TI_EQEP)
206 PWM Subsystem driver support for AM33xx SOC.
208 PWM submodules require PWM config space access from submodule
209 drivers and require common parent driver support.
212 bool "TI sysc interconnect target module driver"
213 depends on ARCH_OMAP2PLUS || ARCH_K3
216 Generic driver for Texas Instruments interconnect target module
217 found on many TI SoCs.
220 tristate "Technologic Systems NBUS Driver"
222 depends on OF_GPIO && PWM
224 Driver for the Technologic Systems NBUS which is used to interface
225 with the peripherals in the FPGA of the TS-4600 SoM.
227 config UNIPHIER_SYSTEM_BUS
228 tristate "UniPhier System Bus driver"
229 depends on ARCH_UNIPHIER && OF
232 Support for UniPhier System Bus, a simple external bus. This is
233 needed to use on-board devices connected to UniPhier SoCs.
235 config VEXPRESS_CONFIG
236 tristate "Versatile Express configuration bus"
237 default y if ARCH_VEXPRESS
238 depends on ARM || ARM64
242 Platform configuration infrastructure for the ARM Ltd.
246 bool "TI da8xx master peripheral priority driver"
247 depends on ARCH_DAVINCI_DA8XX
249 Driver for Texas Instruments da8xx master peripheral priority
250 configuration. Allows to adjust the priorities of all master
253 source "drivers/bus/fsl-mc/Kconfig"
254 source "drivers/bus/mhi/Kconfig"