1 // SPDX-License-Identifier: GPL-2.0-only
3 * Xilinx SystemACE device driver
5 * Copyright 2007 Secret Lab Technologies Ltd.
9 * The SystemACE chip is designed to configure FPGAs by loading an FPGA
10 * bitstream from a file on a CF card and squirting it into FPGAs connected
11 * to the SystemACE JTAG chain. It also has the advantage of providing an
12 * MPU interface which can be used to control the FPGA configuration process
13 * and to use the attached CF card for general purpose storage.
15 * This driver is a block device driver for the SystemACE.
18 * The driver registers itself as a platform_device driver at module
19 * load time. The platform bus will take care of calling the
20 * ace_probe() method for all SystemACE instances in the system. Any
21 * number of SystemACE instances are supported. ace_probe() calls
22 * ace_setup() which initialized all data structures, reads the CF
23 * id structure and registers the device.
26 * Just about all of the heavy lifting in this driver is performed by
27 * a Finite State Machine (FSM). The driver needs to wait on a number
28 * of events; some raised by interrupts, some which need to be polled
29 * for. Describing all of the behaviour in a FSM seems to be the
30 * easiest way to keep the complexity low and make it easy to
31 * understand what the driver is doing. If the block ops or the
32 * request function need to interact with the hardware, then they
33 * simply need to flag the request and kick of FSM processing.
35 * The FSM itself is atomic-safe code which can be run from any
36 * context. The general process flow is:
37 * 1. obtain the ace->lock spinlock.
38 * 2. loop on ace_fsm_dostate() until the ace->fsm_continue flag is
40 * 3. release the lock.
42 * Individual states do not sleep in any way. If a condition needs to
43 * be waited for then the state much clear the fsm_continue flag and
44 * either schedule the FSM to be run again at a later time, or expect
45 * an interrupt to call the FSM when the desired condition is met.
47 * In normal operation, the FSM is processed at interrupt context
48 * either when the driver's tasklet is scheduled, or when an irq is
49 * raised by the hardware. The tasklet can be scheduled at any time.
50 * The request method in particular schedules the tasklet when a new
51 * request has been indicated by the block layer. Once started, the
52 * FSM proceeds as far as it can processing the request until it
53 * needs on a hardware event. At this point, it must yield execution.
55 * A state has two options when yielding execution:
57 * - Call if need to poll for event.
58 * - clears the fsm_continue flag to exit the processing loop
59 * - reschedules the tasklet to run again as soon as possible
60 * 2. ace_fsm_yieldirq()
61 * - Call if an irq is expected from the HW
62 * - clears the fsm_continue flag to exit the processing loop
63 * - does not reschedule the tasklet so the FSM will not be processed
64 * again until an irq is received.
65 * After calling a yield function, the state must return control back
66 * to the FSM main loop.
68 * Additionally, the driver maintains a kernel timer which can process
69 * the FSM. If the FSM gets stalled, typically due to a missed
70 * interrupt, then the kernel timer will expire and the driver can
71 * continue where it left off.
74 * - Add FPGA configuration control interface.
75 * - Request major number from lanana
80 #include <linux/module.h>
81 #include <linux/ctype.h>
82 #include <linux/init.h>
83 #include <linux/interrupt.h>
84 #include <linux/errno.h>
85 #include <linux/kernel.h>
86 #include <linux/delay.h>
87 #include <linux/slab.h>
88 #include <linux/blk-mq.h>
89 #include <linux/mutex.h>
90 #include <linux/ata.h>
91 #include <linux/hdreg.h>
92 #include <linux/platform_device.h>
93 #if defined(CONFIG_OF)
94 #include <linux/of_address.h>
95 #include <linux/of_device.h>
96 #include <linux/of_platform.h>
99 MODULE_AUTHOR("Grant Likely <grant.likely@secretlab.ca>");
100 MODULE_DESCRIPTION("Xilinx SystemACE device driver");
101 MODULE_LICENSE("GPL");
103 /* SystemACE register definitions */
104 #define ACE_BUSMODE (0x00)
106 #define ACE_STATUS (0x04)
107 #define ACE_STATUS_CFGLOCK (0x00000001)
108 #define ACE_STATUS_MPULOCK (0x00000002)
109 #define ACE_STATUS_CFGERROR (0x00000004) /* config controller error */
110 #define ACE_STATUS_CFCERROR (0x00000008) /* CF controller error */
111 #define ACE_STATUS_CFDETECT (0x00000010)
112 #define ACE_STATUS_DATABUFRDY (0x00000020)
113 #define ACE_STATUS_DATABUFMODE (0x00000040)
114 #define ACE_STATUS_CFGDONE (0x00000080)
115 #define ACE_STATUS_RDYFORCFCMD (0x00000100)
116 #define ACE_STATUS_CFGMODEPIN (0x00000200)
117 #define ACE_STATUS_CFGADDR_MASK (0x0000e000)
118 #define ACE_STATUS_CFBSY (0x00020000)
119 #define ACE_STATUS_CFRDY (0x00040000)
120 #define ACE_STATUS_CFDWF (0x00080000)
121 #define ACE_STATUS_CFDSC (0x00100000)
122 #define ACE_STATUS_CFDRQ (0x00200000)
123 #define ACE_STATUS_CFCORR (0x00400000)
124 #define ACE_STATUS_CFERR (0x00800000)
126 #define ACE_ERROR (0x08)
127 #define ACE_CFGLBA (0x0c)
128 #define ACE_MPULBA (0x10)
130 #define ACE_SECCNTCMD (0x14)
131 #define ACE_SECCNTCMD_RESET (0x0100)
132 #define ACE_SECCNTCMD_IDENTIFY (0x0200)
133 #define ACE_SECCNTCMD_READ_DATA (0x0300)
134 #define ACE_SECCNTCMD_WRITE_DATA (0x0400)
135 #define ACE_SECCNTCMD_ABORT (0x0600)
137 #define ACE_VERSION (0x16)
138 #define ACE_VERSION_REVISION_MASK (0x00FF)
139 #define ACE_VERSION_MINOR_MASK (0x0F00)
140 #define ACE_VERSION_MAJOR_MASK (0xF000)
142 #define ACE_CTRL (0x18)
143 #define ACE_CTRL_FORCELOCKREQ (0x0001)
144 #define ACE_CTRL_LOCKREQ (0x0002)
145 #define ACE_CTRL_FORCECFGADDR (0x0004)
146 #define ACE_CTRL_FORCECFGMODE (0x0008)
147 #define ACE_CTRL_CFGMODE (0x0010)
148 #define ACE_CTRL_CFGSTART (0x0020)
149 #define ACE_CTRL_CFGSEL (0x0040)
150 #define ACE_CTRL_CFGRESET (0x0080)
151 #define ACE_CTRL_DATABUFRDYIRQ (0x0100)
152 #define ACE_CTRL_ERRORIRQ (0x0200)
153 #define ACE_CTRL_CFGDONEIRQ (0x0400)
154 #define ACE_CTRL_RESETIRQ (0x0800)
155 #define ACE_CTRL_CFGPROG (0x1000)
156 #define ACE_CTRL_CFGADDR_MASK (0xe000)
158 #define ACE_FATSTAT (0x1c)
160 #define ACE_NUM_MINORS 16
161 #define ACE_SECTOR_SIZE (512)
162 #define ACE_FIFO_SIZE (32)
163 #define ACE_BUF_PER_SECTOR (ACE_SECTOR_SIZE / ACE_FIFO_SIZE)
165 #define ACE_BUS_WIDTH_8 0
166 #define ACE_BUS_WIDTH_16 1
171 /* driver state data */
175 struct list_head list;
177 /* finite state machine data */
178 struct tasklet_struct fsm_tasklet;
179 uint fsm_task; /* Current activity (ACE_TASK_*) */
180 uint fsm_state; /* Current state (ACE_FSM_STATE_*) */
181 uint fsm_continue_flag; /* cleared to exit FSM mainloop */
183 struct timer_list stall_timer;
185 /* Transfer state/result, use for both id and block request */
186 struct request *req; /* request being processed */
187 void *data_ptr; /* pointer to I/O buffer */
188 int data_count; /* number of buffers remaining */
189 int data_result; /* Result of transfer; 0 := success */
191 int id_req_count; /* count of id requests */
193 struct completion id_completion; /* used when id req finishes */
196 /* Details of hardware device */
197 resource_size_t physaddr;
198 void __iomem *baseaddr;
200 int bus_width; /* 0 := 8 bit; 1 := 16 bit */
201 struct ace_reg_ops *reg_ops;
204 /* Block device data structures */
207 struct request_queue *queue;
209 struct blk_mq_tag_set tag_set;
210 struct list_head rq_list;
212 /* Inserted CF card parameters */
213 u16 cf_id[ATA_ID_WORDS];
216 static DEFINE_MUTEX(xsysace_mutex);
217 static int ace_major;
219 /* ---------------------------------------------------------------------
220 * Low level register access
224 u16(*in) (struct ace_device * ace, int reg);
225 void (*out) (struct ace_device * ace, int reg, u16 val);
226 void (*datain) (struct ace_device * ace);
227 void (*dataout) (struct ace_device * ace);
230 /* 8 Bit bus width */
231 static u16 ace_in_8(struct ace_device *ace, int reg)
233 void __iomem *r = ace->baseaddr + reg;
234 return in_8(r) | (in_8(r + 1) << 8);
237 static void ace_out_8(struct ace_device *ace, int reg, u16 val)
239 void __iomem *r = ace->baseaddr + reg;
241 out_8(r + 1, val >> 8);
244 static void ace_datain_8(struct ace_device *ace)
246 void __iomem *r = ace->baseaddr + 0x40;
247 u8 *dst = ace->data_ptr;
248 int i = ACE_FIFO_SIZE;
254 static void ace_dataout_8(struct ace_device *ace)
256 void __iomem *r = ace->baseaddr + 0x40;
257 u8 *src = ace->data_ptr;
258 int i = ACE_FIFO_SIZE;
264 static struct ace_reg_ops ace_reg_8_ops = {
267 .datain = ace_datain_8,
268 .dataout = ace_dataout_8,
271 /* 16 bit big endian bus attachment */
272 static u16 ace_in_be16(struct ace_device *ace, int reg)
274 return in_be16(ace->baseaddr + reg);
277 static void ace_out_be16(struct ace_device *ace, int reg, u16 val)
279 out_be16(ace->baseaddr + reg, val);
282 static void ace_datain_be16(struct ace_device *ace)
284 int i = ACE_FIFO_SIZE / 2;
285 u16 *dst = ace->data_ptr;
287 *dst++ = in_le16(ace->baseaddr + 0x40);
291 static void ace_dataout_be16(struct ace_device *ace)
293 int i = ACE_FIFO_SIZE / 2;
294 u16 *src = ace->data_ptr;
296 out_le16(ace->baseaddr + 0x40, *src++);
300 /* 16 bit little endian bus attachment */
301 static u16 ace_in_le16(struct ace_device *ace, int reg)
303 return in_le16(ace->baseaddr + reg);
306 static void ace_out_le16(struct ace_device *ace, int reg, u16 val)
308 out_le16(ace->baseaddr + reg, val);
311 static void ace_datain_le16(struct ace_device *ace)
313 int i = ACE_FIFO_SIZE / 2;
314 u16 *dst = ace->data_ptr;
316 *dst++ = in_be16(ace->baseaddr + 0x40);
320 static void ace_dataout_le16(struct ace_device *ace)
322 int i = ACE_FIFO_SIZE / 2;
323 u16 *src = ace->data_ptr;
325 out_be16(ace->baseaddr + 0x40, *src++);
329 static struct ace_reg_ops ace_reg_be16_ops = {
332 .datain = ace_datain_be16,
333 .dataout = ace_dataout_be16,
336 static struct ace_reg_ops ace_reg_le16_ops = {
339 .datain = ace_datain_le16,
340 .dataout = ace_dataout_le16,
343 static inline u16 ace_in(struct ace_device *ace, int reg)
345 return ace->reg_ops->in(ace, reg);
348 static inline u32 ace_in32(struct ace_device *ace, int reg)
350 return ace_in(ace, reg) | (ace_in(ace, reg + 2) << 16);
353 static inline void ace_out(struct ace_device *ace, int reg, u16 val)
355 ace->reg_ops->out(ace, reg, val);
358 static inline void ace_out32(struct ace_device *ace, int reg, u32 val)
360 ace_out(ace, reg, val);
361 ace_out(ace, reg + 2, val >> 16);
364 /* ---------------------------------------------------------------------
365 * Debug support functions
369 static void ace_dump_mem(void *base, int len)
371 const char *ptr = base;
374 for (i = 0; i < len; i += 16) {
375 printk(KERN_INFO "%.8x:", i);
376 for (j = 0; j < 16; j++) {
379 printk("%.2x", ptr[i + j]);
382 for (j = 0; j < 16; j++)
383 printk("%c", isprint(ptr[i + j]) ? ptr[i + j] : '.');
388 static inline void ace_dump_mem(void *base, int len)
393 static void ace_dump_regs(struct ace_device *ace)
396 " ctrl: %.8x seccnt/cmd: %.4x ver:%.4x\n"
397 " status:%.8x mpu_lba:%.8x busmode:%4x\n"
398 " error: %.8x cfg_lba:%.8x fatstat:%.4x\n",
399 ace_in32(ace, ACE_CTRL),
400 ace_in(ace, ACE_SECCNTCMD),
401 ace_in(ace, ACE_VERSION),
402 ace_in32(ace, ACE_STATUS),
403 ace_in32(ace, ACE_MPULBA),
404 ace_in(ace, ACE_BUSMODE),
405 ace_in32(ace, ACE_ERROR),
406 ace_in32(ace, ACE_CFGLBA), ace_in(ace, ACE_FATSTAT));
409 static void ace_fix_driveid(u16 *id)
411 #if defined(__BIG_ENDIAN)
414 /* All half words have wrong byte order; swap the bytes */
415 for (i = 0; i < ATA_ID_WORDS; i++, id++)
416 *id = le16_to_cpu(*id);
420 /* ---------------------------------------------------------------------
421 * Finite State Machine (FSM) implementation
424 /* FSM tasks; used to direct state transitions */
425 #define ACE_TASK_IDLE 0
426 #define ACE_TASK_IDENTIFY 1
427 #define ACE_TASK_READ 2
428 #define ACE_TASK_WRITE 3
429 #define ACE_FSM_NUM_TASKS 4
431 /* FSM state definitions */
432 #define ACE_FSM_STATE_IDLE 0
433 #define ACE_FSM_STATE_REQ_LOCK 1
434 #define ACE_FSM_STATE_WAIT_LOCK 2
435 #define ACE_FSM_STATE_WAIT_CFREADY 3
436 #define ACE_FSM_STATE_IDENTIFY_PREPARE 4
437 #define ACE_FSM_STATE_IDENTIFY_TRANSFER 5
438 #define ACE_FSM_STATE_IDENTIFY_COMPLETE 6
439 #define ACE_FSM_STATE_REQ_PREPARE 7
440 #define ACE_FSM_STATE_REQ_TRANSFER 8
441 #define ACE_FSM_STATE_REQ_COMPLETE 9
442 #define ACE_FSM_STATE_ERROR 10
443 #define ACE_FSM_NUM_STATES 11
445 /* Set flag to exit FSM loop and reschedule tasklet */
446 static inline void ace_fsm_yield(struct ace_device *ace)
448 dev_dbg(ace->dev, "ace_fsm_yield()\n");
449 tasklet_schedule(&ace->fsm_tasklet);
450 ace->fsm_continue_flag = 0;
453 /* Set flag to exit FSM loop and wait for IRQ to reschedule tasklet */
454 static inline void ace_fsm_yieldirq(struct ace_device *ace)
456 dev_dbg(ace->dev, "ace_fsm_yieldirq()\n");
459 /* No IRQ assigned, so need to poll */
460 tasklet_schedule(&ace->fsm_tasklet);
461 ace->fsm_continue_flag = 0;
464 static bool ace_has_next_request(struct request_queue *q)
466 struct ace_device *ace = q->queuedata;
468 return !list_empty(&ace->rq_list);
471 /* Get the next read/write request; ending requests that we don't handle */
472 static struct request *ace_get_next_request(struct request_queue *q)
474 struct ace_device *ace = q->queuedata;
477 rq = list_first_entry_or_null(&ace->rq_list, struct request, queuelist);
479 list_del_init(&rq->queuelist);
480 blk_mq_start_request(rq);
486 static void ace_fsm_dostate(struct ace_device *ace)
494 dev_dbg(ace->dev, "fsm_state=%i, id_req_count=%i\n",
495 ace->fsm_state, ace->id_req_count);
498 /* Verify that there is actually a CF in the slot. If not, then
499 * bail out back to the idle state and wake up all the waiters */
500 status = ace_in32(ace, ACE_STATUS);
501 if ((status & ACE_STATUS_CFDETECT) == 0) {
502 ace->fsm_state = ACE_FSM_STATE_IDLE;
503 ace->media_change = 1;
504 set_capacity(ace->gd, 0);
505 dev_info(ace->dev, "No CF in slot\n");
507 /* Drop all in-flight and pending requests */
509 blk_mq_end_request(ace->req, BLK_STS_IOERR);
512 while ((req = ace_get_next_request(ace->queue)) != NULL)
513 blk_mq_end_request(req, BLK_STS_IOERR);
515 /* Drop back to IDLE state and notify waiters */
516 ace->fsm_state = ACE_FSM_STATE_IDLE;
517 ace->id_result = -EIO;
518 while (ace->id_req_count) {
519 complete(&ace->id_completion);
524 switch (ace->fsm_state) {
525 case ACE_FSM_STATE_IDLE:
526 /* See if there is anything to do */
527 if (ace->id_req_count || ace_has_next_request(ace->queue)) {
529 ace->fsm_state = ACE_FSM_STATE_REQ_LOCK;
530 mod_timer(&ace->stall_timer, jiffies + HZ);
531 if (!timer_pending(&ace->stall_timer))
532 add_timer(&ace->stall_timer);
535 del_timer(&ace->stall_timer);
536 ace->fsm_continue_flag = 0;
539 case ACE_FSM_STATE_REQ_LOCK:
540 if (ace_in(ace, ACE_STATUS) & ACE_STATUS_MPULOCK) {
541 /* Already have the lock, jump to next state */
542 ace->fsm_state = ACE_FSM_STATE_WAIT_CFREADY;
546 /* Request the lock */
547 val = ace_in(ace, ACE_CTRL);
548 ace_out(ace, ACE_CTRL, val | ACE_CTRL_LOCKREQ);
549 ace->fsm_state = ACE_FSM_STATE_WAIT_LOCK;
552 case ACE_FSM_STATE_WAIT_LOCK:
553 if (ace_in(ace, ACE_STATUS) & ACE_STATUS_MPULOCK) {
554 /* got the lock; move to next state */
555 ace->fsm_state = ACE_FSM_STATE_WAIT_CFREADY;
559 /* wait a bit for the lock */
563 case ACE_FSM_STATE_WAIT_CFREADY:
564 status = ace_in32(ace, ACE_STATUS);
565 if (!(status & ACE_STATUS_RDYFORCFCMD) ||
566 (status & ACE_STATUS_CFBSY)) {
567 /* CF card isn't ready; it needs to be polled */
572 /* Device is ready for command; determine what to do next */
573 if (ace->id_req_count)
574 ace->fsm_state = ACE_FSM_STATE_IDENTIFY_PREPARE;
576 ace->fsm_state = ACE_FSM_STATE_REQ_PREPARE;
579 case ACE_FSM_STATE_IDENTIFY_PREPARE:
580 /* Send identify command */
581 ace->fsm_task = ACE_TASK_IDENTIFY;
582 ace->data_ptr = ace->cf_id;
583 ace->data_count = ACE_BUF_PER_SECTOR;
584 ace_out(ace, ACE_SECCNTCMD, ACE_SECCNTCMD_IDENTIFY);
586 /* As per datasheet, put config controller in reset */
587 val = ace_in(ace, ACE_CTRL);
588 ace_out(ace, ACE_CTRL, val | ACE_CTRL_CFGRESET);
590 /* irq handler takes over from this point; wait for the
591 * transfer to complete */
592 ace->fsm_state = ACE_FSM_STATE_IDENTIFY_TRANSFER;
593 ace_fsm_yieldirq(ace);
596 case ACE_FSM_STATE_IDENTIFY_TRANSFER:
597 /* Check that the sysace is ready to receive data */
598 status = ace_in32(ace, ACE_STATUS);
599 if (status & ACE_STATUS_CFBSY) {
600 dev_dbg(ace->dev, "CFBSY set; t=%i iter=%i dc=%i\n",
601 ace->fsm_task, ace->fsm_iter_num,
606 if (!(status & ACE_STATUS_DATABUFRDY)) {
611 /* Transfer the next buffer */
612 ace->reg_ops->datain(ace);
615 /* If there are still buffers to be transfers; jump out here */
616 if (ace->data_count != 0) {
617 ace_fsm_yieldirq(ace);
621 /* transfer finished; kick state machine */
622 dev_dbg(ace->dev, "identify finished\n");
623 ace->fsm_state = ACE_FSM_STATE_IDENTIFY_COMPLETE;
626 case ACE_FSM_STATE_IDENTIFY_COMPLETE:
627 ace_fix_driveid(ace->cf_id);
628 ace_dump_mem(ace->cf_id, 512); /* Debug: Dump out disk ID */
630 if (ace->data_result) {
631 /* Error occurred, disable the disk */
632 ace->media_change = 1;
633 set_capacity(ace->gd, 0);
634 dev_err(ace->dev, "error fetching CF id (%i)\n",
637 ace->media_change = 0;
639 /* Record disk parameters */
640 set_capacity(ace->gd,
641 ata_id_u32(ace->cf_id, ATA_ID_LBA_CAPACITY));
642 dev_info(ace->dev, "capacity: %i sectors\n",
643 ata_id_u32(ace->cf_id, ATA_ID_LBA_CAPACITY));
646 /* We're done, drop to IDLE state and notify waiters */
647 ace->fsm_state = ACE_FSM_STATE_IDLE;
648 ace->id_result = ace->data_result;
649 while (ace->id_req_count) {
650 complete(&ace->id_completion);
655 case ACE_FSM_STATE_REQ_PREPARE:
656 req = ace_get_next_request(ace->queue);
658 ace->fsm_state = ACE_FSM_STATE_IDLE;
662 /* Okay, it's a data request, set it up for transfer */
664 "request: sec=%llx hcnt=%x, ccnt=%x, dir=%i\n",
665 (unsigned long long)blk_rq_pos(req),
666 blk_rq_sectors(req), blk_rq_cur_sectors(req),
670 ace->data_ptr = bio_data(req->bio);
671 ace->data_count = blk_rq_cur_sectors(req) * ACE_BUF_PER_SECTOR;
672 ace_out32(ace, ACE_MPULBA, blk_rq_pos(req) & 0x0FFFFFFF);
674 count = blk_rq_sectors(req);
675 if (rq_data_dir(req)) {
676 /* Kick off write request */
677 dev_dbg(ace->dev, "write data\n");
678 ace->fsm_task = ACE_TASK_WRITE;
679 ace_out(ace, ACE_SECCNTCMD,
680 count | ACE_SECCNTCMD_WRITE_DATA);
682 /* Kick off read request */
683 dev_dbg(ace->dev, "read data\n");
684 ace->fsm_task = ACE_TASK_READ;
685 ace_out(ace, ACE_SECCNTCMD,
686 count | ACE_SECCNTCMD_READ_DATA);
689 /* As per datasheet, put config controller in reset */
690 val = ace_in(ace, ACE_CTRL);
691 ace_out(ace, ACE_CTRL, val | ACE_CTRL_CFGRESET);
693 /* Move to the transfer state. The systemace will raise
694 * an interrupt once there is something to do
696 ace->fsm_state = ACE_FSM_STATE_REQ_TRANSFER;
697 if (ace->fsm_task == ACE_TASK_READ)
698 ace_fsm_yieldirq(ace); /* wait for data ready */
701 case ACE_FSM_STATE_REQ_TRANSFER:
702 /* Check that the sysace is ready to receive data */
703 status = ace_in32(ace, ACE_STATUS);
704 if (status & ACE_STATUS_CFBSY) {
706 "CFBSY set; t=%i iter=%i c=%i dc=%i irq=%i\n",
707 ace->fsm_task, ace->fsm_iter_num,
708 blk_rq_cur_sectors(ace->req) * 16,
709 ace->data_count, ace->in_irq);
710 ace_fsm_yield(ace); /* need to poll CFBSY bit */
713 if (!(status & ACE_STATUS_DATABUFRDY)) {
715 "DATABUF not set; t=%i iter=%i c=%i dc=%i irq=%i\n",
716 ace->fsm_task, ace->fsm_iter_num,
717 blk_rq_cur_sectors(ace->req) * 16,
718 ace->data_count, ace->in_irq);
719 ace_fsm_yieldirq(ace);
723 /* Transfer the next buffer */
724 if (ace->fsm_task == ACE_TASK_WRITE)
725 ace->reg_ops->dataout(ace);
727 ace->reg_ops->datain(ace);
730 /* If there are still buffers to be transfers; jump out here */
731 if (ace->data_count != 0) {
732 ace_fsm_yieldirq(ace);
736 /* bio finished; is there another one? */
737 if (blk_update_request(ace->req, BLK_STS_OK,
738 blk_rq_cur_bytes(ace->req))) {
739 /* dev_dbg(ace->dev, "next block; h=%u c=%u\n",
740 * blk_rq_sectors(ace->req),
741 * blk_rq_cur_sectors(ace->req));
743 ace->data_ptr = bio_data(ace->req->bio);
744 ace->data_count = blk_rq_cur_sectors(ace->req) * 16;
745 ace_fsm_yieldirq(ace);
749 ace->fsm_state = ACE_FSM_STATE_REQ_COMPLETE;
752 case ACE_FSM_STATE_REQ_COMPLETE:
755 /* Finished request; go to idle state */
756 ace->fsm_state = ACE_FSM_STATE_IDLE;
760 ace->fsm_state = ACE_FSM_STATE_IDLE;
765 static void ace_fsm_tasklet(unsigned long data)
767 struct ace_device *ace = (void *)data;
770 spin_lock_irqsave(&ace->lock, flags);
772 /* Loop over state machine until told to stop */
773 ace->fsm_continue_flag = 1;
774 while (ace->fsm_continue_flag)
775 ace_fsm_dostate(ace);
777 spin_unlock_irqrestore(&ace->lock, flags);
780 static void ace_stall_timer(struct timer_list *t)
782 struct ace_device *ace = from_timer(ace, t, stall_timer);
786 "kicking stalled fsm; state=%i task=%i iter=%i dc=%i\n",
787 ace->fsm_state, ace->fsm_task, ace->fsm_iter_num,
789 spin_lock_irqsave(&ace->lock, flags);
791 /* Rearm the stall timer *before* entering FSM (which may then
792 * delete the timer) */
793 mod_timer(&ace->stall_timer, jiffies + HZ);
795 /* Loop over state machine until told to stop */
796 ace->fsm_continue_flag = 1;
797 while (ace->fsm_continue_flag)
798 ace_fsm_dostate(ace);
800 spin_unlock_irqrestore(&ace->lock, flags);
803 /* ---------------------------------------------------------------------
804 * Interrupt handling routines
806 static int ace_interrupt_checkstate(struct ace_device *ace)
808 u32 sreg = ace_in32(ace, ACE_STATUS);
809 u16 creg = ace_in(ace, ACE_CTRL);
811 /* Check for error occurrence */
812 if ((sreg & (ACE_STATUS_CFGERROR | ACE_STATUS_CFCERROR)) &&
813 (creg & ACE_CTRL_ERRORIRQ)) {
814 dev_err(ace->dev, "transfer failure\n");
822 static irqreturn_t ace_interrupt(int irq, void *dev_id)
825 struct ace_device *ace = dev_id;
827 /* be safe and get the lock */
828 spin_lock(&ace->lock);
831 /* clear the interrupt */
832 creg = ace_in(ace, ACE_CTRL);
833 ace_out(ace, ACE_CTRL, creg | ACE_CTRL_RESETIRQ);
834 ace_out(ace, ACE_CTRL, creg);
836 /* check for IO failures */
837 if (ace_interrupt_checkstate(ace))
838 ace->data_result = -EIO;
840 if (ace->fsm_task == 0) {
842 "spurious irq; stat=%.8x ctrl=%.8x cmd=%.4x\n",
843 ace_in32(ace, ACE_STATUS), ace_in32(ace, ACE_CTRL),
844 ace_in(ace, ACE_SECCNTCMD));
845 dev_err(ace->dev, "fsm_task=%i fsm_state=%i data_count=%i\n",
846 ace->fsm_task, ace->fsm_state, ace->data_count);
849 /* Loop over state machine until told to stop */
850 ace->fsm_continue_flag = 1;
851 while (ace->fsm_continue_flag)
852 ace_fsm_dostate(ace);
854 /* done with interrupt; drop the lock */
856 spin_unlock(&ace->lock);
861 /* ---------------------------------------------------------------------
864 static blk_status_t ace_queue_rq(struct blk_mq_hw_ctx *hctx,
865 const struct blk_mq_queue_data *bd)
867 struct ace_device *ace = hctx->queue->queuedata;
868 struct request *req = bd->rq;
870 if (blk_rq_is_passthrough(req)) {
871 blk_mq_start_request(req);
872 return BLK_STS_IOERR;
875 spin_lock_irq(&ace->lock);
876 list_add_tail(&req->queuelist, &ace->rq_list);
877 spin_unlock_irq(&ace->lock);
879 tasklet_schedule(&ace->fsm_tasklet);
883 static unsigned int ace_check_events(struct gendisk *gd, unsigned int clearing)
885 struct ace_device *ace = gd->private_data;
886 dev_dbg(ace->dev, "ace_check_events(): %i\n", ace->media_change);
888 return ace->media_change ? DISK_EVENT_MEDIA_CHANGE : 0;
891 static void ace_media_changed(struct ace_device *ace)
895 dev_dbg(ace->dev, "requesting cf id and scheduling tasklet\n");
897 spin_lock_irqsave(&ace->lock, flags);
899 spin_unlock_irqrestore(&ace->lock, flags);
901 tasklet_schedule(&ace->fsm_tasklet);
902 wait_for_completion(&ace->id_completion);
904 dev_dbg(ace->dev, "revalidate complete\n");
907 static int ace_open(struct block_device *bdev, fmode_t mode)
909 struct ace_device *ace = bdev->bd_disk->private_data;
912 dev_dbg(ace->dev, "ace_open() users=%i\n", ace->users + 1);
914 mutex_lock(&xsysace_mutex);
915 spin_lock_irqsave(&ace->lock, flags);
917 spin_unlock_irqrestore(&ace->lock, flags);
919 if (bdev_check_media_change(bdev) && ace->media_change)
920 ace_media_changed(ace);
921 mutex_unlock(&xsysace_mutex);
926 static void ace_release(struct gendisk *disk, fmode_t mode)
928 struct ace_device *ace = disk->private_data;
932 dev_dbg(ace->dev, "ace_release() users=%i\n", ace->users - 1);
934 mutex_lock(&xsysace_mutex);
935 spin_lock_irqsave(&ace->lock, flags);
937 if (ace->users == 0) {
938 val = ace_in(ace, ACE_CTRL);
939 ace_out(ace, ACE_CTRL, val & ~ACE_CTRL_LOCKREQ);
941 spin_unlock_irqrestore(&ace->lock, flags);
942 mutex_unlock(&xsysace_mutex);
945 static int ace_getgeo(struct block_device *bdev, struct hd_geometry *geo)
947 struct ace_device *ace = bdev->bd_disk->private_data;
948 u16 *cf_id = ace->cf_id;
950 dev_dbg(ace->dev, "ace_getgeo()\n");
952 geo->heads = cf_id[ATA_ID_HEADS];
953 geo->sectors = cf_id[ATA_ID_SECTORS];
954 geo->cylinders = cf_id[ATA_ID_CYLS];
959 static const struct block_device_operations ace_fops = {
960 .owner = THIS_MODULE,
962 .release = ace_release,
963 .check_events = ace_check_events,
964 .getgeo = ace_getgeo,
967 static const struct blk_mq_ops ace_mq_ops = {
968 .queue_rq = ace_queue_rq,
971 /* --------------------------------------------------------------------
972 * SystemACE device setup/teardown code
974 static int ace_setup(struct ace_device *ace)
980 dev_dbg(ace->dev, "ace_setup(ace=0x%p)\n", ace);
981 dev_dbg(ace->dev, "physaddr=0x%llx irq=%i\n",
982 (unsigned long long)ace->physaddr, ace->irq);
984 spin_lock_init(&ace->lock);
985 init_completion(&ace->id_completion);
986 INIT_LIST_HEAD(&ace->rq_list);
991 ace->baseaddr = ioremap(ace->physaddr, 0x80);
996 * Initialize the state machine tasklet and stall timer
998 tasklet_init(&ace->fsm_tasklet, ace_fsm_tasklet, (unsigned long)ace);
999 timer_setup(&ace->stall_timer, ace_stall_timer, 0);
1002 * Initialize the request queue
1004 ace->queue = blk_mq_init_sq_queue(&ace->tag_set, &ace_mq_ops, 2,
1005 BLK_MQ_F_SHOULD_MERGE);
1006 if (IS_ERR(ace->queue)) {
1007 rc = PTR_ERR(ace->queue);
1011 ace->queue->queuedata = ace;
1013 blk_queue_logical_block_size(ace->queue, 512);
1014 blk_queue_bounce_limit(ace->queue, BLK_BOUNCE_HIGH);
1017 * Allocate and initialize GD structure
1019 ace->gd = alloc_disk(ACE_NUM_MINORS);
1021 goto err_alloc_disk;
1023 ace->gd->major = ace_major;
1024 ace->gd->first_minor = ace->id * ACE_NUM_MINORS;
1025 ace->gd->fops = &ace_fops;
1026 ace->gd->events = DISK_EVENT_MEDIA_CHANGE;
1027 ace->gd->queue = ace->queue;
1028 ace->gd->private_data = ace;
1029 snprintf(ace->gd->disk_name, 32, "xs%c", ace->id + 'a');
1032 if (ace->bus_width == ACE_BUS_WIDTH_16) {
1033 /* 0x0101 should work regardless of endianess */
1034 ace_out_le16(ace, ACE_BUSMODE, 0x0101);
1036 /* read it back to determine endianess */
1037 if (ace_in_le16(ace, ACE_BUSMODE) == 0x0001)
1038 ace->reg_ops = &ace_reg_le16_ops;
1040 ace->reg_ops = &ace_reg_be16_ops;
1042 ace_out_8(ace, ACE_BUSMODE, 0x00);
1043 ace->reg_ops = &ace_reg_8_ops;
1046 /* Make sure version register is sane */
1047 version = ace_in(ace, ACE_VERSION);
1048 if ((version == 0) || (version == 0xFFFF))
1051 /* Put sysace in a sane state by clearing most control reg bits */
1052 ace_out(ace, ACE_CTRL, ACE_CTRL_FORCECFGMODE |
1053 ACE_CTRL_DATABUFRDYIRQ | ACE_CTRL_ERRORIRQ);
1055 /* Now we can hook up the irq handler */
1057 rc = request_irq(ace->irq, ace_interrupt, 0, "systemace", ace);
1059 /* Failure - fall back to polled mode */
1060 dev_err(ace->dev, "request_irq failed\n");
1065 /* Enable interrupts */
1066 val = ace_in(ace, ACE_CTRL);
1067 val |= ACE_CTRL_DATABUFRDYIRQ | ACE_CTRL_ERRORIRQ;
1068 ace_out(ace, ACE_CTRL, val);
1070 /* Print the identification */
1071 dev_info(ace->dev, "Xilinx SystemACE revision %i.%i.%i\n",
1072 (version >> 12) & 0xf, (version >> 8) & 0x0f, version & 0xff);
1073 dev_dbg(ace->dev, "physaddr 0x%llx, mapped to 0x%p, irq=%i\n",
1074 (unsigned long long) ace->physaddr, ace->baseaddr, ace->irq);
1076 ace->media_change = 1;
1077 ace_media_changed(ace);
1079 /* Make the sysace device 'live' */
1085 /* prevent double queue cleanup */
1086 ace->gd->queue = NULL;
1089 blk_cleanup_queue(ace->queue);
1090 blk_mq_free_tag_set(&ace->tag_set);
1092 iounmap(ace->baseaddr);
1094 dev_info(ace->dev, "xsysace: error initializing device at 0x%llx\n",
1095 (unsigned long long) ace->physaddr);
1099 static void ace_teardown(struct ace_device *ace)
1102 del_gendisk(ace->gd);
1107 blk_cleanup_queue(ace->queue);
1108 blk_mq_free_tag_set(&ace->tag_set);
1111 tasklet_kill(&ace->fsm_tasklet);
1114 free_irq(ace->irq, ace);
1116 iounmap(ace->baseaddr);
1119 static int ace_alloc(struct device *dev, int id, resource_size_t physaddr,
1120 int irq, int bus_width)
1122 struct ace_device *ace;
1124 dev_dbg(dev, "ace_alloc(%p)\n", dev);
1131 /* Allocate and initialize the ace device structure */
1132 ace = kzalloc(sizeof(struct ace_device), GFP_KERNEL);
1140 ace->physaddr = physaddr;
1142 ace->bus_width = bus_width;
1144 /* Call the setup code */
1145 rc = ace_setup(ace);
1149 dev_set_drvdata(dev, ace);
1153 dev_set_drvdata(dev, NULL);
1157 dev_err(dev, "could not initialize device, err=%i\n", rc);
1161 static void ace_free(struct device *dev)
1163 struct ace_device *ace = dev_get_drvdata(dev);
1164 dev_dbg(dev, "ace_free(%p)\n", dev);
1168 dev_set_drvdata(dev, NULL);
1173 /* ---------------------------------------------------------------------
1174 * Platform Bus Support
1177 static int ace_probe(struct platform_device *dev)
1179 resource_size_t physaddr = 0;
1180 int bus_width = ACE_BUS_WIDTH_16; /* FIXME: should not be hard coded */
1185 dev_dbg(&dev->dev, "ace_probe(%p)\n", dev);
1187 /* device id and bus width */
1188 if (of_property_read_u32(dev->dev.of_node, "port-number", &id))
1190 if (of_find_property(dev->dev.of_node, "8-bit", NULL))
1191 bus_width = ACE_BUS_WIDTH_8;
1193 for (i = 0; i < dev->num_resources; i++) {
1194 if (dev->resource[i].flags & IORESOURCE_MEM)
1195 physaddr = dev->resource[i].start;
1196 if (dev->resource[i].flags & IORESOURCE_IRQ)
1197 irq = dev->resource[i].start;
1200 /* Call the bus-independent setup code */
1201 return ace_alloc(&dev->dev, id, physaddr, irq, bus_width);
1205 * Platform bus remove() method
1207 static int ace_remove(struct platform_device *dev)
1209 ace_free(&dev->dev);
1213 #if defined(CONFIG_OF)
1214 /* Match table for of_platform binding */
1215 static const struct of_device_id ace_of_match[] = {
1216 { .compatible = "xlnx,opb-sysace-1.00.b", },
1217 { .compatible = "xlnx,opb-sysace-1.00.c", },
1218 { .compatible = "xlnx,xps-sysace-1.00.a", },
1219 { .compatible = "xlnx,sysace", },
1222 MODULE_DEVICE_TABLE(of, ace_of_match);
1223 #else /* CONFIG_OF */
1224 #define ace_of_match NULL
1225 #endif /* CONFIG_OF */
1227 static struct platform_driver ace_platform_driver = {
1229 .remove = ace_remove,
1232 .of_match_table = ace_of_match,
1236 /* ---------------------------------------------------------------------
1237 * Module init/exit routines
1239 static int __init ace_init(void)
1243 ace_major = register_blkdev(ace_major, "xsysace");
1244 if (ace_major <= 0) {
1249 rc = platform_driver_register(&ace_platform_driver);
1253 pr_info("Xilinx SystemACE device driver, major=%i\n", ace_major);
1257 unregister_blkdev(ace_major, "xsysace");
1259 printk(KERN_ERR "xsysace: registration failed; err=%i\n", rc);
1262 module_init(ace_init);
1264 static void __exit ace_exit(void)
1266 pr_debug("Unregistering Xilinx SystemACE driver\n");
1267 platform_driver_unregister(&ace_platform_driver);
1268 unregister_blkdev(ace_major, "xsysace");
1270 module_exit(ace_exit);