1 // SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2000-2011
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
18 # define EIEIO __asm__ volatile ("eieio")
19 # define SYNC __asm__ volatile ("sync")
21 # define EIEIO /* nothing */
22 # define SYNC /* nothing */
25 /* Current offset for IDE0 / IDE1 bus access */
26 ulong ide_bus_offset[CONFIG_SYS_IDE_MAXBUS] = {
27 #if defined(CONFIG_SYS_ATA_IDE0_OFFSET)
28 CONFIG_SYS_ATA_IDE0_OFFSET,
30 #if defined(CONFIG_SYS_ATA_IDE1_OFFSET) && (CONFIG_SYS_IDE_MAXBUS > 1)
31 CONFIG_SYS_ATA_IDE1_OFFSET,
35 static int ide_bus_ok[CONFIG_SYS_IDE_MAXBUS];
37 struct blk_desc ide_dev_desc[CONFIG_SYS_IDE_MAXDEVICE];
39 #define IDE_TIME_OUT 2000 /* 2 sec timeout */
41 #define ATAPI_TIME_OUT 7000 /* 7 sec timeout (5 sec seems to work...) */
43 #define IDE_SPIN_UP_TIME_OUT 5000 /* 5 sec spin-up timeout */
45 #ifndef CONFIG_SYS_ATA_PORT_ADDR
46 #define CONFIG_SYS_ATA_PORT_ADDR(port) (port)
49 #ifdef CONFIG_IDE_RESET
50 extern void ide_set_reset(int idereset);
52 static void ide_reset(void)
56 for (i = 0; i < CONFIG_SYS_IDE_MAXBUS; ++i)
58 for (i = 0; i < CONFIG_SYS_IDE_MAXDEVICE; ++i)
59 ide_dev_desc[i].type = DEV_TYPE_UNKNOWN;
61 ide_set_reset(1); /* assert reset */
63 /* the reset signal shall be asserted for et least 25 us */
68 /* de-assert RESET signal */
72 for (i = 0; i < 250; ++i)
76 #define ide_reset() /* dummy */
77 #endif /* CONFIG_IDE_RESET */
80 * Wait until Busy bit is off, or timeout (in ms)
83 static uchar ide_wait(int dev, ulong t)
85 ulong delay = 10 * t; /* poll every 100 us */
88 while ((c = ide_inb(dev, ATA_STATUS)) & ATA_STAT_BUSY) {
97 * copy src to dest, skipping leading and trailing blanks and null
98 * terminate the string
99 * "len" is the size of available memory including the terminating '\0'
101 static void ident_cpy(unsigned char *dst, unsigned char *src,
104 unsigned char *end, *last;
109 /* reserve space for '\0' */
113 /* skip leading white space */
114 while ((*src) && (src < end) && (*src == ' '))
117 /* copy string, omitting trailing white space */
118 while ((*src) && (src < end)) {
128 /****************************************************************************
132 #if defined(CONFIG_IDE_SWAP_IO)
133 /* since ATAPI may use commands with not 4 bytes alligned length
134 * we have our own transfer functions, 2 bytes alligned */
135 __weak void ide_output_data_shorts(int dev, ushort *sect_buf, int shorts)
138 volatile ushort *pbuf;
140 pbuf = (ushort *)(ATA_CURR_BASE(dev) + ATA_DATA_REG);
141 dbuf = (ushort *)sect_buf;
143 debug("in output data shorts base for read is %lx\n",
144 (unsigned long) pbuf);
152 __weak void ide_input_data_shorts(int dev, ushort *sect_buf, int shorts)
155 volatile ushort *pbuf;
157 pbuf = (ushort *)(ATA_CURR_BASE(dev) + ATA_DATA_REG);
158 dbuf = (ushort *)sect_buf;
160 debug("in input data shorts base for read is %lx\n",
161 (unsigned long) pbuf);
169 #else /* ! CONFIG_IDE_SWAP_IO */
170 __weak void ide_output_data_shorts(int dev, ushort *sect_buf, int shorts)
172 outsw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, shorts);
175 __weak void ide_input_data_shorts(int dev, ushort *sect_buf, int shorts)
177 insw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, shorts);
180 #endif /* CONFIG_IDE_SWAP_IO */
183 * Wait until (Status & mask) == res, or timeout (in ms)
185 * This is used since some ATAPI CD ROMs clears their Busy Bit first
186 * and then they set their DRQ Bit
188 static uchar atapi_wait_mask(int dev, ulong t, uchar mask, uchar res)
190 ulong delay = 10 * t; /* poll every 100 us */
193 /* prevents to read the status before valid */
194 c = ide_inb(dev, ATA_DEV_CTL);
196 while (((c = ide_inb(dev, ATA_STATUS)) & mask) != res) {
197 /* break if error occurs (doesn't make sense to wait more) */
198 if ((c & ATA_STAT_ERR) == ATA_STAT_ERR)
208 * issue an atapi command
210 unsigned char atapi_issue(int device, unsigned char *ccb, int ccblen,
211 unsigned char *buffer, int buflen)
213 unsigned char c, err, mask, res;
218 mask = ATA_STAT_BUSY | ATA_STAT_DRQ;
220 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
221 c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
222 if ((c & mask) != res) {
223 printf("ATAPI_ISSUE: device %d not ready status %X\n", device,
229 ide_outb(device, ATA_ERROR_REG, 0); /* no DMA, no overlaped */
230 ide_outb(device, ATA_SECT_CNT, 0);
231 ide_outb(device, ATA_SECT_NUM, 0);
232 ide_outb(device, ATA_CYL_LOW, (unsigned char) (buflen & 0xFF));
233 ide_outb(device, ATA_CYL_HIGH,
234 (unsigned char) ((buflen >> 8) & 0xFF));
235 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
237 ide_outb(device, ATA_COMMAND, ATA_CMD_PACKET);
240 mask = ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR;
242 c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
244 if ((c & mask) != res) { /* DRQ must be 1, BSY 0 */
245 printf("ATAPI_ISSUE: Error (no IRQ) before sending ccb dev %d status 0x%02x\n",
251 /* write command block */
252 ide_output_data_shorts(device, (unsigned short *)ccb, ccblen / 2);
254 /* ATAPI Command written wait for completition */
255 udelay(5000); /* device must set bsy */
257 mask = ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR;
259 * if no data wait for DRQ = 0 BSY = 0
260 * if data wait for DRQ = 1 BSY = 0
265 c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
266 if ((c & mask) != res) {
267 if (c & ATA_STAT_ERR) {
268 err = (ide_inb(device, ATA_ERROR_REG)) >> 4;
269 debug("atapi_issue 1 returned sense key %X status %02X\n",
272 printf("ATAPI_ISSUE: (no DRQ) after sending ccb (%x) status 0x%02x\n",
278 n = ide_inb(device, ATA_CYL_HIGH);
280 n += ide_inb(device, ATA_CYL_LOW);
282 printf("ERROR, transfer bytes %d requested only %d\n", n,
287 if ((n == 0) && (buflen < 0)) {
288 printf("ERROR, transfer bytes %d requested %d\n", n, buflen);
293 debug("WARNING, transfer bytes %d not equal with requested %d\n",
296 if (n != 0) { /* data transfer */
297 debug("ATAPI_ISSUE: %d Bytes to transfer\n", n);
298 /* we transfer shorts */
300 /* ok now decide if it is an in or output */
301 if ((ide_inb(device, ATA_SECT_CNT) & 0x02) == 0) {
302 debug("Write to device\n");
303 ide_output_data_shorts(device, (unsigned short *)buffer,
306 debug("Read from device @ %p shorts %d\n", buffer, n);
307 ide_input_data_shorts(device, (unsigned short *)buffer,
311 udelay(5000); /* seems that some CD ROMs need this... */
312 mask = ATA_STAT_BUSY | ATA_STAT_ERR;
314 c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
315 if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
316 err = (ide_inb(device, ATA_ERROR_REG) >> 4);
317 debug("atapi_issue 2 returned sense key %X status %X\n", err,
327 * sending the command to atapi_issue. If an status other than good
328 * returns, an request_sense will be issued
331 #define ATAPI_DRIVE_NOT_READY 100
332 #define ATAPI_UNIT_ATTN 10
334 unsigned char atapi_issue_autoreq(int device,
337 unsigned char *buffer, int buflen)
339 unsigned char sense_data[18], sense_ccb[12];
340 unsigned char res, key, asc, ascq;
341 int notready, unitattn;
343 unitattn = ATAPI_UNIT_ATTN;
344 notready = ATAPI_DRIVE_NOT_READY;
347 res = atapi_issue(device, ccb, ccblen, buffer, buflen);
352 return 0xFF; /* error */
354 debug("(auto_req)atapi_issue returned sense key %X\n", res);
356 memset(sense_ccb, 0, sizeof(sense_ccb));
357 memset(sense_data, 0, sizeof(sense_data));
358 sense_ccb[0] = ATAPI_CMD_REQ_SENSE;
359 sense_ccb[4] = 18; /* allocation Length */
361 res = atapi_issue(device, sense_ccb, 12, sense_data, 18);
362 key = (sense_data[2] & 0xF);
363 asc = (sense_data[12]);
364 ascq = (sense_data[13]);
366 debug("ATAPI_CMD_REQ_SENSE returned %x\n", res);
367 debug(" Sense page: %02X key %02X ASC %02X ASCQ %02X\n",
368 sense_data[0], key, asc, ascq);
371 return 0; /* ok device ready */
373 if ((key == 6) || (asc == 0x29) || (asc == 0x28)) { /* Unit Attention */
374 if (unitattn-- > 0) {
378 printf("Unit Attention, tried %d\n", ATAPI_UNIT_ATTN);
381 if ((asc == 0x4) && (ascq == 0x1)) {
382 /* not ready, but will be ready soon */
383 if (notready-- > 0) {
387 printf("Drive not ready, tried %d times\n",
388 ATAPI_DRIVE_NOT_READY);
392 debug("Media not present\n");
396 printf("ERROR: Unknown Sense key %02X ASC %02X ASCQ %02X\n", key, asc,
399 debug("ERROR Sense key %02X ASC %02X ASCQ %02X\n", key, asc, ascq);
405 * we transfer only one block per command, since the multiple DRQ per
406 * command is not yet implemented
408 #define ATAPI_READ_MAX_BYTES 2048 /* we read max 2kbytes */
409 #define ATAPI_READ_BLOCK_SIZE 2048 /* assuming CD part */
410 #define ATAPI_READ_MAX_BLOCK (ATAPI_READ_MAX_BYTES/ATAPI_READ_BLOCK_SIZE)
412 ulong atapi_read(struct blk_desc *block_dev, lbaint_t blknr, lbaint_t blkcnt,
415 int device = block_dev->devnum;
417 unsigned char ccb[12]; /* Command descriptor block */
420 debug("atapi_read dev %d start " LBAF " blocks " LBAF
421 " buffer at %lX\n", device, blknr, blkcnt, (ulong) buffer);
424 if (blkcnt > ATAPI_READ_MAX_BLOCK)
425 cnt = ATAPI_READ_MAX_BLOCK;
429 ccb[0] = ATAPI_CMD_READ_12;
430 ccb[1] = 0; /* reserved */
431 ccb[2] = (unsigned char) (blknr >> 24) & 0xFF; /* MSB Block */
432 ccb[3] = (unsigned char) (blknr >> 16) & 0xFF; /* */
433 ccb[4] = (unsigned char) (blknr >> 8) & 0xFF;
434 ccb[5] = (unsigned char) blknr & 0xFF; /* LSB Block */
435 ccb[6] = (unsigned char) (cnt >> 24) & 0xFF; /* MSB Block cnt */
436 ccb[7] = (unsigned char) (cnt >> 16) & 0xFF;
437 ccb[8] = (unsigned char) (cnt >> 8) & 0xFF;
438 ccb[9] = (unsigned char) cnt & 0xFF; /* LSB Block */
439 ccb[10] = 0; /* reserved */
440 ccb[11] = 0; /* reserved */
442 if (atapi_issue_autoreq(device, ccb, 12,
443 (unsigned char *)buffer,
444 cnt * ATAPI_READ_BLOCK_SIZE)
451 buffer += (cnt * ATAPI_READ_BLOCK_SIZE);
452 } while (blkcnt > 0);
456 static void atapi_inquiry(struct blk_desc *dev_desc)
458 unsigned char ccb[12]; /* Command descriptor block */
459 unsigned char iobuf[64]; /* temp buf */
463 device = dev_desc->devnum;
464 dev_desc->type = DEV_TYPE_UNKNOWN; /* not yet valid */
466 dev_desc->block_read = atapi_read;
469 memset(ccb, 0, sizeof(ccb));
470 memset(iobuf, 0, sizeof(iobuf));
472 ccb[0] = ATAPI_CMD_INQUIRY;
473 ccb[4] = 40; /* allocation Legnth */
474 c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *)iobuf, 40);
476 debug("ATAPI_CMD_INQUIRY returned %x\n", c);
480 /* copy device ident strings */
481 ident_cpy((unsigned char *)dev_desc->vendor, &iobuf[8], 8);
482 ident_cpy((unsigned char *)dev_desc->product, &iobuf[16], 16);
483 ident_cpy((unsigned char *)dev_desc->revision, &iobuf[32], 5);
488 dev_desc->log2blksz = LOG2_INVALID(typeof(dev_desc->log2blksz));
489 dev_desc->type = iobuf[0] & 0x1f;
491 if ((iobuf[1] & 0x80) == 0x80)
492 dev_desc->removable = 1;
494 dev_desc->removable = 0;
496 memset(ccb, 0, sizeof(ccb));
497 memset(iobuf, 0, sizeof(iobuf));
498 ccb[0] = ATAPI_CMD_START_STOP;
499 ccb[4] = 0x03; /* start */
501 c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *)iobuf, 0);
503 debug("ATAPI_CMD_START_STOP returned %x\n", c);
507 memset(ccb, 0, sizeof(ccb));
508 memset(iobuf, 0, sizeof(iobuf));
509 c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *)iobuf, 0);
511 debug("ATAPI_CMD_UNIT_TEST_READY returned %x\n", c);
515 memset(ccb, 0, sizeof(ccb));
516 memset(iobuf, 0, sizeof(iobuf));
517 ccb[0] = ATAPI_CMD_READ_CAP;
518 c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *)iobuf, 8);
519 debug("ATAPI_CMD_READ_CAP returned %x\n", c);
523 debug("Read Cap: LBA %02X%02X%02X%02X blksize %02X%02X%02X%02X\n",
524 iobuf[0], iobuf[1], iobuf[2], iobuf[3],
525 iobuf[4], iobuf[5], iobuf[6], iobuf[7]);
527 dev_desc->lba = ((unsigned long) iobuf[0] << 24) +
528 ((unsigned long) iobuf[1] << 16) +
529 ((unsigned long) iobuf[2] << 8) + ((unsigned long) iobuf[3]);
530 dev_desc->blksz = ((unsigned long) iobuf[4] << 24) +
531 ((unsigned long) iobuf[5] << 16) +
532 ((unsigned long) iobuf[6] << 8) + ((unsigned long) iobuf[7]);
533 dev_desc->log2blksz = LOG2(dev_desc->blksz);
535 /* ATAPI devices cannot use 48bit addressing (ATA/ATAPI v7) */
541 #endif /* CONFIG_ATAPI */
543 static void ide_ident(struct blk_desc *dev_desc)
553 device = dev_desc->devnum;
554 printf(" Device %d: ", device);
558 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
559 dev_desc->if_type = IF_TYPE_IDE;
564 /* Warning: This will be tricky to read */
565 while (retries <= 1) {
566 /* check signature */
567 if ((ide_inb(device, ATA_SECT_CNT) == 0x01) &&
568 (ide_inb(device, ATA_SECT_NUM) == 0x01) &&
569 (ide_inb(device, ATA_CYL_LOW) == 0x14) &&
570 (ide_inb(device, ATA_CYL_HIGH) == 0xEB)) {
571 /* ATAPI Signature found */
572 dev_desc->if_type = IF_TYPE_ATAPI;
574 * Start Ident Command
576 ide_outb(device, ATA_COMMAND, ATA_CMD_ID_ATAPI);
578 * Wait for completion - ATAPI devices need more time
581 c = ide_wait(device, ATAPI_TIME_OUT);
586 * Start Ident Command
588 ide_outb(device, ATA_COMMAND, ATA_CMD_ID_ATA);
591 * Wait for completion
593 c = ide_wait(device, IDE_TIME_OUT);
596 if (((c & ATA_STAT_DRQ) == 0) ||
597 ((c & (ATA_STAT_FAULT | ATA_STAT_ERR)) != 0)) {
601 * Need to soft reset the device
602 * in case it's an ATAPI...
604 debug("Retrying...\n");
605 ide_outb(device, ATA_DEV_HD,
606 ATA_LBA | ATA_DEVICE(device));
608 ide_outb(device, ATA_COMMAND, 0x08);
609 udelay(500000); /* 500 ms */
614 ide_outb(device, ATA_DEV_HD,
615 ATA_LBA | ATA_DEVICE(device));
624 } /* see above - ugly to read */
626 if (retries == 2) /* Not found */
630 ide_input_swap_data(device, (ulong *)&iop, ATA_SECTORWORDS);
632 ident_cpy((unsigned char *)dev_desc->revision, iop.fw_rev,
633 sizeof(dev_desc->revision));
634 ident_cpy((unsigned char *)dev_desc->vendor, iop.model,
635 sizeof(dev_desc->vendor));
636 ident_cpy((unsigned char *)dev_desc->product, iop.serial_no,
637 sizeof(dev_desc->product));
638 #ifdef __LITTLE_ENDIAN
640 * firmware revision, model, and serial number have Big Endian Byte
641 * order in Word. Convert all three to little endian.
643 * See CF+ and CompactFlash Specification Revision 2.0:
644 * 6.2.1.6: Identify Drive, Table 39 for more details
647 strswab(dev_desc->revision);
648 strswab(dev_desc->vendor);
649 strswab(dev_desc->product);
650 #endif /* __LITTLE_ENDIAN */
652 if ((iop.config & 0x0080) == 0x0080)
653 dev_desc->removable = 1;
655 dev_desc->removable = 0;
658 if (dev_desc->if_type == IF_TYPE_ATAPI) {
659 atapi_inquiry(dev_desc);
662 #endif /* CONFIG_ATAPI */
666 dev_desc->lba = (iop.lba_capacity << 16) | (iop.lba_capacity >> 16);
667 #else /* ! __BIG_ENDIAN */
669 * do not swap shorts on little endian
671 * See CF+ and CompactFlash Specification Revision 2.0:
672 * 6.2.1.6: Identfy Drive, Table 39, Word Address 57-58 for details.
674 dev_desc->lba = iop.lba_capacity;
675 #endif /* __BIG_ENDIAN */
678 if (iop.command_set_2 & 0x0400) { /* LBA 48 support */
680 dev_desc->lba = (unsigned long long) iop.lba48_capacity[0] |
681 ((unsigned long long) iop.lba48_capacity[1] << 16) |
682 ((unsigned long long) iop.lba48_capacity[2] << 32) |
683 ((unsigned long long) iop.lba48_capacity[3] << 48);
687 #endif /* CONFIG_LBA48 */
689 dev_desc->type = DEV_TYPE_HARDDISK;
690 dev_desc->blksz = ATA_BLOCKSIZE;
691 dev_desc->log2blksz = LOG2(dev_desc->blksz);
692 dev_desc->lun = 0; /* just to fill something in... */
694 #if 0 /* only used to test the powersaving mode,
695 * if enabled, the drive goes after 5 sec
697 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
698 c = ide_wait(device, IDE_TIME_OUT);
699 ide_outb(device, ATA_SECT_CNT, 1);
700 ide_outb(device, ATA_LBA_LOW, 0);
701 ide_outb(device, ATA_LBA_MID, 0);
702 ide_outb(device, ATA_LBA_HIGH, 0);
703 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
704 ide_outb(device, ATA_COMMAND, 0xe3);
706 c = ide_wait(device, IDE_TIME_OUT); /* can't take over 500 ms */
710 __weak void ide_outb(int dev, int port, unsigned char val)
712 debug("ide_outb (dev= %d, port= 0x%x, val= 0x%02x) : @ 0x%08lx\n",
714 (ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)));
716 #if defined(CONFIG_IDE_AHB)
719 ide_write_register(dev, port, val);
722 outb(val, (ATA_CURR_BASE(dev)));
725 outb(val, (ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)));
729 __weak unsigned char ide_inb(int dev, int port)
733 #if defined(CONFIG_IDE_AHB)
734 val = ide_read_register(dev, port);
736 val = inb((ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)));
739 debug("ide_inb (dev= %d, port= 0x%x) : @ 0x%08lx -> 0x%02x\n",
741 (ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)), val);
750 #ifdef CONFIG_IDE_PREINIT
754 puts("ide_preinit failed\n");
757 #endif /* CONFIG_IDE_PREINIT */
761 /* ATAPI Drives seems to need a proper IDE Reset */
765 * Wait for IDE to get ready.
766 * According to spec, this can take up to 31 seconds!
768 for (bus = 0; bus < CONFIG_SYS_IDE_MAXBUS; ++bus) {
770 bus * (CONFIG_SYS_IDE_MAXDEVICE /
771 CONFIG_SYS_IDE_MAXBUS);
773 printf("Bus %d: ", bus);
779 udelay(100000); /* 100 ms */
780 ide_outb(dev, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(dev));
781 udelay(100000); /* 100 ms */
784 udelay(10000); /* 10 ms */
786 c = ide_inb(dev, ATA_STATUS);
788 if (i > (ATA_RESET_TIME * 100)) {
789 puts("** Timeout **\n");
792 if ((i >= 100) && ((i % 100) == 0))
795 } while (c & ATA_STAT_BUSY);
797 if (c & (ATA_STAT_BUSY | ATA_STAT_FAULT)) {
798 puts("not available ");
799 debug("Status = 0x%02X ", c);
800 #ifndef CONFIG_ATAPI /* ATAPI Devices do not set DRDY */
801 } else if ((c & ATA_STAT_READY) == 0) {
802 puts("not available ");
803 debug("Status = 0x%02X ", c);
814 for (i = 0; i < CONFIG_SYS_IDE_MAXDEVICE; ++i) {
815 ide_dev_desc[i].type = DEV_TYPE_UNKNOWN;
816 ide_dev_desc[i].if_type = IF_TYPE_IDE;
817 ide_dev_desc[i].devnum = i;
818 ide_dev_desc[i].part_type = PART_TYPE_UNKNOWN;
819 ide_dev_desc[i].blksz = 0;
820 ide_dev_desc[i].log2blksz =
821 LOG2_INVALID(typeof(ide_dev_desc[i].log2blksz));
822 ide_dev_desc[i].lba = 0;
824 ide_dev_desc[i].block_read = ide_read;
825 ide_dev_desc[i].block_write = ide_write;
827 if (!ide_bus_ok[IDE_BUS(i)])
829 ide_ident(&ide_dev_desc[i]);
830 dev_print(&ide_dev_desc[i]);
833 if ((ide_dev_desc[i].lba > 0) && (ide_dev_desc[i].blksz > 0)) {
834 /* initialize partition type */
835 part_init(&ide_dev_desc[i]);
844 uclass_first_device(UCLASS_IDE, &dev);
848 /* We only need to swap data if we are running on a big endian cpu. */
849 #if defined(__LITTLE_ENDIAN)
850 __weak void ide_input_swap_data(int dev, ulong *sect_buf, int words)
852 ide_input_data(dev, sect_buf, words);
855 __weak void ide_input_swap_data(int dev, ulong *sect_buf, int words)
857 volatile ushort *pbuf =
858 (ushort *)(ATA_CURR_BASE(dev) + ATA_DATA_REG);
859 ushort *dbuf = (ushort *)sect_buf;
861 debug("in input swap data base for read is %lx\n",
862 (unsigned long) pbuf);
866 *dbuf++ = swab16p((u16 *)pbuf);
867 *dbuf++ = swab16p((u16 *)pbuf);
869 *dbuf++ = ld_le16(pbuf);
870 *dbuf++ = ld_le16(pbuf);
874 #endif /* __LITTLE_ENDIAN */
877 #if defined(CONFIG_IDE_SWAP_IO)
878 __weak void ide_output_data(int dev, const ulong *sect_buf, int words)
881 volatile ushort *pbuf;
883 pbuf = (ushort *)(ATA_CURR_BASE(dev) + ATA_DATA_REG);
884 dbuf = (ushort *)sect_buf;
892 #else /* ! CONFIG_IDE_SWAP_IO */
893 __weak void ide_output_data(int dev, const ulong *sect_buf, int words)
895 #if defined(CONFIG_IDE_AHB)
896 ide_write_data(dev, sect_buf, words);
898 outsw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, words << 1);
901 #endif /* CONFIG_IDE_SWAP_IO */
903 #if defined(CONFIG_IDE_SWAP_IO)
904 __weak void ide_input_data(int dev, ulong *sect_buf, int words)
907 volatile ushort *pbuf;
909 pbuf = (ushort *)(ATA_CURR_BASE(dev) + ATA_DATA_REG);
910 dbuf = (ushort *)sect_buf;
912 debug("in input data base for read is %lx\n", (unsigned long) pbuf);
921 #else /* ! CONFIG_IDE_SWAP_IO */
922 __weak void ide_input_data(int dev, ulong *sect_buf, int words)
924 #if defined(CONFIG_IDE_AHB)
925 ide_read_data(dev, sect_buf, words);
927 insw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, words << 1);
931 #endif /* CONFIG_IDE_SWAP_IO */
934 ulong ide_read(struct udevice *dev, lbaint_t blknr, lbaint_t blkcnt,
937 ulong ide_read(struct blk_desc *block_dev, lbaint_t blknr, lbaint_t blkcnt,
942 struct blk_desc *block_dev = dev_get_uclass_platdata(dev);
944 int device = block_dev->devnum;
947 unsigned char pwrsave = 0; /* power save */
950 unsigned char lba48 = 0;
952 if (blknr & 0x0000fffff0000000ULL) {
953 /* more than 28 bits used, use 48bit mode */
957 debug("ide_read dev %d start " LBAF ", blocks " LBAF " buffer at %lX\n",
958 device, blknr, blkcnt, (ulong) buffer);
962 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
963 c = ide_wait(device, IDE_TIME_OUT);
965 if (c & ATA_STAT_BUSY) {
966 printf("IDE read: device %d not ready\n", device);
970 /* first check if the drive is in Powersaving mode, if yes,
971 * increase the timeout value */
972 ide_outb(device, ATA_COMMAND, ATA_CMD_CHK_POWER);
975 c = ide_wait(device, IDE_TIME_OUT); /* can't take over 500 ms */
977 if (c & ATA_STAT_BUSY) {
978 printf("IDE read: device %d not ready\n", device);
981 if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
982 printf("No Powersaving mode %X\n", c);
984 c = ide_inb(device, ATA_SECT_CNT);
985 debug("Powersaving %02X\n", c);
991 while (blkcnt-- > 0) {
992 c = ide_wait(device, IDE_TIME_OUT);
994 if (c & ATA_STAT_BUSY) {
995 printf("IDE read: device %d not ready\n", device);
1000 /* write high bits */
1001 ide_outb(device, ATA_SECT_CNT, 0);
1002 ide_outb(device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
1003 #ifdef CONFIG_SYS_64BIT_LBA
1004 ide_outb(device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
1005 ide_outb(device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
1007 ide_outb(device, ATA_LBA_MID, 0);
1008 ide_outb(device, ATA_LBA_HIGH, 0);
1012 ide_outb(device, ATA_SECT_CNT, 1);
1013 ide_outb(device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
1014 ide_outb(device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
1015 ide_outb(device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
1019 ide_outb(device, ATA_DEV_HD,
1020 ATA_LBA | ATA_DEVICE(device));
1021 ide_outb(device, ATA_COMMAND, ATA_CMD_READ_EXT);
1026 ide_outb(device, ATA_DEV_HD, ATA_LBA |
1027 ATA_DEVICE(device) | ((blknr >> 24) & 0xF));
1028 ide_outb(device, ATA_COMMAND, ATA_CMD_READ);
1034 /* may take up to 4 sec */
1035 c = ide_wait(device, IDE_SPIN_UP_TIME_OUT);
1038 /* can't take over 500 ms */
1039 c = ide_wait(device, IDE_TIME_OUT);
1042 if ((c & (ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR)) !=
1044 printf("Error (no IRQ) dev %d blk " LBAF
1045 ": status %#02x\n", device, blknr, c);
1049 ide_input_data(device, buffer, ATA_SECTORWORDS);
1050 (void) ide_inb(device, ATA_STATUS); /* clear IRQ */
1054 buffer += ATA_BLOCKSIZE;
1061 ulong ide_write(struct udevice *dev, lbaint_t blknr, lbaint_t blkcnt,
1064 ulong ide_write(struct blk_desc *block_dev, lbaint_t blknr, lbaint_t blkcnt,
1069 struct blk_desc *block_dev = dev_get_uclass_platdata(dev);
1071 int device = block_dev->devnum;
1076 unsigned char lba48 = 0;
1078 if (blknr & 0x0000fffff0000000ULL) {
1079 /* more than 28 bits used, use 48bit mode */
1086 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
1088 while (blkcnt-- > 0) {
1089 c = ide_wait(device, IDE_TIME_OUT);
1091 if (c & ATA_STAT_BUSY) {
1092 printf("IDE read: device %d not ready\n", device);
1097 /* write high bits */
1098 ide_outb(device, ATA_SECT_CNT, 0);
1099 ide_outb(device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
1100 #ifdef CONFIG_SYS_64BIT_LBA
1101 ide_outb(device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
1102 ide_outb(device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
1104 ide_outb(device, ATA_LBA_MID, 0);
1105 ide_outb(device, ATA_LBA_HIGH, 0);
1109 ide_outb(device, ATA_SECT_CNT, 1);
1110 ide_outb(device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
1111 ide_outb(device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
1112 ide_outb(device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
1116 ide_outb(device, ATA_DEV_HD,
1117 ATA_LBA | ATA_DEVICE(device));
1118 ide_outb(device, ATA_COMMAND, ATA_CMD_WRITE_EXT);
1123 ide_outb(device, ATA_DEV_HD, ATA_LBA |
1124 ATA_DEVICE(device) | ((blknr >> 24) & 0xF));
1125 ide_outb(device, ATA_COMMAND, ATA_CMD_WRITE);
1130 /* can't take over 500 ms */
1131 c = ide_wait(device, IDE_TIME_OUT);
1133 if ((c & (ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR)) !=
1135 printf("Error (no IRQ) dev %d blk " LBAF
1136 ": status %#02x\n", device, blknr, c);
1140 ide_output_data(device, buffer, ATA_SECTORWORDS);
1141 c = ide_inb(device, ATA_STATUS); /* clear IRQ */
1144 buffer += ATA_BLOCKSIZE;
1150 #if defined(CONFIG_OF_IDE_FIXUP)
1151 int ide_device_present(int dev)
1153 if (dev >= CONFIG_SYS_IDE_MAXBUS)
1155 return ide_dev_desc[dev].type == DEV_TYPE_UNKNOWN ? 0 : 1;
1160 static int ide_blk_probe(struct udevice *udev)
1162 struct blk_desc *desc = dev_get_uclass_platdata(udev);
1164 /* fill in device vendor/product/rev strings */
1165 strncpy(desc->vendor, ide_dev_desc[desc->devnum].vendor,
1167 desc->vendor[BLK_VEN_SIZE] = '\0';
1168 strncpy(desc->product, ide_dev_desc[desc->devnum].product,
1170 desc->product[BLK_PRD_SIZE] = '\0';
1171 strncpy(desc->revision, ide_dev_desc[desc->devnum].revision,
1173 desc->revision[BLK_REV_SIZE] = '\0';
1178 static const struct blk_ops ide_blk_ops = {
1183 U_BOOT_DRIVER(ide_blk) = {
1186 .ops = &ide_blk_ops,
1187 .probe = ide_blk_probe,
1190 static int ide_probe(struct udevice *udev)
1192 struct udevice *blk_dev;
1199 for (i = 0; i < CONFIG_SYS_IDE_MAXDEVICE; i++) {
1200 if (ide_dev_desc[i].type != DEV_TYPE_UNKNOWN) {
1201 sprintf(name, "blk#%d", i);
1203 blksz = ide_dev_desc[i].blksz;
1204 size = blksz * ide_dev_desc[i].lba;
1207 * With CDROM, if there is no CD inserted, blksz will
1208 * be zero, don't bother to create IDE block device.
1212 ret = blk_create_devicef(udev, "ide_blk", name,
1214 blksz, size, &blk_dev);
1223 U_BOOT_DRIVER(ide) = {
1229 struct pci_device_id ide_supported[] = {
1230 { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_IDE << 8, 0xffff00) },
1234 U_BOOT_PCI_DEVICE(ide, ide_supported);
1236 UCLASS_DRIVER(ide) = {
1241 U_BOOT_LEGACY_BLK(ide) = {
1242 .if_typename = "ide",
1243 .if_type = IF_TYPE_IDE,
1244 .max_devs = CONFIG_SYS_IDE_MAXDEVICE,
1245 .desc = ide_dev_desc,