1 // SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2000-2011
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
15 # define EIEIO __asm__ volatile ("eieio")
16 # define SYNC __asm__ volatile ("sync")
18 # define EIEIO /* nothing */
19 # define SYNC /* nothing */
22 /* Current offset for IDE0 / IDE1 bus access */
23 ulong ide_bus_offset[CONFIG_SYS_IDE_MAXBUS] = {
24 #if defined(CONFIG_SYS_ATA_IDE0_OFFSET)
25 CONFIG_SYS_ATA_IDE0_OFFSET,
27 #if defined(CONFIG_SYS_ATA_IDE1_OFFSET) && (CONFIG_SYS_IDE_MAXBUS > 1)
28 CONFIG_SYS_ATA_IDE1_OFFSET,
32 static int ide_bus_ok[CONFIG_SYS_IDE_MAXBUS];
34 struct blk_desc ide_dev_desc[CONFIG_SYS_IDE_MAXDEVICE];
36 #define IDE_TIME_OUT 2000 /* 2 sec timeout */
38 #define ATAPI_TIME_OUT 7000 /* 7 sec timeout (5 sec seems to work...) */
40 #define IDE_SPIN_UP_TIME_OUT 5000 /* 5 sec spin-up timeout */
42 #ifndef CONFIG_SYS_ATA_PORT_ADDR
43 #define CONFIG_SYS_ATA_PORT_ADDR(port) (port)
46 #ifdef CONFIG_IDE_RESET
47 extern void ide_set_reset(int idereset);
49 static void ide_reset(void)
53 for (i = 0; i < CONFIG_SYS_IDE_MAXBUS; ++i)
55 for (i = 0; i < CONFIG_SYS_IDE_MAXDEVICE; ++i)
56 ide_dev_desc[i].type = DEV_TYPE_UNKNOWN;
58 ide_set_reset(1); /* assert reset */
60 /* the reset signal shall be asserted for et least 25 us */
65 /* de-assert RESET signal */
69 for (i = 0; i < 250; ++i)
73 #define ide_reset() /* dummy */
74 #endif /* CONFIG_IDE_RESET */
77 * Wait until Busy bit is off, or timeout (in ms)
80 static uchar ide_wait(int dev, ulong t)
82 ulong delay = 10 * t; /* poll every 100 us */
85 while ((c = ide_inb(dev, ATA_STATUS)) & ATA_STAT_BUSY) {
94 * copy src to dest, skipping leading and trailing blanks and null
95 * terminate the string
96 * "len" is the size of available memory including the terminating '\0'
98 static void ident_cpy(unsigned char *dst, unsigned char *src,
101 unsigned char *end, *last;
106 /* reserve space for '\0' */
110 /* skip leading white space */
111 while ((*src) && (src < end) && (*src == ' '))
114 /* copy string, omitting trailing white space */
115 while ((*src) && (src < end)) {
125 /****************************************************************************
129 #if defined(CONFIG_IDE_SWAP_IO)
130 /* since ATAPI may use commands with not 4 bytes alligned length
131 * we have our own transfer functions, 2 bytes alligned */
132 __weak void ide_output_data_shorts(int dev, ushort *sect_buf, int shorts)
135 volatile ushort *pbuf;
137 pbuf = (ushort *)(ATA_CURR_BASE(dev) + ATA_DATA_REG);
138 dbuf = (ushort *)sect_buf;
140 debug("in output data shorts base for read is %lx\n",
141 (unsigned long) pbuf);
149 __weak void ide_input_data_shorts(int dev, ushort *sect_buf, int shorts)
152 volatile ushort *pbuf;
154 pbuf = (ushort *)(ATA_CURR_BASE(dev) + ATA_DATA_REG);
155 dbuf = (ushort *)sect_buf;
157 debug("in input data shorts base for read is %lx\n",
158 (unsigned long) pbuf);
166 #else /* ! CONFIG_IDE_SWAP_IO */
167 __weak void ide_output_data_shorts(int dev, ushort *sect_buf, int shorts)
169 outsw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, shorts);
172 __weak void ide_input_data_shorts(int dev, ushort *sect_buf, int shorts)
174 insw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, shorts);
177 #endif /* CONFIG_IDE_SWAP_IO */
180 * Wait until (Status & mask) == res, or timeout (in ms)
182 * This is used since some ATAPI CD ROMs clears their Busy Bit first
183 * and then they set their DRQ Bit
185 static uchar atapi_wait_mask(int dev, ulong t, uchar mask, uchar res)
187 ulong delay = 10 * t; /* poll every 100 us */
190 /* prevents to read the status before valid */
191 c = ide_inb(dev, ATA_DEV_CTL);
193 while (((c = ide_inb(dev, ATA_STATUS)) & mask) != res) {
194 /* break if error occurs (doesn't make sense to wait more) */
195 if ((c & ATA_STAT_ERR) == ATA_STAT_ERR)
205 * issue an atapi command
207 unsigned char atapi_issue(int device, unsigned char *ccb, int ccblen,
208 unsigned char *buffer, int buflen)
210 unsigned char c, err, mask, res;
215 mask = ATA_STAT_BUSY | ATA_STAT_DRQ;
217 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
218 c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
219 if ((c & mask) != res) {
220 printf("ATAPI_ISSUE: device %d not ready status %X\n", device,
226 ide_outb(device, ATA_ERROR_REG, 0); /* no DMA, no overlaped */
227 ide_outb(device, ATA_SECT_CNT, 0);
228 ide_outb(device, ATA_SECT_NUM, 0);
229 ide_outb(device, ATA_CYL_LOW, (unsigned char) (buflen & 0xFF));
230 ide_outb(device, ATA_CYL_HIGH,
231 (unsigned char) ((buflen >> 8) & 0xFF));
232 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
234 ide_outb(device, ATA_COMMAND, ATA_CMD_PACKET);
237 mask = ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR;
239 c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
241 if ((c & mask) != res) { /* DRQ must be 1, BSY 0 */
242 printf("ATAPI_ISSUE: Error (no IRQ) before sending ccb dev %d status 0x%02x\n",
248 /* write command block */
249 ide_output_data_shorts(device, (unsigned short *)ccb, ccblen / 2);
251 /* ATAPI Command written wait for completition */
252 udelay(5000); /* device must set bsy */
254 mask = ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR;
256 * if no data wait for DRQ = 0 BSY = 0
257 * if data wait for DRQ = 1 BSY = 0
262 c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
263 if ((c & mask) != res) {
264 if (c & ATA_STAT_ERR) {
265 err = (ide_inb(device, ATA_ERROR_REG)) >> 4;
266 debug("atapi_issue 1 returned sense key %X status %02X\n",
269 printf("ATAPI_ISSUE: (no DRQ) after sending ccb (%x) status 0x%02x\n",
275 n = ide_inb(device, ATA_CYL_HIGH);
277 n += ide_inb(device, ATA_CYL_LOW);
279 printf("ERROR, transfer bytes %d requested only %d\n", n,
284 if ((n == 0) && (buflen < 0)) {
285 printf("ERROR, transfer bytes %d requested %d\n", n, buflen);
290 debug("WARNING, transfer bytes %d not equal with requested %d\n",
293 if (n != 0) { /* data transfer */
294 debug("ATAPI_ISSUE: %d Bytes to transfer\n", n);
295 /* we transfer shorts */
297 /* ok now decide if it is an in or output */
298 if ((ide_inb(device, ATA_SECT_CNT) & 0x02) == 0) {
299 debug("Write to device\n");
300 ide_output_data_shorts(device, (unsigned short *)buffer,
303 debug("Read from device @ %p shorts %d\n", buffer, n);
304 ide_input_data_shorts(device, (unsigned short *)buffer,
308 udelay(5000); /* seems that some CD ROMs need this... */
309 mask = ATA_STAT_BUSY | ATA_STAT_ERR;
311 c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
312 if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
313 err = (ide_inb(device, ATA_ERROR_REG) >> 4);
314 debug("atapi_issue 2 returned sense key %X status %X\n", err,
324 * sending the command to atapi_issue. If an status other than good
325 * returns, an request_sense will be issued
328 #define ATAPI_DRIVE_NOT_READY 100
329 #define ATAPI_UNIT_ATTN 10
331 unsigned char atapi_issue_autoreq(int device,
334 unsigned char *buffer, int buflen)
336 unsigned char sense_data[18], sense_ccb[12];
337 unsigned char res, key, asc, ascq;
338 int notready, unitattn;
340 unitattn = ATAPI_UNIT_ATTN;
341 notready = ATAPI_DRIVE_NOT_READY;
344 res = atapi_issue(device, ccb, ccblen, buffer, buflen);
349 return 0xFF; /* error */
351 debug("(auto_req)atapi_issue returned sense key %X\n", res);
353 memset(sense_ccb, 0, sizeof(sense_ccb));
354 memset(sense_data, 0, sizeof(sense_data));
355 sense_ccb[0] = ATAPI_CMD_REQ_SENSE;
356 sense_ccb[4] = 18; /* allocation Length */
358 res = atapi_issue(device, sense_ccb, 12, sense_data, 18);
359 key = (sense_data[2] & 0xF);
360 asc = (sense_data[12]);
361 ascq = (sense_data[13]);
363 debug("ATAPI_CMD_REQ_SENSE returned %x\n", res);
364 debug(" Sense page: %02X key %02X ASC %02X ASCQ %02X\n",
365 sense_data[0], key, asc, ascq);
368 return 0; /* ok device ready */
370 if ((key == 6) || (asc == 0x29) || (asc == 0x28)) { /* Unit Attention */
371 if (unitattn-- > 0) {
375 printf("Unit Attention, tried %d\n", ATAPI_UNIT_ATTN);
378 if ((asc == 0x4) && (ascq == 0x1)) {
379 /* not ready, but will be ready soon */
380 if (notready-- > 0) {
384 printf("Drive not ready, tried %d times\n",
385 ATAPI_DRIVE_NOT_READY);
389 debug("Media not present\n");
393 printf("ERROR: Unknown Sense key %02X ASC %02X ASCQ %02X\n", key, asc,
396 debug("ERROR Sense key %02X ASC %02X ASCQ %02X\n", key, asc, ascq);
402 * we transfer only one block per command, since the multiple DRQ per
403 * command is not yet implemented
405 #define ATAPI_READ_MAX_BYTES 2048 /* we read max 2kbytes */
406 #define ATAPI_READ_BLOCK_SIZE 2048 /* assuming CD part */
407 #define ATAPI_READ_MAX_BLOCK (ATAPI_READ_MAX_BYTES/ATAPI_READ_BLOCK_SIZE)
409 ulong atapi_read(struct blk_desc *block_dev, lbaint_t blknr, lbaint_t blkcnt,
412 int device = block_dev->devnum;
414 unsigned char ccb[12]; /* Command descriptor block */
417 debug("atapi_read dev %d start " LBAF " blocks " LBAF
418 " buffer at %lX\n", device, blknr, blkcnt, (ulong) buffer);
421 if (blkcnt > ATAPI_READ_MAX_BLOCK)
422 cnt = ATAPI_READ_MAX_BLOCK;
426 ccb[0] = ATAPI_CMD_READ_12;
427 ccb[1] = 0; /* reserved */
428 ccb[2] = (unsigned char) (blknr >> 24) & 0xFF; /* MSB Block */
429 ccb[3] = (unsigned char) (blknr >> 16) & 0xFF; /* */
430 ccb[4] = (unsigned char) (blknr >> 8) & 0xFF;
431 ccb[5] = (unsigned char) blknr & 0xFF; /* LSB Block */
432 ccb[6] = (unsigned char) (cnt >> 24) & 0xFF; /* MSB Block cnt */
433 ccb[7] = (unsigned char) (cnt >> 16) & 0xFF;
434 ccb[8] = (unsigned char) (cnt >> 8) & 0xFF;
435 ccb[9] = (unsigned char) cnt & 0xFF; /* LSB Block */
436 ccb[10] = 0; /* reserved */
437 ccb[11] = 0; /* reserved */
439 if (atapi_issue_autoreq(device, ccb, 12,
440 (unsigned char *)buffer,
441 cnt * ATAPI_READ_BLOCK_SIZE)
448 buffer += (cnt * ATAPI_READ_BLOCK_SIZE);
449 } while (blkcnt > 0);
453 static void atapi_inquiry(struct blk_desc *dev_desc)
455 unsigned char ccb[12]; /* Command descriptor block */
456 unsigned char iobuf[64]; /* temp buf */
460 device = dev_desc->devnum;
461 dev_desc->type = DEV_TYPE_UNKNOWN; /* not yet valid */
463 dev_desc->block_read = atapi_read;
466 memset(ccb, 0, sizeof(ccb));
467 memset(iobuf, 0, sizeof(iobuf));
469 ccb[0] = ATAPI_CMD_INQUIRY;
470 ccb[4] = 40; /* allocation Legnth */
471 c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *)iobuf, 40);
473 debug("ATAPI_CMD_INQUIRY returned %x\n", c);
477 /* copy device ident strings */
478 ident_cpy((unsigned char *)dev_desc->vendor, &iobuf[8], 8);
479 ident_cpy((unsigned char *)dev_desc->product, &iobuf[16], 16);
480 ident_cpy((unsigned char *)dev_desc->revision, &iobuf[32], 5);
485 dev_desc->log2blksz = LOG2_INVALID(typeof(dev_desc->log2blksz));
486 dev_desc->type = iobuf[0] & 0x1f;
488 if ((iobuf[1] & 0x80) == 0x80)
489 dev_desc->removable = 1;
491 dev_desc->removable = 0;
493 memset(ccb, 0, sizeof(ccb));
494 memset(iobuf, 0, sizeof(iobuf));
495 ccb[0] = ATAPI_CMD_START_STOP;
496 ccb[4] = 0x03; /* start */
498 c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *)iobuf, 0);
500 debug("ATAPI_CMD_START_STOP returned %x\n", c);
504 memset(ccb, 0, sizeof(ccb));
505 memset(iobuf, 0, sizeof(iobuf));
506 c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *)iobuf, 0);
508 debug("ATAPI_CMD_UNIT_TEST_READY returned %x\n", c);
512 memset(ccb, 0, sizeof(ccb));
513 memset(iobuf, 0, sizeof(iobuf));
514 ccb[0] = ATAPI_CMD_READ_CAP;
515 c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *)iobuf, 8);
516 debug("ATAPI_CMD_READ_CAP returned %x\n", c);
520 debug("Read Cap: LBA %02X%02X%02X%02X blksize %02X%02X%02X%02X\n",
521 iobuf[0], iobuf[1], iobuf[2], iobuf[3],
522 iobuf[4], iobuf[5], iobuf[6], iobuf[7]);
524 dev_desc->lba = ((unsigned long) iobuf[0] << 24) +
525 ((unsigned long) iobuf[1] << 16) +
526 ((unsigned long) iobuf[2] << 8) + ((unsigned long) iobuf[3]);
527 dev_desc->blksz = ((unsigned long) iobuf[4] << 24) +
528 ((unsigned long) iobuf[5] << 16) +
529 ((unsigned long) iobuf[6] << 8) + ((unsigned long) iobuf[7]);
530 dev_desc->log2blksz = LOG2(dev_desc->blksz);
532 /* ATAPI devices cannot use 48bit addressing (ATA/ATAPI v7) */
538 #endif /* CONFIG_ATAPI */
540 static void ide_ident(struct blk_desc *dev_desc)
550 device = dev_desc->devnum;
551 printf(" Device %d: ", device);
555 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
556 dev_desc->if_type = IF_TYPE_IDE;
561 /* Warning: This will be tricky to read */
562 while (retries <= 1) {
563 /* check signature */
564 if ((ide_inb(device, ATA_SECT_CNT) == 0x01) &&
565 (ide_inb(device, ATA_SECT_NUM) == 0x01) &&
566 (ide_inb(device, ATA_CYL_LOW) == 0x14) &&
567 (ide_inb(device, ATA_CYL_HIGH) == 0xEB)) {
568 /* ATAPI Signature found */
569 dev_desc->if_type = IF_TYPE_ATAPI;
571 * Start Ident Command
573 ide_outb(device, ATA_COMMAND, ATA_CMD_ID_ATAPI);
575 * Wait for completion - ATAPI devices need more time
578 c = ide_wait(device, ATAPI_TIME_OUT);
583 * Start Ident Command
585 ide_outb(device, ATA_COMMAND, ATA_CMD_ID_ATA);
588 * Wait for completion
590 c = ide_wait(device, IDE_TIME_OUT);
593 if (((c & ATA_STAT_DRQ) == 0) ||
594 ((c & (ATA_STAT_FAULT | ATA_STAT_ERR)) != 0)) {
598 * Need to soft reset the device
599 * in case it's an ATAPI...
601 debug("Retrying...\n");
602 ide_outb(device, ATA_DEV_HD,
603 ATA_LBA | ATA_DEVICE(device));
605 ide_outb(device, ATA_COMMAND, 0x08);
606 udelay(500000); /* 500 ms */
611 ide_outb(device, ATA_DEV_HD,
612 ATA_LBA | ATA_DEVICE(device));
621 } /* see above - ugly to read */
623 if (retries == 2) /* Not found */
627 ide_input_swap_data(device, (ulong *)&iop, ATA_SECTORWORDS);
629 ident_cpy((unsigned char *)dev_desc->revision, iop.fw_rev,
630 sizeof(dev_desc->revision));
631 ident_cpy((unsigned char *)dev_desc->vendor, iop.model,
632 sizeof(dev_desc->vendor));
633 ident_cpy((unsigned char *)dev_desc->product, iop.serial_no,
634 sizeof(dev_desc->product));
635 #ifdef __LITTLE_ENDIAN
637 * firmware revision, model, and serial number have Big Endian Byte
638 * order in Word. Convert all three to little endian.
640 * See CF+ and CompactFlash Specification Revision 2.0:
641 * 6.2.1.6: Identify Drive, Table 39 for more details
644 strswab(dev_desc->revision);
645 strswab(dev_desc->vendor);
646 strswab(dev_desc->product);
647 #endif /* __LITTLE_ENDIAN */
649 if ((iop.config & 0x0080) == 0x0080)
650 dev_desc->removable = 1;
652 dev_desc->removable = 0;
655 if (dev_desc->if_type == IF_TYPE_ATAPI) {
656 atapi_inquiry(dev_desc);
659 #endif /* CONFIG_ATAPI */
663 dev_desc->lba = (iop.lba_capacity << 16) | (iop.lba_capacity >> 16);
664 #else /* ! __BIG_ENDIAN */
666 * do not swap shorts on little endian
668 * See CF+ and CompactFlash Specification Revision 2.0:
669 * 6.2.1.6: Identfy Drive, Table 39, Word Address 57-58 for details.
671 dev_desc->lba = iop.lba_capacity;
672 #endif /* __BIG_ENDIAN */
675 if (iop.command_set_2 & 0x0400) { /* LBA 48 support */
677 dev_desc->lba = (unsigned long long) iop.lba48_capacity[0] |
678 ((unsigned long long) iop.lba48_capacity[1] << 16) |
679 ((unsigned long long) iop.lba48_capacity[2] << 32) |
680 ((unsigned long long) iop.lba48_capacity[3] << 48);
684 #endif /* CONFIG_LBA48 */
686 dev_desc->type = DEV_TYPE_HARDDISK;
687 dev_desc->blksz = ATA_BLOCKSIZE;
688 dev_desc->log2blksz = LOG2(dev_desc->blksz);
689 dev_desc->lun = 0; /* just to fill something in... */
691 #if 0 /* only used to test the powersaving mode,
692 * if enabled, the drive goes after 5 sec
694 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
695 c = ide_wait(device, IDE_TIME_OUT);
696 ide_outb(device, ATA_SECT_CNT, 1);
697 ide_outb(device, ATA_LBA_LOW, 0);
698 ide_outb(device, ATA_LBA_MID, 0);
699 ide_outb(device, ATA_LBA_HIGH, 0);
700 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
701 ide_outb(device, ATA_COMMAND, 0xe3);
703 c = ide_wait(device, IDE_TIME_OUT); /* can't take over 500 ms */
707 __weak void ide_outb(int dev, int port, unsigned char val)
709 debug("ide_outb (dev= %d, port= 0x%x, val= 0x%02x) : @ 0x%08lx\n",
711 (ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)));
713 #if defined(CONFIG_IDE_AHB)
716 ide_write_register(dev, port, val);
719 outb(val, (ATA_CURR_BASE(dev)));
722 outb(val, (ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)));
726 __weak unsigned char ide_inb(int dev, int port)
730 #if defined(CONFIG_IDE_AHB)
731 val = ide_read_register(dev, port);
733 val = inb((ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)));
736 debug("ide_inb (dev= %d, port= 0x%x) : @ 0x%08lx -> 0x%02x\n",
738 (ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)), val);
747 #ifdef CONFIG_IDE_PREINIT
751 puts("ide_preinit failed\n");
754 #endif /* CONFIG_IDE_PREINIT */
758 /* ATAPI Drives seems to need a proper IDE Reset */
762 * Wait for IDE to get ready.
763 * According to spec, this can take up to 31 seconds!
765 for (bus = 0; bus < CONFIG_SYS_IDE_MAXBUS; ++bus) {
767 bus * (CONFIG_SYS_IDE_MAXDEVICE /
768 CONFIG_SYS_IDE_MAXBUS);
770 printf("Bus %d: ", bus);
776 udelay(100000); /* 100 ms */
777 ide_outb(dev, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(dev));
778 udelay(100000); /* 100 ms */
781 udelay(10000); /* 10 ms */
783 c = ide_inb(dev, ATA_STATUS);
785 if (i > (ATA_RESET_TIME * 100)) {
786 puts("** Timeout **\n");
789 if ((i >= 100) && ((i % 100) == 0))
792 } while (c & ATA_STAT_BUSY);
794 if (c & (ATA_STAT_BUSY | ATA_STAT_FAULT)) {
795 puts("not available ");
796 debug("Status = 0x%02X ", c);
797 #ifndef CONFIG_ATAPI /* ATAPI Devices do not set DRDY */
798 } else if ((c & ATA_STAT_READY) == 0) {
799 puts("not available ");
800 debug("Status = 0x%02X ", c);
811 for (i = 0; i < CONFIG_SYS_IDE_MAXDEVICE; ++i) {
812 ide_dev_desc[i].type = DEV_TYPE_UNKNOWN;
813 ide_dev_desc[i].if_type = IF_TYPE_IDE;
814 ide_dev_desc[i].devnum = i;
815 ide_dev_desc[i].part_type = PART_TYPE_UNKNOWN;
816 ide_dev_desc[i].blksz = 0;
817 ide_dev_desc[i].log2blksz =
818 LOG2_INVALID(typeof(ide_dev_desc[i].log2blksz));
819 ide_dev_desc[i].lba = 0;
821 ide_dev_desc[i].block_read = ide_read;
822 ide_dev_desc[i].block_write = ide_write;
824 if (!ide_bus_ok[IDE_BUS(i)])
826 ide_ident(&ide_dev_desc[i]);
827 dev_print(&ide_dev_desc[i]);
830 if ((ide_dev_desc[i].lba > 0) && (ide_dev_desc[i].blksz > 0)) {
831 /* initialize partition type */
832 part_init(&ide_dev_desc[i]);
841 uclass_first_device(UCLASS_IDE, &dev);
845 /* We only need to swap data if we are running on a big endian cpu. */
846 #if defined(__LITTLE_ENDIAN)
847 __weak void ide_input_swap_data(int dev, ulong *sect_buf, int words)
849 ide_input_data(dev, sect_buf, words);
852 __weak void ide_input_swap_data(int dev, ulong *sect_buf, int words)
854 volatile ushort *pbuf =
855 (ushort *)(ATA_CURR_BASE(dev) + ATA_DATA_REG);
856 ushort *dbuf = (ushort *)sect_buf;
858 debug("in input swap data base for read is %lx\n",
859 (unsigned long) pbuf);
863 *dbuf++ = swab16p((u16 *)pbuf);
864 *dbuf++ = swab16p((u16 *)pbuf);
866 *dbuf++ = ld_le16(pbuf);
867 *dbuf++ = ld_le16(pbuf);
871 #endif /* __LITTLE_ENDIAN */
874 #if defined(CONFIG_IDE_SWAP_IO)
875 __weak void ide_output_data(int dev, const ulong *sect_buf, int words)
878 volatile ushort *pbuf;
880 pbuf = (ushort *)(ATA_CURR_BASE(dev) + ATA_DATA_REG);
881 dbuf = (ushort *)sect_buf;
889 #else /* ! CONFIG_IDE_SWAP_IO */
890 __weak void ide_output_data(int dev, const ulong *sect_buf, int words)
892 #if defined(CONFIG_IDE_AHB)
893 ide_write_data(dev, sect_buf, words);
895 outsw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, words << 1);
898 #endif /* CONFIG_IDE_SWAP_IO */
900 #if defined(CONFIG_IDE_SWAP_IO)
901 __weak void ide_input_data(int dev, ulong *sect_buf, int words)
904 volatile ushort *pbuf;
906 pbuf = (ushort *)(ATA_CURR_BASE(dev) + ATA_DATA_REG);
907 dbuf = (ushort *)sect_buf;
909 debug("in input data base for read is %lx\n", (unsigned long) pbuf);
918 #else /* ! CONFIG_IDE_SWAP_IO */
919 __weak void ide_input_data(int dev, ulong *sect_buf, int words)
921 #if defined(CONFIG_IDE_AHB)
922 ide_read_data(dev, sect_buf, words);
924 insw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, words << 1);
928 #endif /* CONFIG_IDE_SWAP_IO */
931 ulong ide_read(struct udevice *dev, lbaint_t blknr, lbaint_t blkcnt,
934 ulong ide_read(struct blk_desc *block_dev, lbaint_t blknr, lbaint_t blkcnt,
939 struct blk_desc *block_dev = dev_get_uclass_platdata(dev);
941 int device = block_dev->devnum;
944 unsigned char pwrsave = 0; /* power save */
947 unsigned char lba48 = 0;
949 if (blknr & 0x0000fffff0000000ULL) {
950 /* more than 28 bits used, use 48bit mode */
954 debug("ide_read dev %d start " LBAF ", blocks " LBAF " buffer at %lX\n",
955 device, blknr, blkcnt, (ulong) buffer);
959 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
960 c = ide_wait(device, IDE_TIME_OUT);
962 if (c & ATA_STAT_BUSY) {
963 printf("IDE read: device %d not ready\n", device);
967 /* first check if the drive is in Powersaving mode, if yes,
968 * increase the timeout value */
969 ide_outb(device, ATA_COMMAND, ATA_CMD_CHK_POWER);
972 c = ide_wait(device, IDE_TIME_OUT); /* can't take over 500 ms */
974 if (c & ATA_STAT_BUSY) {
975 printf("IDE read: device %d not ready\n", device);
978 if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
979 printf("No Powersaving mode %X\n", c);
981 c = ide_inb(device, ATA_SECT_CNT);
982 debug("Powersaving %02X\n", c);
988 while (blkcnt-- > 0) {
989 c = ide_wait(device, IDE_TIME_OUT);
991 if (c & ATA_STAT_BUSY) {
992 printf("IDE read: device %d not ready\n", device);
997 /* write high bits */
998 ide_outb(device, ATA_SECT_CNT, 0);
999 ide_outb(device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
1000 #ifdef CONFIG_SYS_64BIT_LBA
1001 ide_outb(device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
1002 ide_outb(device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
1004 ide_outb(device, ATA_LBA_MID, 0);
1005 ide_outb(device, ATA_LBA_HIGH, 0);
1009 ide_outb(device, ATA_SECT_CNT, 1);
1010 ide_outb(device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
1011 ide_outb(device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
1012 ide_outb(device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
1016 ide_outb(device, ATA_DEV_HD,
1017 ATA_LBA | ATA_DEVICE(device));
1018 ide_outb(device, ATA_COMMAND, ATA_CMD_READ_EXT);
1023 ide_outb(device, ATA_DEV_HD, ATA_LBA |
1024 ATA_DEVICE(device) | ((blknr >> 24) & 0xF));
1025 ide_outb(device, ATA_COMMAND, ATA_CMD_READ);
1031 /* may take up to 4 sec */
1032 c = ide_wait(device, IDE_SPIN_UP_TIME_OUT);
1035 /* can't take over 500 ms */
1036 c = ide_wait(device, IDE_TIME_OUT);
1039 if ((c & (ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR)) !=
1041 printf("Error (no IRQ) dev %d blk " LBAF
1042 ": status %#02x\n", device, blknr, c);
1046 ide_input_data(device, buffer, ATA_SECTORWORDS);
1047 (void) ide_inb(device, ATA_STATUS); /* clear IRQ */
1051 buffer += ATA_BLOCKSIZE;
1058 ulong ide_write(struct udevice *dev, lbaint_t blknr, lbaint_t blkcnt,
1061 ulong ide_write(struct blk_desc *block_dev, lbaint_t blknr, lbaint_t blkcnt,
1066 struct blk_desc *block_dev = dev_get_uclass_platdata(dev);
1068 int device = block_dev->devnum;
1073 unsigned char lba48 = 0;
1075 if (blknr & 0x0000fffff0000000ULL) {
1076 /* more than 28 bits used, use 48bit mode */
1083 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
1085 while (blkcnt-- > 0) {
1086 c = ide_wait(device, IDE_TIME_OUT);
1088 if (c & ATA_STAT_BUSY) {
1089 printf("IDE read: device %d not ready\n", device);
1094 /* write high bits */
1095 ide_outb(device, ATA_SECT_CNT, 0);
1096 ide_outb(device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
1097 #ifdef CONFIG_SYS_64BIT_LBA
1098 ide_outb(device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
1099 ide_outb(device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
1101 ide_outb(device, ATA_LBA_MID, 0);
1102 ide_outb(device, ATA_LBA_HIGH, 0);
1106 ide_outb(device, ATA_SECT_CNT, 1);
1107 ide_outb(device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
1108 ide_outb(device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
1109 ide_outb(device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
1113 ide_outb(device, ATA_DEV_HD,
1114 ATA_LBA | ATA_DEVICE(device));
1115 ide_outb(device, ATA_COMMAND, ATA_CMD_WRITE_EXT);
1120 ide_outb(device, ATA_DEV_HD, ATA_LBA |
1121 ATA_DEVICE(device) | ((blknr >> 24) & 0xF));
1122 ide_outb(device, ATA_COMMAND, ATA_CMD_WRITE);
1127 /* can't take over 500 ms */
1128 c = ide_wait(device, IDE_TIME_OUT);
1130 if ((c & (ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR)) !=
1132 printf("Error (no IRQ) dev %d blk " LBAF
1133 ": status %#02x\n", device, blknr, c);
1137 ide_output_data(device, buffer, ATA_SECTORWORDS);
1138 c = ide_inb(device, ATA_STATUS); /* clear IRQ */
1141 buffer += ATA_BLOCKSIZE;
1147 #if defined(CONFIG_OF_IDE_FIXUP)
1148 int ide_device_present(int dev)
1150 if (dev >= CONFIG_SYS_IDE_MAXBUS)
1152 return ide_dev_desc[dev].type == DEV_TYPE_UNKNOWN ? 0 : 1;
1157 static int ide_blk_probe(struct udevice *udev)
1159 struct blk_desc *desc = dev_get_uclass_platdata(udev);
1161 /* fill in device vendor/product/rev strings */
1162 strncpy(desc->vendor, ide_dev_desc[desc->devnum].vendor,
1164 desc->vendor[BLK_VEN_SIZE] = '\0';
1165 strncpy(desc->product, ide_dev_desc[desc->devnum].product,
1167 desc->product[BLK_PRD_SIZE] = '\0';
1168 strncpy(desc->revision, ide_dev_desc[desc->devnum].revision,
1170 desc->revision[BLK_REV_SIZE] = '\0';
1175 static const struct blk_ops ide_blk_ops = {
1180 U_BOOT_DRIVER(ide_blk) = {
1183 .ops = &ide_blk_ops,
1184 .probe = ide_blk_probe,
1187 static int ide_probe(struct udevice *udev)
1189 struct udevice *blk_dev;
1196 for (i = 0; i < CONFIG_SYS_IDE_MAXDEVICE; i++) {
1197 if (ide_dev_desc[i].type != DEV_TYPE_UNKNOWN) {
1198 sprintf(name, "blk#%d", i);
1200 blksz = ide_dev_desc[i].blksz;
1201 size = blksz * ide_dev_desc[i].lba;
1204 * With CDROM, if there is no CD inserted, blksz will
1205 * be zero, don't bother to create IDE block device.
1209 ret = blk_create_devicef(udev, "ide_blk", name,
1211 blksz, size, &blk_dev);
1220 U_BOOT_DRIVER(ide) = {
1226 struct pci_device_id ide_supported[] = {
1227 { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_IDE << 8, 0xffff00) },
1231 U_BOOT_PCI_DEVICE(ide, ide_supported);
1233 UCLASS_DRIVER(ide) = {
1238 U_BOOT_LEGACY_BLK(ide) = {
1239 .if_typename = "ide",
1240 .if_type = IF_TYPE_IDE,
1241 .max_devs = CONFIG_SYS_IDE_MAXDEVICE,
1242 .desc = ide_dev_desc,