4 #include <linux/cciss_defs.h>
7 #define CISS_VERSION "1.00"
9 /* general boundary definitions */
10 #define MAXSGENTRIES 32
11 #define CCISS_SG_CHAIN 0x80000000
12 #define MAXREPLYQS 256
14 /* Unit Attentions ASC's as defined for the MSA2012sa */
15 #define POWER_OR_RESET 0x29
16 #define STATE_CHANGED 0x2a
17 #define UNIT_ATTENTION_CLEARED 0x2f
18 #define LUN_FAILED 0x3e
19 #define REPORT_LUNS_CHANGED 0x3f
21 /* Unit Attentions ASCQ's as defined for the MSA2012sa */
23 /* These ASCQ's defined for ASC = POWER_OR_RESET */
24 #define POWER_ON_RESET 0x00
25 #define POWER_ON_REBOOT 0x01
26 #define SCSI_BUS_RESET 0x02
27 #define MSA_TARGET_RESET 0x03
28 #define CONTROLLER_FAILOVER 0x04
29 #define TRANSCEIVER_SE 0x05
30 #define TRANSCEIVER_LVD 0x06
32 /* These ASCQ's defined for ASC = STATE_CHANGED */
33 #define RESERVATION_PREEMPTED 0x03
34 #define ASYM_ACCESS_CHANGED 0x06
35 #define LUN_CAPACITY_CHANGED 0x09
37 /* config space register offsets */
38 #define CFG_VENDORID 0x00
39 #define CFG_DEVICEID 0x02
40 #define CFG_I2OBAR 0x10
41 #define CFG_MEM1BAR 0x14
43 /* i2o space register offsets */
44 #define I2O_IBDB_SET 0x20
45 #define I2O_IBDB_CLEAR 0x70
46 #define I2O_INT_STATUS 0x30
47 #define I2O_INT_MASK 0x34
48 #define I2O_IBPOST_Q 0x40
49 #define I2O_OBPOST_Q 0x44
50 #define I2O_DMA1_CFG 0x214
52 /* Configuration Table */
53 #define CFGTBL_ChangeReq 0x00000001l
54 #define CFGTBL_AccCmds 0x00000001l
55 #define DOORBELL_CTLR_RESET 0x00000004l
56 #define DOORBELL_CTLR_RESET2 0x00000020l
58 #define CFGTBL_Trans_Simple 0x00000002l
59 #define CFGTBL_Trans_Performant 0x00000004l
60 #define CFGTBL_Trans_use_short_tags 0x20000000l
62 #define CFGTBL_BusType_Ultra2 0x00000001l
63 #define CFGTBL_BusType_Ultra3 0x00000002l
64 #define CFGTBL_BusType_Fibre1G 0x00000100l
65 #define CFGTBL_BusType_Fibre2G 0x00000200l
66 typedef struct _vals32
78 /* Type defs used in the following structs */
82 #define CISS_MAX_PHYS_LUN 1024
87 #define CISS_INQUIRY 0x12
89 typedef struct _InquiryData_struct
94 #define CISS_REPORT_LOG 0xc2 /* Report Logical LUNs */
95 #define CISS_REPORT_PHYS 0xc3 /* Report Physical LUNs */
97 typedef struct _ReportLUNdata_struct
99 BYTE LUNListLength[4];
101 BYTE LUN[CISS_MAX_LUN][8];
102 } ReportLunData_struct;
104 #define CCISS_READ_CAPACITY 0x25 /* Read Capacity */
105 typedef struct _ReadCapdata_struct
107 BYTE total_size[4]; /* Total size in blocks */
108 BYTE block_size[4]; /* Size of blocks in bytes */
109 } ReadCapdata_struct;
111 #define CCISS_READ_CAPACITY_16 0x9e /* Read Capacity 16 */
113 /* service action to differentiate a 16 byte read capacity from
114 other commands that use the 0x9e SCSI op code */
116 #define CCISS_READ_CAPACITY_16_SERVICE_ACT 0x10
118 typedef struct _ReadCapdata_struct_16
120 BYTE total_size[8]; /* Total size in blocks */
121 BYTE block_size[4]; /* Size of blocks in bytes */
122 BYTE prot_en:1; /* protection enable bit */
123 BYTE rto_en:1; /* reference tag own enable bit */
124 BYTE reserved:6; /* reserved bits */
125 BYTE reserved2[18]; /* reserved bytes per spec */
126 } ReadCapdata_struct_16;
128 /* Define the supported read/write commands for cciss based controllers */
130 #define CCISS_READ_10 0x28 /* Read(10) */
131 #define CCISS_WRITE_10 0x2a /* Write(10) */
132 #define CCISS_READ_16 0x88 /* Read(16) */
133 #define CCISS_WRITE_16 0x8a /* Write(16) */
135 /* Define the CDB lengths supported by cciss based controllers */
141 #define BMIC_READ 0x26
142 #define BMIC_WRITE 0x27
143 #define BMIC_CACHE_FLUSH 0xc2
144 #define CCISS_CACHE_FLUSH 0x01 /* C2 was already being used by CCISS */
146 #define CCISS_ABORT_MSG 0x00
147 #define CCISS_RESET_MSG 0x01
148 #define CCISS_RESET_TYPE_CONTROLLER 0x00
149 #define CCISS_RESET_TYPE_BUS 0x01
150 #define CCISS_RESET_TYPE_TARGET 0x03
151 #define CCISS_RESET_TYPE_LUN 0x04
152 #define CCISS_NOOP_MSG 0x03
154 /* Command List Structure */
155 #define CTLR_LUNID "\0\0\0\0\0\0\0\0"
157 typedef struct _CommandListHeader_struct {
163 } CommandListHeader_struct;
164 typedef struct _ErrDescriptor_struct {
167 } ErrDescriptor_struct;
168 typedef struct _SGDescriptor_struct {
172 } SGDescriptor_struct;
175 #define CMD_RWREQ 0x00
176 #define CMD_IOCTL_PEND 0x01
177 #define CMD_SCSI 0x03
178 #define CMD_MSG_DONE 0x04
179 #define CMD_MSG_TIMEOUT 0x05
180 #define CMD_MSG_STALE 0xff
182 /* This structure needs to be divisible by COMMANDLIST_ALIGNMENT
183 * because low bits of the address are used to to indicate that
184 * whether the tag contains an index or an address. PAD_32 and
185 * PAD_64 can be adjusted independently as needed for 32-bit
186 * and 64-bits systems.
188 #define COMMANDLIST_ALIGNMENT (32)
189 #define IS_64_BIT ((sizeof(long) - 4)/4)
190 #define IS_32_BIT (!IS_64_BIT)
193 #define PADSIZE (IS_32_BIT * PAD_32 + IS_64_BIT * PAD_64)
194 #define DIRECT_LOOKUP_BIT 0x10
195 #define DIRECT_LOOKUP_SHIFT 5
197 typedef struct _CommandList_struct {
198 CommandListHeader_struct Header;
199 RequestBlock_struct Request;
200 ErrDescriptor_struct ErrDesc;
201 SGDescriptor_struct SG[MAXSGENTRIES];
202 /* information associated with the command */
203 __u32 busaddr; /* physical address of this record */
204 ErrorInfo_struct * err_info; /* pointer to the allocated mem */
208 struct list_head list;
210 struct completion *waiting;
214 } CommandList_struct;
216 /* Configuration Table Structure */
217 typedef struct _HostWrite_struct {
218 DWORD TransportRequest;
224 typedef struct _CfgTable_struct {
227 #define SIMPLE_MODE 0x02
228 #define PERFORMANT_MODE 0x04
229 #define MEMQ_MODE 0x08
230 DWORD TransportSupport;
231 DWORD TransportActive;
232 HostWrite_struct HostWrite;
235 DWORD TransMethodOffset;
240 DWORD MaxLogicalUnits;
241 DWORD MaxPhysicalDrives;
242 DWORD MaxPhysicalDrivesPerLogicalUnit;
243 DWORD MaxPerformantModeCommands;
244 u8 reserved[0x78 - 0x58];
245 u32 misc_fw_support; /* offset 0x78 */
246 #define MISC_FW_DOORBELL_RESET (0x02)
247 #define MISC_FW_DOORBELL_RESET2 (0x10)
248 u8 driver_version[32];
251 struct TransTable_struct {
262 u32 RepQCtrAddrLow32;
263 u32 RepQCtrAddrHigh32;
269 #endif /* CCISS_CMD_H */