2 * Copyright (C) Procsys. All rights reserved.
3 * Author: Mushtaq Khan <mushtaq_k@procsys.com>
4 * <mushtaqk_921@yahoo.co.in>
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of
9 * the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * with the reference to ata_piix driver in kernel 2.4.32
25 * This file contains SATA controller and SATA drive initialization functions
33 #include <asm/byteorder.h>
38 #ifdef CFG_ATA_PIIX /*ata_piix driver */
40 #define DEBUG_SATA 0 /*For debug prints set DEBUG_SATA to 1 */
43 #define DRV_DECL /*For file specific declarations */
46 /*Macros realted to PCI*/
47 #define PCI_SATA_BUS 0x00
48 #define PCI_SATA_DEV 0x1f
49 #define PCI_SATA_FUNC 0x02
51 #define PCI_SATA_BASE1 0x10
52 #define PCI_SATA_BASE2 0x14
53 #define PCI_SATA_BASE3 0x18
54 #define PCI_SATA_BASE4 0x1c
55 #define PCI_SATA_BASE5 0x20
59 #define PCI_DMA_CTL 0x48
61 #define PORT_PRESENT (1<<0)
62 #define PORT_ENABLED (1<<4)
65 u32 iobase1 = 0; /*Primary cmd block */
66 u32 iobase2 = 0; /*Primary ctl block */
67 u32 iobase3 = 0; /*Sec cmd block */
68 u32 iobase4 = 0; /*sec ctl block */
69 u32 iobase5 = 0; /*BMDMA*/
73 u32 bus = PCI_SATA_BUS;
74 u32 dev = PCI_SATA_DEV;
75 u32 fun = PCI_SATA_FUNC;
77 u8 lat = 0, pcibios_max_latency = 0xff;
78 u8 pmr; /*Port mapping reg */
79 u8 pi; /*Prgming Interface reg */
81 bdf = PCI_BDF (bus, dev, fun);
82 pci_read_config_dword (bdf, PCI_SATA_BASE1, &iobase1);
83 pci_read_config_dword (bdf, PCI_SATA_BASE2, &iobase2);
84 pci_read_config_dword (bdf, PCI_SATA_BASE3, &iobase3);
85 pci_read_config_dword (bdf, PCI_SATA_BASE4, &iobase4);
86 pci_read_config_dword (bdf, PCI_SATA_BASE5, &iobase5);
88 if ((iobase1 == 0xFFFFFFFF) || (iobase2 == 0xFFFFFFFF) ||
89 (iobase3 == 0xFFFFFFFF) || (iobase4 == 0xFFFFFFFF) ||
90 (iobase5 == 0xFFFFFFFF)) {
91 printf ("error no base addr for SATA controller\n");
95 iobase1 &= 0xFFFFFFFE;
96 iobase2 &= 0xFFFFFFFE;
97 iobase3 &= 0xFFFFFFFE;
98 iobase4 &= 0xFFFFFFFE;
99 iobase5 &= 0xFFFFFFFE;
102 pci_read_config_byte (bdf, PCI_PMR, &pmr);
104 printf ("combined mode not supported\n");
108 pci_read_config_byte (bdf, PCI_PI, &pi);
109 if ((pi & 0x05) != 0x05) {
110 printf ("Sata is in Legacy mode\n");
113 printf ("sata is in Native mode\n");
116 /*MASTER CFG AND IO CFG */
117 pci_read_config_word (bdf, PCI_COMMAND, &cmd);
118 cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_IO;
119 pci_write_config_word (bdf, PCI_COMMAND, cmd);
120 pci_read_config_byte (dev, PCI_LATENCY_TIMER, &lat);
123 lat = (64 <= pcibios_max_latency) ? 64 : pcibios_max_latency;
124 else if (lat > pcibios_max_latency)
125 lat = pcibios_max_latency;
126 pci_write_config_byte (dev, PCI_LATENCY_TIMER, lat);
132 sata_bus_probe (int port_no)
137 mask = (PORT_PRESENT << port_no);
138 pci_read_config_word (bdf, PCI_PCS, &pcs);
139 orig_mask = (int) pcs & 0xff;
140 if ((orig_mask & mask) != mask)
151 for (i = 0; i < CFG_SATA_MAXDEVICES; i++) {
152 sata_dev_desc[i].type = DEV_TYPE_UNKNOWN;
153 sata_dev_desc[i].if_type = IF_TYPE_IDE;
154 sata_dev_desc[i].dev = i;
155 sata_dev_desc[i].part_type = PART_TYPE_UNKNOWN;
156 sata_dev_desc[i].blksz = 0;
157 sata_dev_desc[i].lba = 0;
158 sata_dev_desc[i].block_read = sata_read;
161 rv = pci_sata_init ();
163 printf ("pci initialization failed\n");
168 port[0].ioaddr.cmd_addr = iobase1;
169 port[0].ioaddr.altstatus_addr = port[0].ioaddr.ctl_addr =
170 iobase2 | ATA_PCI_CTL_OFS;
171 port[0].ioaddr.bmdma_addr = iobase5;
174 port[1].ioaddr.cmd_addr = iobase3;
175 port[1].ioaddr.altstatus_addr = port[1].ioaddr.ctl_addr =
176 iobase4 | ATA_PCI_CTL_OFS;
177 port[1].ioaddr.bmdma_addr = iobase5 + 0x8;
179 for (i = 0; i < CFG_SATA_MAXBUS; i++)
180 sata_port (&port[i].ioaddr);
182 for (i = 0; i < CFG_SATA_MAXBUS; i++) {
183 if (!(sata_bus_probe (i))) {
184 port[i].port_state = 0;
185 printf ("SATA#%d port is not present \n", i);
187 printf ("SATA#%d port is present\n", i);
188 if (sata_bus_softreset (i)) {
189 port[i].port_state = 0;
191 port[i].port_state = 1;
196 for (i = 0; i < CFG_SATA_MAXBUS; i++) {
199 if (port[i].port_state == 0)
201 for (j = 0; j < CFG_SATA_DEVS_PER_BUS; j++) {
202 sata_identify (i, j);
203 set_Feature_cmd (i, j);
204 devno = i * CFG_SATA_DEVS_PER_BUS + j;
205 if ((sata_dev_desc[devno].lba > 0) &&
206 (sata_dev_desc[devno].blksz > 0)) {
207 dev_print (&sata_dev_desc[devno]);
208 /* initialize partition type */
209 init_part (&sata_dev_desc[devno]);
212 i * CFG_SATA_DEVS_PER_BUS + j;
220 sata_inb (unsigned long ioaddr)
225 static void __inline__
226 sata_outb (unsigned char val, unsigned long ioaddr)
232 output_data (struct sata_ioports *ioaddr, ulong * sect_buf, int words)
234 outsw (ioaddr->data_addr, sect_buf, words << 1);
238 input_data (struct sata_ioports *ioaddr, ulong * sect_buf, int words)
240 insw (ioaddr->data_addr, sect_buf, words << 1);
245 sata_cpy (unsigned char *dst, unsigned char *src, unsigned int len)
247 unsigned char *end, *last;
252 /* reserve space for '\0' */
256 /* skip leading white space */
257 while ((*src) && (src < end) && (*src == ' '))
260 /* copy string, omitting trailing white space */
261 while ((*src) && (src < end)) {
271 sata_bus_softreset (int num)
273 u8 dev = 0, status = 0, i;
275 port[num].dev_mask = 0;
277 for (i = 0; i < CFG_SATA_DEVS_PER_BUS; i++) {
278 if (!(sata_devchk (&port[num].ioaddr, i))) {
279 PRINTF ("dev_chk failed for dev#%d\n", i);
281 port[num].dev_mask |= (1 << i);
282 PRINTF ("dev_chk passed for dev#%d\n", i);
286 if (!(port[num].dev_mask)) {
287 printf ("no devices on port%d\n", num);
291 dev_select (&port[num].ioaddr, dev);
293 port[num].ctl_reg = 0x08; /*Default value of control reg */
294 sata_outb (port[num].ctl_reg, port[num].ioaddr.ctl_addr);
296 sata_outb (port[num].ctl_reg | ATA_SRST, port[num].ioaddr.ctl_addr);
298 sata_outb (port[num].ctl_reg, port[num].ioaddr.ctl_addr);
300 /* spec mandates ">= 2ms" before checking status.
301 * We wait 150ms, because that was the magic delay used for
302 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
303 * between when the ATA command register is written, and then
304 * status is checked. Because waiting for "a while" before
305 * checking status is fine, post SRST, we perform this magic
306 * delay here as well.
309 status = sata_busy_wait (&port[num].ioaddr, ATA_BUSY, 300);
310 while ((status & ATA_BUSY)) {
312 status = sata_busy_wait (&port[num].ioaddr, ATA_BUSY, 3);
315 if (status & ATA_BUSY)
316 printf ("ata%u is slow to respond,plz be patient\n", port);
318 while ((status & ATA_BUSY)) {
320 status = sata_chk_status (&port[num].ioaddr);
323 if (status & ATA_BUSY) {
324 printf ("ata%u failed to respond : ", port);
325 printf ("bus reset failed\n");
332 sata_identify (int num, int dev)
334 u8 cmd = 0, status = 0, devno = num * CFG_SATA_DEVS_PER_BUS + dev;
335 u16 iobuf[ATA_SECT_SIZE];
339 memset (iobuf, 0, sizeof (iobuf));
340 hd_driveid_t *iop = (hd_driveid_t *) iobuf;
347 if (!(port[num].dev_mask & mask)) {
348 printf ("dev%d is not present on port#%d\n", dev, num);
352 printf ("port=%d dev=%d\n", num, dev);
354 dev_select (&port[num].ioaddr, dev);
357 cmd = ATA_CMD_IDENT; /*Device Identify Command */
358 sata_outb (cmd, port[num].ioaddr.command_addr);
359 sata_inb (port[num].ioaddr.altstatus_addr);
362 status = sata_busy_wait (&port[num].ioaddr, ATA_BUSY, 1000);
363 if (status & ATA_ERR) {
364 printf ("\ndevice not responding\n");
365 port[num].dev_mask &= ~mask;
369 input_data (&port[num].ioaddr, (ulong *) iobuf, ATA_SECTORWORDS);
371 PRINTF ("\nata%u: dev %u cfg 49:%04x 82:%04x 83:%04x 84:%04x85:%04x"
372 "86:%04x" "87:%04x 88:%04x\n", num, dev, iobuf[49],
373 iobuf[82], iobuf[83], iobuf[84], iobuf[85], iobuf[86],
374 iobuf[87], iobuf[88]);
376 /* we require LBA and DMA support (bits 8 & 9 of word 49) */
377 if (!ata_id_has_dma (iobuf) || !ata_id_has_lba (iobuf)) {
378 PRINTF ("ata%u: no dma/lba\n", num);
382 if (ata_id_has_lba48 (iobuf)) {
383 n_sectors = ata_id_u64 (iobuf, 100);
385 n_sectors = ata_id_u32 (iobuf, 60);
387 PRINTF ("no. of sectors %u\n", ata_id_u64 (iobuf, 100));
388 PRINTF ("no. of sectors %u\n", ata_id_u32 (iobuf, 60));
390 if (n_sectors == 0) {
391 port[num].dev_mask &= ~mask;
395 sata_cpy (sata_dev_desc[devno].revision, iop->fw_rev,
396 sizeof (sata_dev_desc[devno].revision));
397 sata_cpy (sata_dev_desc[devno].vendor, iop->model,
398 sizeof (sata_dev_desc[devno].vendor));
399 sata_cpy (sata_dev_desc[devno].product, iop->serial_no,
400 sizeof (sata_dev_desc[devno].product));
401 strswab (sata_dev_desc[devno].revision);
402 strswab (sata_dev_desc[devno].vendor);
404 if ((iop->config & 0x0080) == 0x0080) {
405 sata_dev_desc[devno].removable = 1;
407 sata_dev_desc[devno].removable = 0;
410 sata_dev_desc[devno].lba = iop->lba_capacity;
411 PRINTF ("lba=0x%x", sata_dev_desc[devno].lba);
414 if (iop->command_set_2 & 0x0400) {
415 sata_dev_desc[devno].lba48 = 1;
416 lba = (unsigned long long) iop->lba48_capacity[0] |
417 ((unsigned long long) iop->lba48_capacity[1] << 16) |
418 ((unsigned long long) iop->lba48_capacity[2] << 32) |
419 ((unsigned long long) iop->lba48_capacity[3] << 48);
421 sata_dev_desc[devno].lba48 = 0;
426 sata_dev_desc[devno].type = DEV_TYPE_HARDDISK;
427 sata_dev_desc[devno].blksz = ATA_BLOCKSIZE;
428 sata_dev_desc[devno].lun = 0; /* just to fill something in... */
432 set_Feature_cmd (int num, int dev)
434 u8 mask = 0x00, status = 0;
441 if (!(port[num].dev_mask & mask)) {
442 PRINTF ("dev%d is not present on port#%d\n", dev, num);
446 dev_select (&port[num].ioaddr, dev);
448 sata_outb (SETFEATURES_XFER, port[num].ioaddr.feature_addr);
449 sata_outb (XFER_PIO_4, port[num].ioaddr.nsect_addr);
450 sata_outb (0, port[num].ioaddr.lbal_addr);
451 sata_outb (0, port[num].ioaddr.lbam_addr);
452 sata_outb (0, port[num].ioaddr.lbah_addr);
454 sata_outb (ATA_DEVICE_OBS, port[num].ioaddr.device_addr);
455 sata_outb (ATA_CMD_SETF, port[num].ioaddr.command_addr);
460 status = sata_busy_wait (&port[num].ioaddr, ATA_BUSY, 5000);
461 if ((status & (ATA_STAT_BUSY | ATA_STAT_ERR))) {
462 printf ("Error : status 0x%02x\n", status);
463 port[num].dev_mask &= ~mask;
468 sata_port (struct sata_ioports *ioport)
470 ioport->data_addr = ioport->cmd_addr + ATA_REG_DATA;
471 ioport->error_addr = ioport->cmd_addr + ATA_REG_ERR;
472 ioport->feature_addr = ioport->cmd_addr + ATA_REG_FEATURE;
473 ioport->nsect_addr = ioport->cmd_addr + ATA_REG_NSECT;
474 ioport->lbal_addr = ioport->cmd_addr + ATA_REG_LBAL;
475 ioport->lbam_addr = ioport->cmd_addr + ATA_REG_LBAM;
476 ioport->lbah_addr = ioport->cmd_addr + ATA_REG_LBAH;
477 ioport->device_addr = ioport->cmd_addr + ATA_REG_DEVICE;
478 ioport->status_addr = ioport->cmd_addr + ATA_REG_STATUS;
479 ioport->command_addr = ioport->cmd_addr + ATA_REG_CMD;
483 sata_devchk (struct sata_ioports *ioaddr, int dev)
487 dev_select (ioaddr, dev);
489 sata_outb (0x55, ioaddr->nsect_addr);
490 sata_outb (0xaa, ioaddr->lbal_addr);
492 sata_outb (0xaa, ioaddr->nsect_addr);
493 sata_outb (0x55, ioaddr->lbal_addr);
495 sata_outb (0x55, ioaddr->nsect_addr);
496 sata_outb (0xaa, ioaddr->lbal_addr);
498 nsect = sata_inb (ioaddr->nsect_addr);
499 lbal = sata_inb (ioaddr->lbal_addr);
501 if ((nsect == 0x55) && (lbal == 0xaa))
502 return 1; /* we found a device */
504 return 0; /* nothing found */
508 dev_select (struct sata_ioports *ioaddr, int dev)
513 tmp = ATA_DEVICE_OBS;
515 tmp = ATA_DEVICE_OBS | ATA_DEV1;
517 sata_outb (tmp, ioaddr->device_addr);
518 sata_inb (ioaddr->altstatus_addr);
523 sata_busy_wait (struct sata_ioports *ioaddr, int bits, unsigned int max)
529 status = sata_chk_status (ioaddr);
531 } while ((status & bits) && (max > 0));
537 sata_chk_status (struct sata_ioports * ioaddr)
539 return sata_inb (ioaddr->status_addr);
547 for (i = 0; i < count; i++)
552 sata_read (int device, ulong blknr,lbaint_t blkcnt, void * buff)
554 ulong n = 0, *buffer = (ulong *)buff;
555 u8 dev = 0, num = 0, mask = 0, status = 0;
558 unsigned char lba48 = 0;
560 if (blknr & 0x0000fffff0000000) {
561 if (!sata_dev_desc[devno].lba48) {
562 printf ("Drive doesn't support 48-bit addressing\n");
565 /* more than 28 bits used, use 48bit mode */
570 num = device / CFG_SATA_DEVS_PER_BUS;
572 if (device >= CFG_SATA_DEVS_PER_BUS)
573 dev = device - CFG_SATA_DEVS_PER_BUS;
582 if (!(port[num].dev_mask & mask)) {
583 printf ("dev%d is not present on port#%d\n", dev, num);
588 dev_select (&port[num].ioaddr, dev);
590 status = sata_busy_wait (&port[num].ioaddr, ATA_BUSY, 500);
591 if (status & ATA_BUSY) {
592 printf ("ata%u failed to respond\n", port[num].port_no);
595 while (blkcnt-- > 0) {
596 status = sata_busy_wait (&port[num].ioaddr, ATA_BUSY, 500);
597 if (status & ATA_BUSY) {
598 printf ("ata%u failed to respond\n", 0);
603 /* write high bits */
604 sata_outb (0, port[num].ioaddr.nsect_addr);
605 sata_outb ((blknr >> 24) & 0xFF,
606 port[num].ioaddr.lbal_addr);
607 sata_outb ((blknr >> 32) & 0xFF,
608 port[num].ioaddr.lbam_addr);
609 sata_outb ((blknr >> 40) & 0xFF,
610 port[num].ioaddr.lbah_addr);
613 sata_outb (1, port[num].ioaddr.nsect_addr);
614 sata_outb (((blknr) >> 0) & 0xFF,
615 port[num].ioaddr.lbal_addr);
616 sata_outb ((blknr >> 8) & 0xFF, port[num].ioaddr.lbam_addr);
617 sata_outb ((blknr >> 16) & 0xFF, port[num].ioaddr.lbah_addr);
621 sata_outb (ATA_LBA, port[num].ioaddr.device_addr);
622 sata_outb (ATA_CMD_READ_EXT,
623 port[num].ioaddr.command_addr);
627 sata_outb (ATA_LBA | ((blknr >> 24) & 0xF),
628 port[num].ioaddr.device_addr);
629 sata_outb (ATA_CMD_READ,
630 port[num].ioaddr.command_addr);
634 /*may take up to 4 sec */
635 status = sata_busy_wait (&port[num].ioaddr, ATA_BUSY, 4000);
637 if ((status & (ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR))
641 printf ("Error no DRQ dev %d blk %ld: sts 0x%02x\n",
642 device, (ulong) blknr, status);
643 err = sata_inb (port[num].ioaddr.error_addr);
644 printf ("Error reg = 0x%x\n", err);
647 input_data (&port[num].ioaddr, buffer, ATA_SECTORWORDS);
648 sata_inb (port[num].ioaddr.altstatus_addr);
653 buffer += ATA_SECTORWORDS;
659 sata_write (int device, ulong blknr,lbaint_t blkcnt, void * buff)
661 ulong n = 0, *buffer = (ulong *)buff;
662 unsigned char status = 0, num = 0, dev = 0, mask = 0;
665 unsigned char lba48 = 0;
667 if (blknr & 0x0000fffff0000000) {
668 if (!sata_dev_desc[devno].lba48) {
669 printf ("Drive doesn't support 48-bit addressing\n");
672 /* more than 28 bits used, use 48bit mode */
677 num = device / CFG_SATA_DEVS_PER_BUS;
679 if (device >= CFG_SATA_DEVS_PER_BUS)
680 dev = device - CFG_SATA_DEVS_PER_BUS;
690 dev_select (&port[num].ioaddr, dev);
692 status = sata_busy_wait (&port[num].ioaddr, ATA_BUSY, 500);
693 if (status & ATA_BUSY) {
694 printf ("ata%u failed to respond\n", port[num].port_no);
698 while (blkcnt-- > 0) {
699 status = sata_busy_wait (&port[num].ioaddr, ATA_BUSY, 500);
700 if (status & ATA_BUSY) {
701 printf ("ata%u failed to respond\n",
707 /* write high bits */
708 sata_outb (0, port[num].ioaddr.nsect_addr);
709 sata_outb ((blknr >> 24) & 0xFF,
710 port[num].ioaddr.lbal_addr);
711 sata_outb ((blknr >> 32) & 0xFF,
712 port[num].ioaddr.lbam_addr);
713 sata_outb ((blknr >> 40) & 0xFF,
714 port[num].ioaddr.lbah_addr);
717 sata_outb (1, port[num].ioaddr.nsect_addr);
718 sata_outb ((blknr >> 0) & 0xFF, port[num].ioaddr.lbal_addr);
719 sata_outb ((blknr >> 8) & 0xFF, port[num].ioaddr.lbam_addr);
720 sata_outb ((blknr >> 16) & 0xFF, port[num].ioaddr.lbah_addr);
723 sata_outb (ATA_LBA, port[num].ioaddr.device_addr);
724 sata_outb (ATA_CMD_WRITE_EXT,
725 port[num].ioaddr.command_addr);
729 sata_outb (ATA_LBA | ((blknr >> 24) & 0xF),
730 port[num].ioaddr.device_addr);
731 sata_outb (ATA_CMD_WRITE,
732 port[num].ioaddr.command_addr);
736 /*may take up to 4 sec */
737 status = sata_busy_wait (&port[num].ioaddr, ATA_BUSY, 4000);
738 if ((status & (ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR))
740 printf ("Error no DRQ dev %d blk %ld: sts 0x%02x\n",
741 device, (ulong) blknr, status);
745 output_data (&port[num].ioaddr, buffer, ATA_SECTORWORDS);
746 sata_inb (port[num].ioaddr.altstatus_addr);
751 buffer += ATA_SECTORWORDS;
756 block_dev_desc_t *sata_get_dev (int dev);
759 sata_get_dev (int dev)
761 return ((block_dev_desc_t *) & sata_dev_desc[dev]);
765 do_sata (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
771 printf ("Usage:\n%s\n", cmdtp->usage);
774 if (strncmp (argv[1], "init", 4) == 0) {
777 rcode = init_sata ();
779 printf ("Sata initialization Failed\n");
781 } else if (strncmp (argv[1], "inf", 3) == 0) {
785 for (i = 0; i < CFG_SATA_MAXDEVICES; ++i) {
786 /*List only known devices */
787 if (sata_dev_desc[i].type ==
790 printf ("sata dev %d: ", i);
791 dev_print (&sata_dev_desc[i]);
795 printf ("Usage:\n%s\n", cmdtp->usage);
798 if (strcmp (argv[1], "dev") == 0) {
799 int dev = (int) simple_strtoul (argv[2], NULL, 10);
801 if (dev >= CFG_SATA_MAXDEVICES) {
802 printf ("\nSata dev %d not available\n",
806 printf ("\nSATA dev %d: ", dev);
807 dev_print (&sata_dev_desc[dev]);
808 if (sata_dev_desc[dev].type == DEV_TYPE_UNKNOWN)
812 } else if (strcmp (argv[1], "part") == 0) {
813 int dev = (int) simple_strtoul (argv[2], NULL, 10);
815 if (dev >= CFG_SATA_MAXDEVICES) {
816 printf ("\nSata dev %d not available\n",
820 PRINTF ("\nSATA dev %d: ", dev);
821 if (sata_dev_desc[dev].part_type !=
823 print_part (&sata_dev_desc[dev]);
825 printf ("\nSata dev %d partition type "
831 printf ("Usage:\n%s\n", cmdtp->usage);
835 printf ("Usage:\n%s\n", cmdtp->usage);
838 if (strcmp (argv[1], "read") == 0) {
839 ulong addr = simple_strtoul (argv[2], NULL, 16);
840 ulong cnt = simple_strtoul (argv[4], NULL, 16);
842 lbaint_t blk = simple_strtoul (argv[3], NULL, 16);
844 memset ((int *) addr, 0, cnt * 512);
845 printf ("\nSATA read: dev %d blk # %ld,"
846 "count %ld ... ", curr_dev, blk, cnt);
847 n = sata_read (curr_dev, blk, cnt, (ulong *) addr);
848 /* flush cache after read */
849 flush_cache (addr, cnt * 512);
850 printf ("%ld blocks read: %s\n", n,
851 (n == cnt) ? "OK" : "ERR");
856 } else if (strcmp (argv[1], "write") == 0) {
857 ulong addr = simple_strtoul (argv[2], NULL, 16);
858 ulong cnt = simple_strtoul (argv[4], NULL, 16);
860 lbaint_t blk = simple_strtoul (argv[3], NULL, 16);
862 printf ("\nSata write: dev %d blk # %ld,"
863 "count %ld ... ", curr_dev, blk, cnt);
864 n = sata_write (curr_dev, blk, cnt, (ulong *) addr);
865 printf ("%ld blocks written: %s\n", n,
866 (n == cnt) ? "OK" : "ERR");
872 printf ("Usage:\n%s\n", cmdtp->usage);
878 U_BOOT_CMD (sata, 5, 1, do_sata,
883 "sata read addr blk# cnt\n"
884 "sata write addr blk# cnt\n", "cmd for init,rw and dev-info\n");