1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * (c) 1997-1998 Grant R. Guenther <grant@torque.net>
5 * epia.c is a low-level protocol driver for Shuttle Technologies
6 * EPIA parallel to IDE adapter chip. This device is now obsolete
7 * and has been replaced with the EPAT chip, which is supported
8 * by epat.c, however, some devices based on EPIA are still
12 #include <linux/module.h>
13 #include <linux/init.h>
14 #include <linux/delay.h>
15 #include <linux/kernel.h>
16 #include <linux/types.h>
17 #include <linux/wait.h>
19 #include "pata_parport.h"
22 * mode codes: 0 nybble reads on port 1, 8-bit writes
23 * 1 5/3 reads on ports 1 & 2, 8-bit writes
24 * 2 8-bit reads and writes
30 #define j44(a, b) (((a >> 4) & 0x0f) + (b & 0xf0))
31 #define j53(a, b) (((a >> 3) & 0x1f) + ((b << 4) & 0xe0))
34 * cont = 0 IDE register file
35 * cont = 1 IDE control registers
37 static int cont_map[2] = { 0, 0x80 };
39 static int epia_read_regr(struct pi_adapter *pi, int cont, int regr)
43 regr += cont_map[cont];
48 w0(r); w2(1); w2(3); w0(r);
49 a = r1(); w2(1); b = r1(); w2(4);
53 w0(r); w2(1); w0(r & 0x37);
54 w2(3); w2(5); w0(r | 0xf0);
55 a = r1(); b = r2(); w2(4);
59 w0(r); w2(1); w2(0X21); w2(0x23);
65 w3(regr); w2(0x24); a = r4(); w2(4);
72 static void epia_write_regr(struct pi_adapter *pi, int cont, int regr, int val)
76 regr += cont_map[cont];
83 w0(r); w2(1); w0(val); w2(3); w2(4);
89 w3(r); w4(val); w2(4);
94 #define WR(r, v) epia_write_regr(pi, 0, r, v)
95 #define RR(r) epia_read_regr(pi, 0, r)
98 * The use of register 0x84 is entirely unclear - it seems to control
99 * some EPP counters ... currently we know about 3 different block
100 * sizes: the standard 512 byte reads and writes, 12 byte writes and
101 * 2048 byte reads (the last two being used in the CDrom drivers.
103 static void epia_connect(struct pi_adapter *pi)
108 w2(4); w0(0xa0); w0(0x50); w0(0xc0); w0(0x30); w0(0xa0); w0(0);
111 w0(0xa); w2(1); w2(4); w0(0x82); w2(4); w2(0xc); w2(4);
112 w2(0x24); w2(0x26); w2(4);
117 static void epia_disconnect(struct pi_adapter *pi)
126 static void epia_read_block(struct pi_adapter *pi, char *buf, int count)
133 w0(0x81); w2(1); w2(3); w0(0xc1);
135 for (k = 0; k < count; k++) {
144 w0(0x91); w2(1); w0(0x10); w2(3);
145 w0(0x51); w2(5); w0(0xd1);
147 for (k = 0; k < count; k++) {
156 w0(0x89); w2(1); w2(0x23); w2(0x21);
158 for (k = 0; k < count; k++) {
169 for (k = 0; k < count; k++)
177 for (k = 0; k < count / 2; k++)
178 ((u16 *)buf)[k] = r4w();
185 for (k = 0; k < count / 4; k++)
186 ((u32 *)buf)[k] = r4l();
192 static void epia_write_block(struct pi_adapter *pi, char *buf, int count)
200 w0(0xa1); w2(1); w2(3); w2(1); w2(5);
201 ph = 0; last = 0x8000;
202 for (k = 0; k < count; k++) {
217 for (k = 0; k < count; k++)
226 for (k = 0; k < count / 2; k++)
227 w4w(((u16 *)buf)[k]);
235 for (k = 0; k < count / 4; k++)
236 w4l(((u32 *)buf)[k]);
243 static int epia_test_proto(struct pi_adapter *pi)
250 for (j = 0; j < 2; j++) {
251 WR(6, 0xa0 + j * 0x10);
252 for (k = 0; k < 256; k++) {
255 if (RR(2) != (k ^ 0xaa))
265 epia_read_block(pi, scratch, 512);
266 for (k = 0; k < 256; k++) {
267 if ((scratch[2 * k] & 0xff) != ((k + 1) & 0xff))
269 if ((scratch[2 * k + 1] & 0xff) != ((-2 - k) & 0xff))
275 dev_dbg(&pi->dev, "epia: port 0x%x, mode %d, test=(%d,%d,%d)\n",
276 pi->port, pi->mode, e[0], e[1], f);
278 return (e[0] && e[1]) || f;
282 static void epia_log_adapter(struct pi_adapter *pi)
284 char *mode[6] = { "4-bit", "5/3", "8-bit", "EPP-8", "EPP-16", "EPP-32"};
287 "Shuttle EPIA at 0x%x, mode %d (%s), delay %d\n",
288 pi->port, pi->mode, mode[pi->mode], pi->delay);
291 static struct pi_protocol epia = {
292 .owner = THIS_MODULE,
298 .write_regr = epia_write_regr,
299 .read_regr = epia_read_regr,
300 .write_block = epia_write_block,
301 .read_block = epia_read_block,
302 .connect = epia_connect,
303 .disconnect = epia_disconnect,
304 .test_proto = epia_test_proto,
305 .log_adapter = epia_log_adapter,
308 MODULE_LICENSE("GPL");
309 module_pata_parport_driver(epia);