dm: core: Access device ofnode through functions
[platform/kernel/u-boot.git] / drivers / ata / mtk_ahci.c
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * MTK SATA platform driver
4  *
5  * Copyright (C) 2020 MediaTek Inc.
6  *
7  * Author: Ryder Lee <ryder.lee@mediatek.com>
8  * Author: Frank Wunderlich <frank-w@public-files.de>
9  */
10
11 #include <common.h>
12 #include <ahci.h>
13 #include <asm/io.h>
14 #include <dm.h>
15 #include <dm/of_access.h>
16 #include <generic-phy.h>
17 #include <linux/err.h>
18 #include <regmap.h>
19 #include <reset.h>
20 #include <sata.h>
21 #include <scsi.h>
22 #include <syscon.h>
23
24 #define SYS_CFG                 0x14
25 #define SYS_CFG_SATA_MSK        GENMASK(31, 30)
26 #define SYS_CFG_SATA_EN         BIT(31)
27
28 struct mtk_ahci_priv {
29         void *base;
30
31         struct ahci_uc_priv ahci_priv;
32         struct regmap *mode;
33         struct reset_ctl_bulk rst_bulk;
34 };
35
36 static int mtk_ahci_bind(struct udevice *dev)
37 {
38         struct udevice *scsi_dev;
39
40         return ahci_bind_scsi(dev, &scsi_dev);
41 }
42
43 static int mtk_ahci_of_to_plat(struct udevice *dev)
44 {
45         struct mtk_ahci_priv *priv = dev_get_priv(dev);
46
47         priv->base = devfdt_remap_addr_index(dev, 0);
48
49         return 0;
50 }
51
52 static int mtk_ahci_parse_property(struct ahci_uc_priv *hpriv,
53                                    struct udevice *dev)
54 {
55         struct mtk_ahci_priv *plat = dev_get_priv(dev);
56         const void *fdt = gd->fdt_blob;
57
58         /* enable SATA function if needed */
59         if (fdt_get_property(fdt, dev_of_offset(dev),
60                              "mediatek,phy-mode", NULL)) {
61                 plat->mode = syscon_regmap_lookup_by_phandle(dev,
62                                                 "mediatek,phy-mode");
63                 if (IS_ERR(plat->mode)) {
64                         dev_err(dev, "missing phy-mode phandle\n");
65                         return PTR_ERR(plat->mode);
66                 }
67                 regmap_update_bits(plat->mode, SYS_CFG,
68                                    SYS_CFG_SATA_MSK, SYS_CFG_SATA_EN);
69         }
70
71         ofnode_read_u32(dev_ofnode(dev), "ports-implemented",
72                         &hpriv->port_map);
73         return 0;
74 }
75
76 static int mtk_ahci_probe(struct udevice *dev)
77 {
78         struct mtk_ahci_priv *priv = dev_get_priv(dev);
79         int ret;
80         struct phy phy;
81
82         ret = mtk_ahci_parse_property(&priv->ahci_priv, dev);
83         if (ret)
84                 return ret;
85
86         ret = reset_get_bulk(dev, &priv->rst_bulk);
87         if (!ret) {
88                 reset_assert_bulk(&priv->rst_bulk);
89                 reset_deassert_bulk(&priv->rst_bulk);
90         } else {
91                 dev_err(dev, "Failed to get reset: %d\n", ret);
92         }
93
94         ret = generic_phy_get_by_name(dev, "sata-phy", &phy);
95         if (ret) {
96                 pr_err("can't get the phy from DT\n");
97                 return ret;
98         }
99
100         ret = generic_phy_init(&phy);
101         if (ret) {
102                 pr_err("unable to initialize the sata phy\n");
103                 return ret;
104         }
105
106         ret = generic_phy_power_on(&phy);
107         if (ret) {
108                 pr_err("unable to power on the sata phy\n");
109                 return ret;
110         }
111
112         return ahci_probe_scsi(dev, (ulong)priv->base);
113 }
114
115 static const struct udevice_id mtk_ahci_ids[] = {
116         { .compatible = "mediatek,mtk-ahci" },
117         { }
118 };
119
120 U_BOOT_DRIVER(mtk_ahci) = {
121         .name   = "mtk_ahci",
122         .id     = UCLASS_AHCI,
123         .of_match = mtk_ahci_ids,
124         .bind   = mtk_ahci_bind,
125         .of_to_plat = mtk_ahci_of_to_plat,
126         .ops    = &scsi_ops,
127         .probe  = mtk_ahci_probe,
128         .priv_auto      = sizeof(struct mtk_ahci_priv),
129 };