2 * AHCI SATA platform driver
4 * Copyright 2004-2005 Red Hat, Inc.
5 * Jeff Garzik <jgarzik@pobox.com>
6 * Copyright 2010 MontaVista Software, LLC.
7 * Anton Vorontsov <avorontsov@ru.mvista.com>
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2, or (at your option)
15 #include <linux/clk.h>
16 #include <linux/kernel.h>
17 #include <linux/gfp.h>
18 #include <linux/module.h>
20 #include <linux/init.h>
21 #include <linux/interrupt.h>
22 #include <linux/device.h>
23 #include <linux/platform_device.h>
24 #include <linux/libata.h>
25 #include <linux/ahci_platform.h>
28 static void ahci_host_stop(struct ata_host *host);
31 AHCI, /* standard platform ahci */
32 IMX53_AHCI, /* ahci on i.mx53 */
33 STRICT_AHCI, /* delayed DMA engine start */
36 static struct platform_device_id ahci_devtype[] = {
42 .driver_data = IMX53_AHCI,
44 .name = "strict-ahci",
45 .driver_data = STRICT_AHCI,
50 MODULE_DEVICE_TABLE(platform, ahci_devtype);
52 static struct ata_port_operations ahci_platform_ops = {
53 .inherits = &ahci_ops,
54 .host_stop = ahci_host_stop,
57 static struct ata_port_operations ahci_platform_retry_srst_ops = {
58 .inherits = &ahci_pmp_retry_srst_ops,
59 .host_stop = ahci_host_stop,
62 static const struct ata_port_info ahci_port_info[] = {
65 .flags = AHCI_FLAG_COMMON,
67 .udma_mask = ATA_UDMA6,
68 .port_ops = &ahci_platform_ops,
71 .flags = AHCI_FLAG_COMMON,
73 .udma_mask = ATA_UDMA6,
74 .port_ops = &ahci_platform_retry_srst_ops,
77 AHCI_HFLAGS (AHCI_HFLAG_DELAY_ENGINE),
78 .flags = AHCI_FLAG_COMMON,
80 .udma_mask = ATA_UDMA6,
81 .port_ops = &ahci_platform_ops,
85 static struct scsi_host_template ahci_platform_sht = {
86 AHCI_SHT("ahci_platform"),
89 static int ahci_probe(struct platform_device *pdev)
91 struct device *dev = &pdev->dev;
92 struct ahci_platform_data *pdata = dev_get_platdata(dev);
93 const struct platform_device_id *id = platform_get_device_id(pdev);
94 struct ata_port_info pi = ahci_port_info[id ? id->driver_data : 0];
95 const struct ata_port_info *ppi[] = { &pi, NULL };
96 struct ahci_host_priv *hpriv;
97 struct ata_host *host;
104 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
106 dev_err(dev, "no mmio space\n");
110 irq = platform_get_irq(pdev, 0);
112 dev_err(dev, "no irq\n");
116 if (pdata && pdata->ata_port_info)
117 pi = *pdata->ata_port_info;
119 hpriv = devm_kzalloc(dev, sizeof(*hpriv), GFP_KERNEL);
121 dev_err(dev, "can't alloc ahci_host_priv\n");
125 hpriv->flags |= (unsigned long)pi.private_data;
127 hpriv->mmio = devm_ioremap(dev, mem->start, resource_size(mem));
129 dev_err(dev, "can't map %pR\n", mem);
133 hpriv->clk = clk_get(dev, NULL);
134 if (IS_ERR(hpriv->clk)) {
135 dev_err(dev, "can't get clock\n");
137 rc = clk_prepare_enable(hpriv->clk);
139 dev_err(dev, "clock prepare enable failed");
145 * Some platforms might need to prepare for mmio region access,
146 * which could be done in the following init call. So, the mmio
147 * region shouldn't be accessed before init (if provided) has
148 * returned successfully.
150 if (pdata && pdata->init) {
151 rc = pdata->init(dev, hpriv->mmio);
153 goto disable_unprepare_clk;
156 ahci_save_initial_config(dev, hpriv,
157 pdata ? pdata->force_port_map : 0,
158 pdata ? pdata->mask_port_map : 0);
161 if (hpriv->cap & HOST_CAP_NCQ)
162 pi.flags |= ATA_FLAG_NCQ;
164 if (hpriv->cap & HOST_CAP_PMP)
165 pi.flags |= ATA_FLAG_PMP;
167 ahci_set_em_messages(hpriv, &pi);
169 /* CAP.NP sometimes indicate the index of the last enabled
170 * port, at other times, that of the last possible port, so
171 * determining the maximum port number requires looking at
172 * both CAP.NP and port_map.
174 n_ports = max(ahci_nr_ports(hpriv->cap), fls(hpriv->port_map));
176 host = ata_host_alloc_pinfo(dev, ppi, n_ports);
182 host->private_data = hpriv;
184 if (!(hpriv->cap & HOST_CAP_SSS) || ahci_ignore_sss)
185 host->flags |= ATA_HOST_PARALLEL_SCAN;
187 printk(KERN_INFO "ahci: SSS flag set, parallel bus scan disabled\n");
189 if (pi.flags & ATA_FLAG_EM)
192 for (i = 0; i < host->n_ports; i++) {
193 struct ata_port *ap = host->ports[i];
195 ata_port_desc(ap, "mmio %pR", mem);
196 ata_port_desc(ap, "port 0x%x", 0x100 + ap->port_no * 0x80);
198 /* set enclosure management message type */
199 if (ap->flags & ATA_FLAG_EM)
200 ap->em_message_type = hpriv->em_msg_type;
202 /* disabled/not-implemented port */
203 if (!(hpriv->port_map & (1 << i)))
204 ap->ops = &ata_dummy_port_ops;
207 rc = ahci_reset_controller(host);
211 ahci_init_controller(host);
212 ahci_print_info(host, "platform");
214 rc = ata_host_activate(host, irq, ahci_interrupt, IRQF_SHARED,
221 if (pdata && pdata->exit)
223 disable_unprepare_clk:
224 if (!IS_ERR(hpriv->clk))
225 clk_disable_unprepare(hpriv->clk);
227 if (!IS_ERR(hpriv->clk))
232 static void ahci_host_stop(struct ata_host *host)
234 struct device *dev = host->dev;
235 struct ahci_platform_data *pdata = dev_get_platdata(dev);
236 struct ahci_host_priv *hpriv = host->private_data;
238 if (pdata && pdata->exit)
241 if (!IS_ERR(hpriv->clk)) {
242 clk_disable_unprepare(hpriv->clk);
247 #ifdef CONFIG_PM_SLEEP
248 static int ahci_suspend(struct device *dev)
250 struct ahci_platform_data *pdata = dev_get_platdata(dev);
251 struct ata_host *host = dev_get_drvdata(dev);
252 struct ahci_host_priv *hpriv = host->private_data;
253 void __iomem *mmio = hpriv->mmio;
257 if (hpriv->flags & AHCI_HFLAG_NO_SUSPEND) {
258 dev_err(dev, "firmware update required for suspend/resume\n");
263 * AHCI spec rev1.1 section 8.3.3:
264 * Software must disable interrupts prior to requesting a
265 * transition of the HBA to D3 state.
267 ctl = readl(mmio + HOST_CTL);
269 writel(ctl, mmio + HOST_CTL);
270 readl(mmio + HOST_CTL); /* flush */
272 rc = ata_host_suspend(host, PMSG_SUSPEND);
276 if (pdata && pdata->suspend)
277 return pdata->suspend(dev);
279 if (!IS_ERR(hpriv->clk))
280 clk_disable_unprepare(hpriv->clk);
285 static int ahci_resume(struct device *dev)
287 struct ahci_platform_data *pdata = dev_get_platdata(dev);
288 struct ata_host *host = dev_get_drvdata(dev);
289 struct ahci_host_priv *hpriv = host->private_data;
292 if (!IS_ERR(hpriv->clk)) {
293 rc = clk_prepare_enable(hpriv->clk);
295 dev_err(dev, "clock prepare enable failed");
300 if (pdata && pdata->resume) {
301 rc = pdata->resume(dev);
303 goto disable_unprepare_clk;
306 if (dev->power.power_state.event == PM_EVENT_SUSPEND) {
307 rc = ahci_reset_controller(host);
309 goto disable_unprepare_clk;
311 ahci_init_controller(host);
314 ata_host_resume(host);
318 disable_unprepare_clk:
319 if (!IS_ERR(hpriv->clk))
320 clk_disable_unprepare(hpriv->clk);
326 static SIMPLE_DEV_PM_OPS(ahci_pm_ops, ahci_suspend, ahci_resume);
328 static const struct of_device_id ahci_of_match[] = {
329 { .compatible = "snps,spear-ahci", },
330 { .compatible = "snps,exynos5440-ahci", },
333 MODULE_DEVICE_TABLE(of, ahci_of_match);
335 static struct platform_driver ahci_driver = {
337 .remove = ata_platform_remove_one,
340 .owner = THIS_MODULE,
341 .of_match_table = ahci_of_match,
344 .id_table = ahci_devtype,
346 module_platform_driver(ahci_driver);
348 MODULE_DESCRIPTION("AHCI SATA platform driver");
349 MODULE_AUTHOR("Anton Vorontsov <avorontsov@ru.mvista.com>");
350 MODULE_LICENSE("GPL");
351 MODULE_ALIAS("platform:ahci");