2 * Copyright (C) Freescale Semiconductor, Inc. 2006. All rights reserved.
3 * Author: Jason Jin<Jason.jin@freescale.com>
4 * Zhang Wei<wei.zhang@freescale.com>
6 * See file CREDITS for list of people who contributed to this
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 * with the reference on libata and ahci drvier in kernel
29 #ifdef CONFIG_SCSI_AHCI
33 #include <asm/processor.h>
34 #include <asm/errno.h>
39 #include <linux/ctype.h>
42 struct ahci_probe_ent *probe_ent = NULL;
43 hd_driveid_t *ataid[AHCI_MAX_PORTS];
45 #define writel_with_flush(a,b) do{writel(a,b);readl(b);}while(0)
47 static inline u32 ahci_port_base(u32 base, u32 port)
49 return base + 0x100 + (port * 0x80);
53 static void ahci_setup_port(struct ahci_ioports *port, unsigned long base,
54 unsigned int port_idx)
56 base = ahci_port_base(base, port_idx);
58 port->cmd_addr = base;
59 port->scr_addr = base + PORT_SCR;
63 #define msleep(a) udelay(a * 1000)
64 #define ssleep(a) msleep(a * 1000)
65 static int waiting_for_cmd_completed(volatile u8 *offset, int timeout_msec, u32 sign)
69 for(i = 0; ((status = readl(offset)) & sign) && i < timeout_msec; i++)
72 return (i < timeout_msec)? 0 : -1;
76 static int ahci_host_init(struct ahci_probe_ent *probe_ent)
78 pci_dev_t pdev = probe_ent->dev;
79 volatile u8 *mmio = (volatile u8 *)probe_ent->mmio_base;
83 volatile u8* port_mmio;
84 unsigned short vendor;
86 cap_save = readl(mmio + HOST_CAP);
87 cap_save &= ( (1<<28) | (1<<17) );
88 cap_save |= (1 << 27);
90 /* global controller reset */
91 tmp = readl(mmio + HOST_CTL);
92 if ((tmp & HOST_RESET) == 0)
93 writel_with_flush(tmp | HOST_RESET, mmio + HOST_CTL);
95 /* reset must complete within 1 second, or
96 * the hardware should be considered fried.
100 tmp = readl(mmio + HOST_CTL);
101 if (tmp & HOST_RESET) {
102 debug("controller reset failed (0x%x)\n", tmp);
106 writel_with_flush(HOST_AHCI_EN, mmio + HOST_CTL);
107 writel(cap_save, mmio + HOST_CAP);
108 writel_with_flush(0xf, mmio + HOST_PORTS_IMPL);
110 pci_read_config_word(pdev, PCI_VENDOR_ID, &vendor);
112 if (vendor == PCI_VENDOR_ID_INTEL) {
114 pci_read_config_word(pdev, 0x92, &tmp16);
116 pci_write_config_word(pdev, 0x92, tmp16);
119 probe_ent->cap = readl(mmio + HOST_CAP);
120 probe_ent->port_map = readl(mmio + HOST_PORTS_IMPL);
121 probe_ent->n_ports = (probe_ent->cap & 0x1f) + 1;
123 debug("cap 0x%x port_map 0x%x n_ports %d\n",
124 probe_ent->cap, probe_ent->port_map, probe_ent->n_ports);
126 for (i = 0; i < probe_ent->n_ports; i++) {
127 probe_ent->port[i].port_mmio = ahci_port_base((u32)mmio, i);
128 port_mmio = (u8 *)probe_ent->port[i].port_mmio;
129 ahci_setup_port(&probe_ent->port[i],
130 (unsigned long) mmio, i);
132 /* make sure port is not active */
133 tmp = readl(port_mmio + PORT_CMD);
134 if (tmp & (PORT_CMD_LIST_ON | PORT_CMD_FIS_ON |
135 PORT_CMD_FIS_RX | PORT_CMD_START)) {
136 tmp &= ~(PORT_CMD_LIST_ON | PORT_CMD_FIS_ON |
137 PORT_CMD_FIS_RX | PORT_CMD_START);
138 writel_with_flush(tmp, port_mmio + PORT_CMD);
140 /* spec says 500 msecs for each bit, so
141 * this is slightly incorrect.
146 writel(PORT_CMD_SPIN_UP, port_mmio + PORT_CMD);
151 tmp = readl(port_mmio + PORT_SCR_STAT);
152 if ((tmp & 0xf) == 0x3)
157 tmp = readl(port_mmio + PORT_SCR_ERR);
158 debug("PORT_SCR_ERR 0x%x\n", tmp);
159 writel(tmp, port_mmio + PORT_SCR_ERR);
161 /* ack any pending irq events for this port */
162 tmp = readl(port_mmio + PORT_IRQ_STAT);
163 debug("PORT_IRQ_STAT 0x%x\n", tmp);
165 writel(tmp, port_mmio + PORT_IRQ_STAT);
167 writel(1 << i, mmio + HOST_IRQ_STAT);
169 /* set irq mask (enables interrupts) */
170 writel(DEF_PORT_IRQ, port_mmio + PORT_IRQ_MASK);
172 /*register linkup ports*/
173 tmp = readl(port_mmio + PORT_SCR_STAT);
174 debug("Port %d status: 0x%x\n",i,tmp);
175 if((tmp & 0xf) == 0x03)
176 probe_ent->link_port_map |= (0x01<< i);
179 tmp = readl(mmio + HOST_CTL);
180 debug("HOST_CTL 0x%x\n", tmp);
181 writel(tmp | HOST_IRQ_EN, mmio + HOST_CTL);
182 tmp = readl(mmio + HOST_CTL);
183 debug("HOST_CTL 0x%x\n", tmp);
185 pci_read_config_word(pdev, PCI_COMMAND, &tmp16);
186 tmp |= PCI_COMMAND_MASTER;
187 pci_write_config_word(pdev, PCI_COMMAND, tmp16);
193 static void ahci_print_info(struct ahci_probe_ent *probe_ent)
195 pci_dev_t pdev = probe_ent->dev;
196 volatile u8* mmio = (volatile u8 *)probe_ent->mmio_base;
197 u32 vers, cap, impl, speed;
202 vers = readl(mmio + HOST_VERSION);
203 cap = probe_ent->cap;
204 impl = probe_ent->port_map;
206 speed = (cap >> 20) & 0xf;
214 pci_read_config_word(pdev, 0x0a, &cc);
217 else if (cc == 0x0106)
219 else if (cc == 0x0104)
224 printf( "AHCI %02x%02x.%02x%02x "
225 "%u slots %u ports %s Gbps 0x%x impl %s mode\n"
233 ((cap >> 8) & 0x1f) + 1,
244 cap & (1 << 31) ? "64bit " : "",
245 cap & (1 << 30) ? "ncq " : "",
246 cap & (1 << 28) ? "ilck " : "",
247 cap & (1 << 27) ? "stag " : "",
248 cap & (1 << 26) ? "pm " : "",
249 cap & (1 << 25) ? "led " : "",
251 cap & (1 << 24) ? "clo " : "",
252 cap & (1 << 19) ? "nz " : "",
253 cap & (1 << 18) ? "only " : "",
254 cap & (1 << 17) ? "pmp " : "",
255 cap & (1 << 15) ? "pio " : "",
256 cap & (1 << 14) ? "slum " : "",
257 cap & (1 << 13) ? "part " : ""
262 static int ahci_init_one (pci_dev_t pdev)
267 memset((void *)ataid, 0, sizeof(hd_driveid_t *) * AHCI_MAX_PORTS);
269 probe_ent = malloc(sizeof(probe_ent));
270 memset(probe_ent, 0, sizeof(probe_ent));
271 probe_ent->dev = pdev;
273 pci_read_config_dword(pdev, AHCI_PCI_BAR, &iobase);
276 probe_ent->host_flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY
277 | ATA_FLAG_MMIO | ATA_FLAG_PIO_DMA
279 probe_ent->pio_mask = 0x1f;
280 probe_ent->udma_mask = 0x7f; /*Fixme,assume to support UDMA6*/
282 probe_ent->mmio_base = iobase;
285 * JMicron-specific fixup:
286 * make sure we're in AHCI mode
288 pci_read_config_word(pdev, PCI_VENDOR_ID, &vendor);
290 pci_write_config_byte(pdev, 0x41, 0xa1);
292 /* initialize adapter */
293 rc = ahci_host_init(probe_ent);
297 ahci_print_info(probe_ent);
306 #define MAX_DATA_BYTE_COUNT (4*1024*1024)
307 static int ahci_fill_sg(u8 port, unsigned char *buf, int buf_len)
310 struct ahci_ioports *pp = &(probe_ent->port[port]);
311 struct ahci_sg *ahci_sg = pp->cmd_tbl_sg;
315 sg_count = ((buf_len - 1) / MAX_DATA_BYTE_COUNT) + 1;
316 if(sg_count > AHCI_MAX_SG){
317 printf("Error:Too much sg!\n");
321 for(i = 0;i < sg_count; i++)
323 ahci_sg->addr = cpu_to_le32((u32)buf + i * MAX_DATA_BYTE_COUNT);
324 ahci_sg->addr_hi = 0;
325 ahci_sg->flags_size = cpu_to_le32( 0x3fffff &
326 (buf_len < MAX_DATA_BYTE_COUNT
328 : (MAX_DATA_BYTE_COUNT - 1)));
330 buf_len -= MAX_DATA_BYTE_COUNT;
337 static void ahci_fill_cmd_slot(struct ahci_ioports *pp, u32 opts)
339 pp->cmd_slot->opts = cpu_to_le32(opts);
340 pp->cmd_slot->status = 0;
341 pp->cmd_slot->tbl_addr = cpu_to_le32(pp->cmd_tbl & 0xffffffff);
342 pp->cmd_slot->tbl_addr_hi = 0;
346 static void ahci_set_feature(u8 port)
349 struct ahci_ioports *pp = &(probe_ent->port[port]);
350 volatile u8* port_mmio = (volatile u8 *)pp->port_mmio;
351 u32 cmd_fis_len = 5; /* five dwords */
358 fis[2] = ATA_CMD_SETF;
359 fis[3] = SETFEATURES_XFER;
360 fis[12] = __ilog2(probe_ent->udma_mask + 1) + 0x40 - 0x01;
362 memcpy((unsigned char *)pp->cmd_tbl,fis,20);
363 ahci_fill_cmd_slot(pp, cmd_fis_len);
364 writel(1, port_mmio + PORT_CMD_ISSUE);
365 readl(port_mmio + PORT_CMD_ISSUE);
367 if(waiting_for_cmd_completed(port_mmio + PORT_CMD_ISSUE, 150, 0x1)) {
368 printf("set feature error!\n");
373 static int ahci_port_start(u8 port)
376 struct ahci_ioports *pp = &(probe_ent->port[port]);
377 volatile u8* port_mmio = (volatile u8 *)pp->port_mmio;
381 debug("Enter start port: %d\n",port);
382 port_status = readl(port_mmio + PORT_SCR_STAT);
383 debug("Port %d status: %x\n",port,port_status);
384 if((port_status & 0xf) != 0x03){
385 printf("No Link on this port!\n");
389 mem = (u32)malloc(AHCI_PORT_PRIV_DMA_SZ + 2048);
392 printf("No mem for table!\n");
396 mem = (mem + 0x800) & (~0x7ff); /* Aligned to 2048-bytes */
398 memset((u8 *)mem, 0, AHCI_PORT_PRIV_DMA_SZ);
400 * First item in chunk of DMA memory: 32-slot command table,
401 * 32 bytes each in size
403 pp->cmd_slot = (struct ahci_cmd_hdr *)mem;
404 debug("cmd_slot = 0x%x\n",pp->cmd_slot);
406 mem += (AHCI_CMD_SLOT_SZ + 224);
408 * Second item: Received-FIS area
412 mem += AHCI_RX_FIS_SZ;
414 * Third item: data area for storing a single command
415 * and its scatter-gather table
418 debug("cmd_tbl_dma = 0x%x\n",pp->cmd_tbl);
420 mem += AHCI_CMD_TBL_HDR;
421 pp->cmd_tbl_sg = (struct ahci_sg *)mem;
423 writel_with_flush((u32)pp->cmd_slot, port_mmio + PORT_LST_ADDR);
425 writel_with_flush(pp->rx_fis, port_mmio + PORT_FIS_ADDR);
427 writel_with_flush(PORT_CMD_ICC_ACTIVE | PORT_CMD_FIS_RX |
428 PORT_CMD_POWER_ON | PORT_CMD_SPIN_UP |
429 PORT_CMD_START, port_mmio + PORT_CMD);
431 debug("Exit start port %d\n",port);
437 static int get_ahci_device_data(u8 port, u8 *fis, int fis_len, u8 *buf, int buf_len)
440 struct ahci_ioports *pp = &(probe_ent->port[port]);
441 volatile u8* port_mmio = (volatile u8 *)pp->port_mmio;
446 debug("Enter get_ahci_device_data: for port %d\n",port);
448 if(port > probe_ent->n_ports){
449 printf("Invaild port number %d\n", port);
453 port_status = readl(port_mmio + PORT_SCR_STAT);
454 if((port_status & 0xf) != 0x03){
455 debug("No Link on port %d!\n",port);
459 memcpy((unsigned char *)pp->cmd_tbl, fis, fis_len);
461 sg_count = ahci_fill_sg(port,buf,buf_len);
462 opts = (fis_len >> 2) | (sg_count << 16) ;
463 ahci_fill_cmd_slot(pp, opts);
465 writel_with_flush(1, port_mmio + PORT_CMD_ISSUE);
467 if (waiting_for_cmd_completed(port_mmio + PORT_CMD_ISSUE, 150, 0x1)) {
468 printf("timeout exit!\n");
471 debug("get_ahci_device_data: %d byte transferred.\n",
472 pp->cmd_slot->status);
478 static char *ata_id_strcpy(u16 *target, u16 *src, int len)
481 for(i = 0; i < len / 2; i++)
482 target[i] = le16_to_cpu(src[i]);
483 return (char *)target;
487 static void dump_ataid(hd_driveid_t *ataid)
489 debug("(49)ataid->capability = 0x%x\n", ataid->capability);
490 debug("(53)ataid->field_valid =0x%x\n", ataid->field_valid);
491 debug("(63)ataid->dma_mword = 0x%x\n", ataid->dma_mword);
492 debug("(64)ataid->eide_pio_modes = 0x%x\n", ataid->eide_pio_modes);
493 debug("(75)ataid->queue_depth = 0x%x\n", ataid->queue_depth);
494 debug("(80)ataid->major_rev_num = 0x%x\n", ataid->major_rev_num);
495 debug("(81)ataid->minor_rev_num = 0x%x\n", ataid->minor_rev_num);
496 debug("(82)ataid->command_set_1 = 0x%x\n", ataid->command_set_1);
497 debug("(83)ataid->command_set_2 = 0x%x\n", ataid->command_set_2);
498 debug("(84)ataid->cfsse = 0x%x\n", ataid->cfsse);
499 debug("(85)ataid->cfs_enable_1 = 0x%x\n", ataid->cfs_enable_1);
500 debug("(86)ataid->cfs_enable_2 = 0x%x\n", ataid->cfs_enable_2);
501 debug("(87)ataid->csf_default = 0x%x\n", ataid->csf_default);
502 debug("(88)ataid->dma_ultra = 0x%x\n", ataid->dma_ultra);
503 debug("(93)ataid->hw_config = 0x%x\n", ataid->hw_config);
507 * SCSI INQUIRY command operation.
509 static int ata_scsiop_inquiry(ccb *pccb)
514 0x5, /* claim SPC-3 version compatibility */
522 /* Clean ccb data buffer */
523 memset(pccb->pdata, 0, pccb->datalen);
525 memcpy(pccb->pdata, hdr, sizeof(hdr));
527 if(pccb->datalen <= 35)
531 /* Construct the FIS */
532 fis[0] = 0x27; /* Host to device FIS. */
533 fis[1] = 1 << 7; /* Command FIS. */
534 fis[2] = ATA_CMD_IDENT; /* Command byte. */
536 /* Read id from sata */
538 if(!(tmpid = malloc(sizeof(hd_driveid_t))))
541 if(get_ahci_device_data(port, (u8 *)&fis, 20,
542 tmpid, sizeof(hd_driveid_t))){
543 debug("scsi_ahci: SCSI inquiry command failure.\n");
549 ataid[port] = (hd_driveid_t *)tmpid;
551 memcpy(&pccb->pdata[8], "ATA ", 8);
552 ata_id_strcpy((u16 *)&pccb->pdata[16], (u16 *)ataid[port]->model, 16);
553 ata_id_strcpy((u16 *)&pccb->pdata[32], (u16 *)ataid[port]->fw_rev, 4);
555 dump_ataid(ataid[port]);
561 * SCSI READ10 command operation.
563 static int ata_scsiop_read10(ccb *pccb)
569 lba = (((u64)pccb->cmd[2]) << 24) | (((u64)pccb->cmd[3]) << 16)
570 | (((u64)pccb->cmd[4]) << 8) | ((u64)pccb->cmd[5]);
571 len = (((u32)pccb->cmd[7]) << 8) | ((u32)pccb->cmd[8]);
573 /* For 10-byte and 16-byte SCSI R/W commands, transfer
574 * length 0 means transfer 0 block of data.
575 * However, for ATA R/W commands, sector count 0 means
576 * 256 or 65536 sectors, not 0 sectors as in SCSI.
578 * WARNING: one or two older ATA drives treat 0 as 0...
583 /* Construct the FIS */
584 fis[0] = 0x27; /* Host to device FIS. */
585 fis[1] = 1 << 7; /* Command FIS. */
586 fis[2] = ATA_CMD_RD_DMA; /* Command byte. */
588 /* LBA address, only support LBA28 in this driver*/
589 fis[4] = pccb->cmd[5];
590 fis[5] = pccb->cmd[4];
591 fis[6] = pccb->cmd[3];
592 fis[7] = (pccb->cmd[2] & 0x0f) | 0xe0;
595 fis[12] = pccb->cmd[8];
596 fis[13] = pccb->cmd[7];
599 if(get_ahci_device_data(pccb->target, (u8*)&fis, 20,
600 pccb->pdata, pccb->datalen)){
601 debug("scsi_ahci: SCSI READ10 command failure.\n");
610 * SCSI READ CAPACITY10 command operation.
612 static int ata_scsiop_read_capacity10(ccb *pccb)
616 if(!ataid[pccb->target]) {
617 printf("scsi_ahci: SCSI READ CAPACITY10 command failure. "
619 "\tPlease run SCSI commmand INQUIRY firstly!\n");
625 *(u32 *)buf = le32_to_cpu(ataid[pccb->target]->lba_capacity);
630 memcpy(pccb->pdata, buf, 8);
637 * SCSI TEST UNIT READY command operation.
639 static int ata_scsiop_test_unit_ready(ccb *pccb)
641 return (ataid[pccb->target]) ? 0 : -EPERM;
644 int scsi_exec(ccb *pccb)
648 switch(pccb->cmd[0]) {
650 ret = ata_scsiop_read10(pccb);
653 ret = ata_scsiop_read_capacity10(pccb);
656 ret = ata_scsiop_test_unit_ready(pccb);
659 ret = ata_scsiop_inquiry(pccb);
662 printf("Unsupport SCSI command 0x%02x\n", pccb->cmd[0]);
667 debug("SCSI command 0x%02x ret errno %d\n", pccb->cmd[0],ret);
675 void scsi_low_level_init(int busdevfunc)
680 ahci_init_one(busdevfunc);
682 linkmap = probe_ent->link_port_map;
684 for(i = 0; i < CFG_SCSI_MAX_SCSI_ID; i++){
685 if( ((linkmap >> i) & 0x01) ){
686 if(ahci_port_start((u8)i)){
687 printf("Can not start port %d\n",i);
690 ahci_set_feature((u8)i);
696 void scsi_bus_reset(void)
702 void scsi_print_error(ccb *pccb)
704 /*The ahci error info can be read in the ahci driver*/