adc: meson-saradc: skip hardware init only if ADC is enabled
[platform/kernel/u-boot.git] / drivers / adc / rockchip-saradc.c
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * (C) Copyright 2017, Fuzhou Rockchip Electronics Co., Ltd
4  *
5  * Rockchip SARADC driver for U-Boot
6  */
7
8 #include <common.h>
9 #include <adc.h>
10 #include <clk.h>
11 #include <dm.h>
12 #include <errno.h>
13 #include <asm/io.h>
14 #include <linux/bitops.h>
15 #include <linux/err.h>
16
17 #define SARADC_CTRL_CHN_MASK            GENMASK(2, 0)
18 #define SARADC_CTRL_POWER_CTRL          BIT(3)
19 #define SARADC_CTRL_IRQ_ENABLE          BIT(5)
20 #define SARADC_CTRL_IRQ_STATUS          BIT(6)
21
22 #define SARADC_TIMEOUT                  (100 * 1000)
23
24 struct rockchip_saradc_regs {
25         unsigned int data;
26         unsigned int stas;
27         unsigned int ctrl;
28         unsigned int dly_pu_soc;
29 };
30
31 struct rockchip_saradc_data {
32         int                             num_bits;
33         int                             num_channels;
34         unsigned long                   clk_rate;
35 };
36
37 struct rockchip_saradc_priv {
38         struct rockchip_saradc_regs             *regs;
39         int                                     active_channel;
40         const struct rockchip_saradc_data       *data;
41 };
42
43 int rockchip_saradc_channel_data(struct udevice *dev, int channel,
44                                  unsigned int *data)
45 {
46         struct rockchip_saradc_priv *priv = dev_get_priv(dev);
47         struct adc_uclass_platdata *uc_pdata = dev_get_uclass_platdata(dev);
48
49         if (channel != priv->active_channel) {
50                 pr_err("Requested channel is not active!");
51                 return -EINVAL;
52         }
53
54         if ((readl(&priv->regs->ctrl) & SARADC_CTRL_IRQ_STATUS) !=
55             SARADC_CTRL_IRQ_STATUS)
56                 return -EBUSY;
57
58         /* Read value */
59         *data = readl(&priv->regs->data);
60         *data &= uc_pdata->data_mask;
61
62         /* Power down adc */
63         writel(0, &priv->regs->ctrl);
64
65         return 0;
66 }
67
68 int rockchip_saradc_start_channel(struct udevice *dev, int channel)
69 {
70         struct rockchip_saradc_priv *priv = dev_get_priv(dev);
71
72         if (channel < 0 || channel >= priv->data->num_channels) {
73                 pr_err("Requested channel is invalid!");
74                 return -EINVAL;
75         }
76
77         /* 8 clock periods as delay between power up and start cmd */
78         writel(8, &priv->regs->dly_pu_soc);
79
80         /* Select the channel to be used and trigger conversion */
81         writel(SARADC_CTRL_POWER_CTRL | (channel & SARADC_CTRL_CHN_MASK) |
82                SARADC_CTRL_IRQ_ENABLE, &priv->regs->ctrl);
83
84         priv->active_channel = channel;
85
86         return 0;
87 }
88
89 int rockchip_saradc_stop(struct udevice *dev)
90 {
91         struct rockchip_saradc_priv *priv = dev_get_priv(dev);
92
93         /* Power down adc */
94         writel(0, &priv->regs->ctrl);
95
96         priv->active_channel = -1;
97
98         return 0;
99 }
100
101 int rockchip_saradc_probe(struct udevice *dev)
102 {
103         struct rockchip_saradc_priv *priv = dev_get_priv(dev);
104         struct clk clk;
105         int ret;
106
107         ret = clk_get_by_index(dev, 0, &clk);
108         if (ret)
109                 return ret;
110
111         ret = clk_set_rate(&clk, priv->data->clk_rate);
112         if (IS_ERR_VALUE(ret))
113                 return ret;
114
115         priv->active_channel = -1;
116
117         return 0;
118 }
119
120 int rockchip_saradc_ofdata_to_platdata(struct udevice *dev)
121 {
122         struct adc_uclass_platdata *uc_pdata = dev_get_uclass_platdata(dev);
123         struct rockchip_saradc_priv *priv = dev_get_priv(dev);
124         struct rockchip_saradc_data *data;
125
126         data = (struct rockchip_saradc_data *)dev_get_driver_data(dev);
127         priv->regs = (struct rockchip_saradc_regs *)dev_read_addr(dev);
128         if (priv->regs == (struct rockchip_saradc_regs *)FDT_ADDR_T_NONE) {
129                 pr_err("Dev: %s - can't get address!", dev->name);
130                 return -ENODATA;
131         }
132
133         priv->data = data;
134         uc_pdata->data_mask = (1 << priv->data->num_bits) - 1;;
135         uc_pdata->data_format = ADC_DATA_FORMAT_BIN;
136         uc_pdata->data_timeout_us = SARADC_TIMEOUT / 5;
137         uc_pdata->channel_mask = (1 << priv->data->num_channels) - 1;
138
139         return 0;
140 }
141
142 static const struct adc_ops rockchip_saradc_ops = {
143         .start_channel = rockchip_saradc_start_channel,
144         .channel_data = rockchip_saradc_channel_data,
145         .stop = rockchip_saradc_stop,
146 };
147
148 static const struct rockchip_saradc_data saradc_data = {
149         .num_bits = 10,
150         .num_channels = 3,
151         .clk_rate = 1000000,
152 };
153
154 static const struct rockchip_saradc_data rk3066_tsadc_data = {
155         .num_bits = 12,
156         .num_channels = 2,
157         .clk_rate = 50000,
158 };
159
160 static const struct rockchip_saradc_data rk3399_saradc_data = {
161         .num_bits = 10,
162         .num_channels = 6,
163         .clk_rate = 1000000,
164 };
165
166 static const struct udevice_id rockchip_saradc_ids[] = {
167         { .compatible = "rockchip,saradc",
168           .data = (ulong)&saradc_data },
169         { .compatible = "rockchip,rk3066-tsadc",
170           .data = (ulong)&rk3066_tsadc_data },
171         { .compatible = "rockchip,rk3399-saradc",
172           .data = (ulong)&rk3399_saradc_data },
173         { }
174 };
175
176 U_BOOT_DRIVER(rockchip_saradc) = {
177         .name           = "rockchip_saradc",
178         .id             = UCLASS_ADC,
179         .of_match       = rockchip_saradc_ids,
180         .ops            = &rockchip_saradc_ops,
181         .probe          = rockchip_saradc_probe,
182         .ofdata_to_platdata = rockchip_saradc_ofdata_to_platdata,
183         .priv_auto_alloc_size = sizeof(struct rockchip_saradc_priv),
184 };