2 * processor_idle - idle state submodule to the ACPI processor driver
4 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
5 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
6 * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de>
7 * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
8 * - Added processor hotplug support
9 * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
10 * - Added support for C3 on SMP
12 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or (at
17 * your option) any later version.
19 * This program is distributed in the hope that it will be useful, but
20 * WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
22 * General Public License for more details.
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
28 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
31 #include <linux/module.h>
32 #include <linux/acpi.h>
33 #include <linux/dmi.h>
34 #include <linux/sched.h> /* need_resched() */
35 #include <linux/clockchips.h>
36 #include <linux/cpuidle.h>
37 #include <linux/syscore_ops.h>
40 * Include the apic definitions for x86 to have the APIC timer related defines
41 * available also for UP (on SMP it gets magically included via linux/smp.h).
42 * asm/acpi.h is not an option, as it would require more include magic. Also
43 * creating an empty asm-ia64/apic.h would just trade pest vs. cholera.
49 #include <acpi/acpi_bus.h>
50 #include <acpi/processor.h>
52 #define PREFIX "ACPI: "
54 #define ACPI_PROCESSOR_CLASS "processor"
55 #define _COMPONENT ACPI_PROCESSOR_COMPONENT
56 ACPI_MODULE_NAME("processor_idle");
58 static unsigned int max_cstate __read_mostly = ACPI_PROCESSOR_MAX_POWER;
59 module_param(max_cstate, uint, 0000);
60 static unsigned int nocst __read_mostly;
61 module_param(nocst, uint, 0000);
62 static int bm_check_disable __read_mostly;
63 module_param(bm_check_disable, uint, 0000);
65 static unsigned int latency_factor __read_mostly = 2;
66 module_param(latency_factor, uint, 0644);
68 static DEFINE_PER_CPU(struct cpuidle_device *, acpi_cpuidle_device);
70 static DEFINE_PER_CPU(struct acpi_processor_cx * [CPUIDLE_STATE_MAX],
73 static int disabled_by_idle_boot_param(void)
75 return boot_option_idle_override == IDLE_POLL ||
76 boot_option_idle_override == IDLE_HALT;
80 * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
81 * For now disable this. Probably a bug somewhere else.
83 * To skip this limit, boot/load with a large max_cstate limit.
85 static int set_max_cstate(const struct dmi_system_id *id)
87 if (max_cstate > ACPI_PROCESSOR_MAX_POWER)
90 printk(KERN_NOTICE PREFIX "%s detected - limiting to C%ld max_cstate."
91 " Override with \"processor.max_cstate=%d\"\n", id->ident,
92 (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1);
94 max_cstate = (long)id->driver_data;
99 static struct dmi_system_id processor_power_dmi_table[] = {
100 { set_max_cstate, "Clevo 5600D", {
101 DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
102 DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")},
104 { set_max_cstate, "Pavilion zv5000", {
105 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
106 DMI_MATCH(DMI_PRODUCT_NAME,"Pavilion zv5000 (DS502A#ABA)")},
108 { set_max_cstate, "Asus L8400B", {
109 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
110 DMI_MATCH(DMI_PRODUCT_NAME,"L8400B series Notebook PC")},
117 * Callers should disable interrupts before the call and enable
118 * interrupts after return.
120 static void acpi_safe_halt(void)
122 if (!tif_need_resched()) {
128 #ifdef ARCH_APICTIMER_STOPS_ON_C3
131 * Some BIOS implementations switch to C3 in the published C2 state.
132 * This seems to be a common problem on AMD boxen, but other vendors
133 * are affected too. We pick the most conservative approach: we assume
134 * that the local APIC stops in both C2 and C3.
136 static void lapic_timer_check_state(int state, struct acpi_processor *pr,
137 struct acpi_processor_cx *cx)
139 struct acpi_processor_power *pwr = &pr->power;
140 u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2;
142 if (cpu_has(&cpu_data(pr->id), X86_FEATURE_ARAT))
145 if (amd_e400_c1e_detected)
146 type = ACPI_STATE_C1;
149 * Check, if one of the previous states already marked the lapic
152 if (pwr->timer_broadcast_on_state < state)
155 if (cx->type >= type)
156 pr->power.timer_broadcast_on_state = state;
159 static void __lapic_timer_propagate_broadcast(void *arg)
161 struct acpi_processor *pr = (struct acpi_processor *) arg;
162 unsigned long reason;
164 reason = pr->power.timer_broadcast_on_state < INT_MAX ?
165 CLOCK_EVT_NOTIFY_BROADCAST_ON : CLOCK_EVT_NOTIFY_BROADCAST_OFF;
167 clockevents_notify(reason, &pr->id);
170 static void lapic_timer_propagate_broadcast(struct acpi_processor *pr)
172 smp_call_function_single(pr->id, __lapic_timer_propagate_broadcast,
176 /* Power(C) State timer broadcast control */
177 static void lapic_timer_state_broadcast(struct acpi_processor *pr,
178 struct acpi_processor_cx *cx,
181 int state = cx - pr->power.states;
183 if (state >= pr->power.timer_broadcast_on_state) {
184 unsigned long reason;
186 reason = broadcast ? CLOCK_EVT_NOTIFY_BROADCAST_ENTER :
187 CLOCK_EVT_NOTIFY_BROADCAST_EXIT;
188 clockevents_notify(reason, &pr->id);
194 static void lapic_timer_check_state(int state, struct acpi_processor *pr,
195 struct acpi_processor_cx *cstate) { }
196 static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) { }
197 static void lapic_timer_state_broadcast(struct acpi_processor *pr,
198 struct acpi_processor_cx *cx,
205 #ifdef CONFIG_PM_SLEEP
206 static u32 saved_bm_rld;
208 static int acpi_processor_suspend(void)
210 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &saved_bm_rld);
214 static void acpi_processor_resume(void)
218 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &resumed_bm_rld);
219 if (resumed_bm_rld == saved_bm_rld)
222 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, saved_bm_rld);
225 static struct syscore_ops acpi_processor_syscore_ops = {
226 .suspend = acpi_processor_suspend,
227 .resume = acpi_processor_resume,
230 void acpi_processor_syscore_init(void)
232 register_syscore_ops(&acpi_processor_syscore_ops);
235 void acpi_processor_syscore_exit(void)
237 unregister_syscore_ops(&acpi_processor_syscore_ops);
239 #endif /* CONFIG_PM_SLEEP */
241 #if defined(CONFIG_X86)
242 static void tsc_check_state(int state)
244 switch (boot_cpu_data.x86_vendor) {
246 case X86_VENDOR_INTEL:
248 * AMD Fam10h TSC will tick in all
249 * C/P/S0/S1 states when this bit is set.
251 if (boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
256 /* TSC could halt in idle, so notify users */
257 if (state > ACPI_STATE_C1)
258 mark_tsc_unstable("TSC halts in idle");
262 static void tsc_check_state(int state) { return; }
265 static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr)
271 /* if info is obtained from pblk/fadt, type equals state */
272 pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2;
273 pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3;
275 #ifndef CONFIG_HOTPLUG_CPU
277 * Check for P_LVL2_UP flag before entering C2 and above on
280 if ((num_online_cpus() > 1) &&
281 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
285 /* determine C2 and C3 address from pblk */
286 pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4;
287 pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5;
289 /* determine latencies from FADT */
290 pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.c2_latency;
291 pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.c3_latency;
294 * FADT specified C2 latency must be less than or equal to
297 if (acpi_gbl_FADT.c2_latency > ACPI_PROCESSOR_MAX_C2_LATENCY) {
298 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
299 "C2 latency too large [%d]\n", acpi_gbl_FADT.c2_latency));
301 pr->power.states[ACPI_STATE_C2].address = 0;
305 * FADT supplied C3 latency must be less than or equal to
308 if (acpi_gbl_FADT.c3_latency > ACPI_PROCESSOR_MAX_C3_LATENCY) {
309 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
310 "C3 latency too large [%d]\n", acpi_gbl_FADT.c3_latency));
312 pr->power.states[ACPI_STATE_C3].address = 0;
315 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
316 "lvl2[0x%08x] lvl3[0x%08x]\n",
317 pr->power.states[ACPI_STATE_C2].address,
318 pr->power.states[ACPI_STATE_C3].address));
323 static int acpi_processor_get_power_info_default(struct acpi_processor *pr)
325 if (!pr->power.states[ACPI_STATE_C1].valid) {
326 /* set the first C-State to C1 */
327 /* all processors need to support C1 */
328 pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1;
329 pr->power.states[ACPI_STATE_C1].valid = 1;
330 pr->power.states[ACPI_STATE_C1].entry_method = ACPI_CSTATE_HALT;
332 /* the C0 state only exists as a filler in our array */
333 pr->power.states[ACPI_STATE_C0].valid = 1;
337 static int acpi_processor_get_power_info_cst(struct acpi_processor *pr)
339 acpi_status status = 0;
343 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
344 union acpi_object *cst;
352 status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer);
353 if (ACPI_FAILURE(status)) {
354 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _CST, giving up\n"));
358 cst = buffer.pointer;
360 /* There must be at least 2 elements */
361 if (!cst || (cst->type != ACPI_TYPE_PACKAGE) || cst->package.count < 2) {
362 printk(KERN_ERR PREFIX "not enough elements in _CST\n");
367 count = cst->package.elements[0].integer.value;
369 /* Validate number of power states. */
370 if (count < 1 || count != cst->package.count - 1) {
371 printk(KERN_ERR PREFIX "count given by _CST is not valid\n");
376 /* Tell driver that at least _CST is supported. */
377 pr->flags.has_cst = 1;
379 for (i = 1; i <= count; i++) {
380 union acpi_object *element;
381 union acpi_object *obj;
382 struct acpi_power_register *reg;
383 struct acpi_processor_cx cx;
385 memset(&cx, 0, sizeof(cx));
387 element = &(cst->package.elements[i]);
388 if (element->type != ACPI_TYPE_PACKAGE)
391 if (element->package.count != 4)
394 obj = &(element->package.elements[0]);
396 if (obj->type != ACPI_TYPE_BUFFER)
399 reg = (struct acpi_power_register *)obj->buffer.pointer;
401 if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO &&
402 (reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE))
405 /* There should be an easy way to extract an integer... */
406 obj = &(element->package.elements[1]);
407 if (obj->type != ACPI_TYPE_INTEGER)
410 cx.type = obj->integer.value;
412 * Some buggy BIOSes won't list C1 in _CST -
413 * Let acpi_processor_get_power_info_default() handle them later
415 if (i == 1 && cx.type != ACPI_STATE_C1)
418 cx.address = reg->address;
419 cx.index = current_count + 1;
421 cx.entry_method = ACPI_CSTATE_SYSTEMIO;
422 if (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) {
423 if (acpi_processor_ffh_cstate_probe
424 (pr->id, &cx, reg) == 0) {
425 cx.entry_method = ACPI_CSTATE_FFH;
426 } else if (cx.type == ACPI_STATE_C1) {
428 * C1 is a special case where FIXED_HARDWARE
429 * can be handled in non-MWAIT way as well.
430 * In that case, save this _CST entry info.
431 * Otherwise, ignore this info and continue.
433 cx.entry_method = ACPI_CSTATE_HALT;
434 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT");
438 if (cx.type == ACPI_STATE_C1 &&
439 (boot_option_idle_override == IDLE_NOMWAIT)) {
441 * In most cases the C1 space_id obtained from
442 * _CST object is FIXED_HARDWARE access mode.
443 * But when the option of idle=halt is added,
444 * the entry_method type should be changed from
445 * CSTATE_FFH to CSTATE_HALT.
446 * When the option of idle=nomwait is added,
447 * the C1 entry_method type should be
450 cx.entry_method = ACPI_CSTATE_HALT;
451 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT");
454 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI IOPORT 0x%x",
458 if (cx.type == ACPI_STATE_C1) {
462 obj = &(element->package.elements[2]);
463 if (obj->type != ACPI_TYPE_INTEGER)
466 cx.latency = obj->integer.value;
468 obj = &(element->package.elements[3]);
469 if (obj->type != ACPI_TYPE_INTEGER)
473 memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx));
476 * We support total ACPI_PROCESSOR_MAX_POWER - 1
477 * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1)
479 if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) {
481 "Limiting number of power states to max (%d)\n",
482 ACPI_PROCESSOR_MAX_POWER);
484 "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
489 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d power states\n",
492 /* Validate number of power states discovered */
493 if (current_count < 2)
497 kfree(buffer.pointer);
502 static void acpi_processor_power_verify_c3(struct acpi_processor *pr,
503 struct acpi_processor_cx *cx)
505 static int bm_check_flag = -1;
506 static int bm_control_flag = -1;
513 * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
514 * DMA transfers are used by any ISA device to avoid livelock.
515 * Note that we could disable Type-F DMA (as recommended by
516 * the erratum), but this is known to disrupt certain ISA
517 * devices thus we take the conservative approach.
519 else if (errata.piix4.fdma) {
520 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
521 "C3 not supported on PIIX4 with Type-F DMA\n"));
525 /* All the logic here assumes flags.bm_check is same across all CPUs */
526 if (bm_check_flag == -1) {
527 /* Determine whether bm_check is needed based on CPU */
528 acpi_processor_power_init_bm_check(&(pr->flags), pr->id);
529 bm_check_flag = pr->flags.bm_check;
530 bm_control_flag = pr->flags.bm_control;
532 pr->flags.bm_check = bm_check_flag;
533 pr->flags.bm_control = bm_control_flag;
536 if (pr->flags.bm_check) {
537 if (!pr->flags.bm_control) {
538 if (pr->flags.has_cst != 1) {
539 /* bus mastering control is necessary */
540 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
541 "C3 support requires BM control\n"));
544 /* Here we enter C3 without bus mastering */
545 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
546 "C3 support without BM control\n"));
551 * WBINVD should be set in fadt, for C3 state to be
552 * supported on when bm_check is not required.
554 if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) {
555 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
556 "Cache invalidation should work properly"
557 " for C3 to be enabled on SMP systems\n"));
563 * Otherwise we've met all of our C3 requirements.
564 * Normalize the C3 latency to expidite policy. Enable
565 * checking of bus mastering status (bm_check) so we can
566 * use this in our C3 policy
571 * On older chipsets, BM_RLD needs to be set
572 * in order for Bus Master activity to wake the
573 * system from C3. Newer chipsets handle DMA
574 * during C3 automatically and BM_RLD is a NOP.
575 * In either case, the proper way to
576 * handle BM_RLD is to set it and leave it set.
578 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, 1);
583 static int acpi_processor_power_verify(struct acpi_processor *pr)
586 unsigned int working = 0;
588 pr->power.timer_broadcast_on_state = INT_MAX;
590 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
591 struct acpi_processor_cx *cx = &pr->power.states[i];
605 acpi_processor_power_verify_c3(pr, cx);
611 lapic_timer_check_state(i, pr, cx);
612 tsc_check_state(cx->type);
616 lapic_timer_propagate_broadcast(pr);
621 static int acpi_processor_get_power_info(struct acpi_processor *pr)
627 /* NOTE: the idle thread may not be running while calling
630 /* Zero initialize all the C-states info. */
631 memset(pr->power.states, 0, sizeof(pr->power.states));
633 result = acpi_processor_get_power_info_cst(pr);
634 if (result == -ENODEV)
635 result = acpi_processor_get_power_info_fadt(pr);
640 acpi_processor_get_power_info_default(pr);
642 pr->power.count = acpi_processor_power_verify(pr);
645 * if one state of type C2 or C3 is available, mark this
646 * CPU as being "idle manageable"
648 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
649 if (pr->power.states[i].valid) {
651 if (pr->power.states[i].type >= ACPI_STATE_C2)
660 * acpi_idle_bm_check - checks if bus master activity was detected
662 static int acpi_idle_bm_check(void)
666 if (bm_check_disable)
669 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status);
671 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, 1);
673 * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
674 * the true state of bus mastering activity; forcing us to
675 * manually check the BMIDEA bit of each IDE channel.
677 else if (errata.piix4.bmisx) {
678 if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01)
679 || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01))
686 * acpi_idle_do_entry - a helper function that does C2 and C3 type entry
689 * Caller disables interrupt before call and enables interrupt after return.
691 static inline void acpi_idle_do_entry(struct acpi_processor_cx *cx)
693 /* Don't trace irqs off for idle */
694 stop_critical_timings();
695 if (cx->entry_method == ACPI_CSTATE_FFH) {
696 /* Call into architectural FFH based C-state */
697 acpi_processor_ffh_cstate_enter(cx);
698 } else if (cx->entry_method == ACPI_CSTATE_HALT) {
701 /* IO port based C-state */
703 /* Dummy wait op - must do something useless after P_LVL2 read
704 because chipsets cannot guarantee that STPCLK# signal
705 gets asserted in time to freeze execution properly. */
706 inl(acpi_gbl_FADT.xpm_timer_block.address);
708 start_critical_timings();
712 * acpi_idle_enter_c1 - enters an ACPI C1 state-type
713 * @dev: the target CPU
714 * @drv: cpuidle driver containing cpuidle state info
715 * @index: index of target state
717 * This is equivalent to the HALT instruction.
719 static int acpi_idle_enter_c1(struct cpuidle_device *dev,
720 struct cpuidle_driver *drv, int index)
722 struct acpi_processor *pr;
723 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu);
725 pr = __this_cpu_read(processors);
730 lapic_timer_state_broadcast(pr, cx, 1);
731 acpi_idle_do_entry(cx);
733 lapic_timer_state_broadcast(pr, cx, 0);
740 * acpi_idle_play_dead - enters an ACPI state for long-term idle (i.e. off-lining)
741 * @dev: the target CPU
742 * @index: the index of suggested state
744 static int acpi_idle_play_dead(struct cpuidle_device *dev, int index)
746 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu);
748 ACPI_FLUSH_CPU_CACHE();
752 if (cx->entry_method == ACPI_CSTATE_HALT)
754 else if (cx->entry_method == ACPI_CSTATE_SYSTEMIO) {
756 /* See comment in acpi_idle_do_entry() */
757 inl(acpi_gbl_FADT.xpm_timer_block.address);
767 * acpi_idle_enter_simple - enters an ACPI state without BM handling
768 * @dev: the target CPU
769 * @drv: cpuidle driver with cpuidle state information
770 * @index: the index of suggested state
772 static int acpi_idle_enter_simple(struct cpuidle_device *dev,
773 struct cpuidle_driver *drv, int index)
775 struct acpi_processor *pr;
776 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu);
778 pr = __this_cpu_read(processors);
784 * Must be done before busmaster disable as we might need to
787 lapic_timer_state_broadcast(pr, cx, 1);
789 if (cx->type == ACPI_STATE_C3)
790 ACPI_FLUSH_CPU_CACHE();
792 /* Tell the scheduler that we are going deep-idle: */
793 sched_clock_idle_sleep_event();
794 acpi_idle_do_entry(cx);
796 sched_clock_idle_wakeup_event(0);
798 lapic_timer_state_broadcast(pr, cx, 0);
802 static int c3_cpu_count;
803 static DEFINE_RAW_SPINLOCK(c3_lock);
806 * acpi_idle_enter_bm - enters C3 with proper BM handling
807 * @dev: the target CPU
808 * @drv: cpuidle driver containing state data
809 * @index: the index of suggested state
811 * If BM is detected, the deepest non-C3 idle state is entered instead.
813 static int acpi_idle_enter_bm(struct cpuidle_device *dev,
814 struct cpuidle_driver *drv, int index)
816 struct acpi_processor *pr;
817 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu);
819 pr = __this_cpu_read(processors);
824 if (!cx->bm_sts_skip && acpi_idle_bm_check()) {
825 if (drv->safe_state_index >= 0) {
826 return drv->states[drv->safe_state_index].enter(dev,
827 drv, drv->safe_state_index);
834 acpi_unlazy_tlb(smp_processor_id());
836 /* Tell the scheduler that we are going deep-idle: */
837 sched_clock_idle_sleep_event();
839 * Must be done before busmaster disable as we might need to
842 lapic_timer_state_broadcast(pr, cx, 1);
846 * bm_check implies we need ARB_DIS
847 * !bm_check implies we need cache flush
848 * bm_control implies whether we can do ARB_DIS
850 * That leaves a case where bm_check is set and bm_control is
851 * not set. In that case we cannot do much, we enter C3
852 * without doing anything.
854 if (pr->flags.bm_check && pr->flags.bm_control) {
855 raw_spin_lock(&c3_lock);
857 /* Disable bus master arbitration when all CPUs are in C3 */
858 if (c3_cpu_count == num_online_cpus())
859 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 1);
860 raw_spin_unlock(&c3_lock);
861 } else if (!pr->flags.bm_check) {
862 ACPI_FLUSH_CPU_CACHE();
865 acpi_idle_do_entry(cx);
867 /* Re-enable bus master arbitration */
868 if (pr->flags.bm_check && pr->flags.bm_control) {
869 raw_spin_lock(&c3_lock);
870 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 0);
872 raw_spin_unlock(&c3_lock);
875 sched_clock_idle_wakeup_event(0);
877 lapic_timer_state_broadcast(pr, cx, 0);
881 struct cpuidle_driver acpi_idle_driver = {
883 .owner = THIS_MODULE,
887 * acpi_processor_setup_cpuidle_cx - prepares and configures CPUIDLE
888 * device i.e. per-cpu data
890 * @pr: the ACPI processor
891 * @dev : the cpuidle device
893 static int acpi_processor_setup_cpuidle_cx(struct acpi_processor *pr,
894 struct cpuidle_device *dev)
896 int i, count = CPUIDLE_DRIVER_STATE_START;
897 struct acpi_processor_cx *cx;
899 if (!pr->flags.power_setup_done)
902 if (pr->flags.power == 0) {
914 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
915 cx = &pr->power.states[i];
920 #ifdef CONFIG_HOTPLUG_CPU
921 if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) &&
922 !pr->flags.has_cst &&
923 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
926 per_cpu(acpi_cstate[count], dev->cpu) = cx;
929 if (count == CPUIDLE_STATE_MAX)
933 dev->state_count = count;
942 * acpi_processor_setup_cpuidle states- prepares and configures cpuidle
943 * global state data i.e. idle routines
945 * @pr: the ACPI processor
947 static int acpi_processor_setup_cpuidle_states(struct acpi_processor *pr)
949 int i, count = CPUIDLE_DRIVER_STATE_START;
950 struct acpi_processor_cx *cx;
951 struct cpuidle_state *state;
952 struct cpuidle_driver *drv = &acpi_idle_driver;
954 if (!pr->flags.power_setup_done)
957 if (pr->flags.power == 0)
960 drv->safe_state_index = -1;
961 for (i = 0; i < CPUIDLE_STATE_MAX; i++) {
962 drv->states[i].name[0] = '\0';
963 drv->states[i].desc[0] = '\0';
969 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
970 cx = &pr->power.states[i];
975 #ifdef CONFIG_HOTPLUG_CPU
976 if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) &&
977 !pr->flags.has_cst &&
978 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
982 state = &drv->states[count];
983 snprintf(state->name, CPUIDLE_NAME_LEN, "C%d", i);
984 strncpy(state->desc, cx->desc, CPUIDLE_DESC_LEN);
985 state->exit_latency = cx->latency;
986 state->target_residency = cx->latency * latency_factor;
991 if (cx->entry_method == ACPI_CSTATE_FFH)
992 state->flags |= CPUIDLE_FLAG_TIME_VALID;
994 state->enter = acpi_idle_enter_c1;
995 state->enter_dead = acpi_idle_play_dead;
996 drv->safe_state_index = count;
1000 state->flags |= CPUIDLE_FLAG_TIME_VALID;
1001 state->enter = acpi_idle_enter_simple;
1002 state->enter_dead = acpi_idle_play_dead;
1003 drv->safe_state_index = count;
1007 state->flags |= CPUIDLE_FLAG_TIME_VALID;
1008 state->enter = pr->flags.bm_check ?
1009 acpi_idle_enter_bm :
1010 acpi_idle_enter_simple;
1015 if (count == CPUIDLE_STATE_MAX)
1019 drv->state_count = count;
1027 int acpi_processor_hotplug(struct acpi_processor *pr)
1030 struct cpuidle_device *dev;
1032 if (disabled_by_idle_boot_param())
1038 if (!pr->flags.power_setup_done)
1041 dev = per_cpu(acpi_cpuidle_device, pr->id);
1042 cpuidle_pause_and_lock();
1043 cpuidle_disable_device(dev);
1044 acpi_processor_get_power_info(pr);
1045 if (pr->flags.power) {
1046 acpi_processor_setup_cpuidle_cx(pr, dev);
1047 ret = cpuidle_enable_device(dev);
1049 cpuidle_resume_and_unlock();
1054 int acpi_processor_cst_has_changed(struct acpi_processor *pr)
1057 struct acpi_processor *_pr;
1058 struct cpuidle_device *dev;
1060 if (disabled_by_idle_boot_param())
1066 if (!pr->flags.power_setup_done)
1070 * FIXME: Design the ACPI notification to make it once per
1071 * system instead of once per-cpu. This condition is a hack
1072 * to make the code that updates C-States be called once.
1075 if (pr->id == 0 && cpuidle_get_driver() == &acpi_idle_driver) {
1077 cpuidle_pause_and_lock();
1078 /* Protect against cpu-hotplug */
1081 /* Disable all cpuidle devices */
1082 for_each_online_cpu(cpu) {
1083 _pr = per_cpu(processors, cpu);
1084 if (!_pr || !_pr->flags.power_setup_done)
1086 dev = per_cpu(acpi_cpuidle_device, cpu);
1087 cpuidle_disable_device(dev);
1090 /* Populate Updated C-state information */
1091 acpi_processor_get_power_info(pr);
1092 acpi_processor_setup_cpuidle_states(pr);
1094 /* Enable all cpuidle devices */
1095 for_each_online_cpu(cpu) {
1096 _pr = per_cpu(processors, cpu);
1097 if (!_pr || !_pr->flags.power_setup_done)
1099 acpi_processor_get_power_info(_pr);
1100 if (_pr->flags.power) {
1101 dev = per_cpu(acpi_cpuidle_device, cpu);
1102 acpi_processor_setup_cpuidle_cx(_pr, dev);
1103 cpuidle_enable_device(dev);
1107 cpuidle_resume_and_unlock();
1113 static int acpi_processor_registered;
1115 int acpi_processor_power_init(struct acpi_processor *pr)
1117 acpi_status status = 0;
1119 struct cpuidle_device *dev;
1120 static int first_run;
1122 if (disabled_by_idle_boot_param())
1126 dmi_check_system(processor_power_dmi_table);
1127 max_cstate = acpi_processor_cstate_check(max_cstate);
1128 if (max_cstate < ACPI_C_STATES_MAX)
1130 "ACPI: processor limited to max C-state %d\n",
1135 if (acpi_gbl_FADT.cst_control && !nocst) {
1137 acpi_os_write_port(acpi_gbl_FADT.smi_command, acpi_gbl_FADT.cst_control, 8);
1138 if (ACPI_FAILURE(status)) {
1139 ACPI_EXCEPTION((AE_INFO, status,
1140 "Notifying BIOS of _CST ability failed"));
1144 acpi_processor_get_power_info(pr);
1145 pr->flags.power_setup_done = 1;
1148 * Install the idle handler if processor power management is supported.
1149 * Note that we use previously set idle handler will be used on
1150 * platforms that only support C1.
1152 if (pr->flags.power) {
1153 /* Register acpi_idle_driver if not already registered */
1154 if (!acpi_processor_registered) {
1155 acpi_processor_setup_cpuidle_states(pr);
1156 retval = cpuidle_register_driver(&acpi_idle_driver);
1159 printk(KERN_DEBUG "ACPI: %s registered with cpuidle\n",
1160 acpi_idle_driver.name);
1163 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
1166 per_cpu(acpi_cpuidle_device, pr->id) = dev;
1168 acpi_processor_setup_cpuidle_cx(pr, dev);
1170 /* Register per-cpu cpuidle_device. Cpuidle driver
1171 * must already be registered before registering device
1173 retval = cpuidle_register_device(dev);
1175 if (acpi_processor_registered == 0)
1176 cpuidle_unregister_driver(&acpi_idle_driver);
1179 acpi_processor_registered++;
1184 int acpi_processor_power_exit(struct acpi_processor *pr)
1186 struct cpuidle_device *dev = per_cpu(acpi_cpuidle_device, pr->id);
1188 if (disabled_by_idle_boot_param())
1191 if (pr->flags.power) {
1192 cpuidle_unregister_device(dev);
1193 acpi_processor_registered--;
1194 if (acpi_processor_registered == 0)
1195 cpuidle_unregister_driver(&acpi_idle_driver);
1198 pr->flags.power_setup_done = 0;