2 * pci_root.c - ACPI PCI Root Bridge Driver ($Revision: 40 $)
4 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
5 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
7 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or (at
12 * your option) any later version.
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
19 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
22 #include <linux/kernel.h>
23 #include <linux/module.h>
24 #include <linux/init.h>
25 #include <linux/types.h>
26 #include <linux/mutex.h>
28 #include <linux/pm_runtime.h>
29 #include <linux/pci.h>
30 #include <linux/pci-acpi.h>
31 #include <linux/pci-aspm.h>
32 #include <linux/dmar.h>
33 #include <linux/acpi.h>
34 #include <linux/slab.h>
35 #include <linux/dmi.h>
36 #include <linux/platform_data/x86/apple.h>
37 #include <acpi/apei.h> /* for acpi_hest_init() */
41 #define _COMPONENT ACPI_PCI_COMPONENT
42 ACPI_MODULE_NAME("pci_root");
43 #define ACPI_PCI_ROOT_CLASS "pci_bridge"
44 #define ACPI_PCI_ROOT_DEVICE_NAME "PCI Root Bridge"
45 static int acpi_pci_root_add(struct acpi_device *device,
46 const struct acpi_device_id *not_used);
47 static void acpi_pci_root_remove(struct acpi_device *device);
49 static int acpi_pci_root_scan_dependent(struct acpi_device *adev)
51 acpiphp_check_host_bridge(adev);
55 #define ACPI_PCIE_REQ_SUPPORT (OSC_PCI_EXT_CONFIG_SUPPORT \
56 | OSC_PCI_ASPM_SUPPORT \
57 | OSC_PCI_CLOCK_PM_SUPPORT \
58 | OSC_PCI_MSI_SUPPORT)
60 static const struct acpi_device_id root_device_ids[] = {
65 static struct acpi_scan_handler pci_root_handler = {
66 .ids = root_device_ids,
67 .attach = acpi_pci_root_add,
68 .detach = acpi_pci_root_remove,
71 .scan_dependent = acpi_pci_root_scan_dependent,
75 static DEFINE_MUTEX(osc_lock);
78 * acpi_is_root_bridge - determine whether an ACPI CA node is a PCI root bridge
79 * @handle - the ACPI CA node in question.
81 * Note: we could make this API take a struct acpi_device * instead, but
82 * for now, it's more convenient to operate on an acpi_handle.
84 int acpi_is_root_bridge(acpi_handle handle)
87 struct acpi_device *device;
89 ret = acpi_bus_get_device(handle, &device);
93 ret = acpi_match_device_ids(device, root_device_ids);
99 EXPORT_SYMBOL_GPL(acpi_is_root_bridge);
102 get_root_bridge_busnr_callback(struct acpi_resource *resource, void *data)
104 struct resource *res = data;
105 struct acpi_resource_address64 address;
108 status = acpi_resource_to_address64(resource, &address);
109 if (ACPI_FAILURE(status))
112 if ((address.address.address_length > 0) &&
113 (address.resource_type == ACPI_BUS_NUMBER_RANGE)) {
114 res->start = address.address.minimum;
115 res->end = address.address.minimum + address.address.address_length - 1;
121 static acpi_status try_get_root_bridge_busnr(acpi_handle handle,
122 struct resource *res)
128 acpi_walk_resources(handle, METHOD_NAME__CRS,
129 get_root_bridge_busnr_callback, res);
130 if (ACPI_FAILURE(status))
132 if (res->start == -1)
137 struct pci_osc_bit_struct {
142 static struct pci_osc_bit_struct pci_osc_support_bit[] = {
143 { OSC_PCI_EXT_CONFIG_SUPPORT, "ExtendedConfig" },
144 { OSC_PCI_ASPM_SUPPORT, "ASPM" },
145 { OSC_PCI_CLOCK_PM_SUPPORT, "ClockPM" },
146 { OSC_PCI_SEGMENT_GROUPS_SUPPORT, "Segments" },
147 { OSC_PCI_MSI_SUPPORT, "MSI" },
148 { OSC_PCI_HPX_TYPE_3_SUPPORT, "HPX-Type3" },
151 static struct pci_osc_bit_struct pci_osc_control_bit[] = {
152 { OSC_PCI_EXPRESS_NATIVE_HP_CONTROL, "PCIeHotplug" },
153 { OSC_PCI_SHPC_NATIVE_HP_CONTROL, "SHPCHotplug" },
154 { OSC_PCI_EXPRESS_PME_CONTROL, "PME" },
155 { OSC_PCI_EXPRESS_AER_CONTROL, "AER" },
156 { OSC_PCI_EXPRESS_CAPABILITY_CONTROL, "PCIeCapability" },
157 { OSC_PCI_EXPRESS_LTR_CONTROL, "LTR" },
160 static void decode_osc_bits(struct acpi_pci_root *root, char *msg, u32 word,
161 struct pci_osc_bit_struct *table, int size)
165 struct pci_osc_bit_struct *entry;
168 for (i = 0, entry = table; i < size; i++, entry++)
169 if (word & entry->bit)
170 len += snprintf(buf + len, sizeof(buf) - len, "%s%s",
171 len ? " " : "", entry->desc);
173 dev_info(&root->device->dev, "_OSC: %s [%s]\n", msg, buf);
176 static void decode_osc_support(struct acpi_pci_root *root, char *msg, u32 word)
178 decode_osc_bits(root, msg, word, pci_osc_support_bit,
179 ARRAY_SIZE(pci_osc_support_bit));
182 static void decode_osc_control(struct acpi_pci_root *root, char *msg, u32 word)
184 decode_osc_bits(root, msg, word, pci_osc_control_bit,
185 ARRAY_SIZE(pci_osc_control_bit));
188 static u8 pci_osc_uuid_str[] = "33DB4D5B-1FF7-401C-9657-7441C03DD766";
190 static acpi_status acpi_pci_run_osc(acpi_handle handle,
191 const u32 *capbuf, u32 *retval)
193 struct acpi_osc_context context = {
194 .uuid_str = pci_osc_uuid_str,
197 .cap.pointer = (void *)capbuf,
201 status = acpi_run_osc(handle, &context);
202 if (ACPI_SUCCESS(status)) {
203 *retval = *((u32 *)(context.ret.pointer + 8));
204 kfree(context.ret.pointer);
209 static acpi_status acpi_pci_query_osc(struct acpi_pci_root *root,
214 u32 result, capbuf[3];
216 support &= OSC_PCI_SUPPORT_MASKS;
217 support |= root->osc_support_set;
219 capbuf[OSC_QUERY_DWORD] = OSC_QUERY_ENABLE;
220 capbuf[OSC_SUPPORT_DWORD] = support;
222 *control &= OSC_PCI_CONTROL_MASKS;
223 capbuf[OSC_CONTROL_DWORD] = *control | root->osc_control_set;
225 /* Run _OSC query only with existing controls. */
226 capbuf[OSC_CONTROL_DWORD] = root->osc_control_set;
229 status = acpi_pci_run_osc(root->device->handle, capbuf, &result);
230 if (ACPI_SUCCESS(status)) {
231 root->osc_support_set = support;
238 static acpi_status acpi_pci_osc_support(struct acpi_pci_root *root, u32 flags)
242 mutex_lock(&osc_lock);
243 status = acpi_pci_query_osc(root, flags, NULL);
244 mutex_unlock(&osc_lock);
248 struct acpi_pci_root *acpi_pci_find_root(acpi_handle handle)
250 struct acpi_pci_root *root;
251 struct acpi_device *device;
253 if (acpi_bus_get_device(handle, &device) ||
254 acpi_match_device_ids(device, root_device_ids))
257 root = acpi_driver_data(device);
261 EXPORT_SYMBOL_GPL(acpi_pci_find_root);
263 struct acpi_handle_node {
264 struct list_head node;
269 * acpi_get_pci_dev - convert ACPI CA handle to struct pci_dev
270 * @handle: the handle in question
272 * Given an ACPI CA handle, the desired PCI device is located in the
273 * list of PCI devices.
275 * If the device is found, its reference count is increased and this
276 * function returns a pointer to its data structure. The caller must
277 * decrement the reference count by calling pci_dev_put().
278 * If no device is found, %NULL is returned.
280 struct pci_dev *acpi_get_pci_dev(acpi_handle handle)
283 unsigned long long adr;
286 struct pci_bus *pbus;
287 struct pci_dev *pdev = NULL;
288 struct acpi_handle_node *node, *tmp;
289 struct acpi_pci_root *root;
290 LIST_HEAD(device_list);
293 * Walk up the ACPI CA namespace until we reach a PCI root bridge.
296 while (!acpi_is_root_bridge(phandle)) {
297 node = kzalloc(sizeof(struct acpi_handle_node), GFP_KERNEL);
301 INIT_LIST_HEAD(&node->node);
302 node->handle = phandle;
303 list_add(&node->node, &device_list);
305 status = acpi_get_parent(phandle, &phandle);
306 if (ACPI_FAILURE(status))
310 root = acpi_pci_find_root(phandle);
317 * Now, walk back down the PCI device tree until we return to our
318 * original handle. Assumes that everything between the PCI root
319 * bridge and the device we're looking for must be a P2P bridge.
321 list_for_each_entry(node, &device_list, node) {
322 acpi_handle hnd = node->handle;
323 status = acpi_evaluate_integer(hnd, "_ADR", NULL, &adr);
324 if (ACPI_FAILURE(status))
326 dev = (adr >> 16) & 0xffff;
329 pdev = pci_get_slot(pbus, PCI_DEVFN(dev, fn));
330 if (!pdev || hnd == handle)
333 pbus = pdev->subordinate;
337 * This function may be called for a non-PCI device that has a
338 * PCI parent (eg. a disk under a PCI SATA controller). In that
339 * case pdev->subordinate will be NULL for the parent.
342 dev_dbg(&pdev->dev, "Not a PCI-to-PCI bridge\n");
348 list_for_each_entry_safe(node, tmp, &device_list, node)
353 EXPORT_SYMBOL_GPL(acpi_get_pci_dev);
356 * acpi_pci_osc_control_set - Request control of PCI root _OSC features.
357 * @handle: ACPI handle of a PCI root bridge (or PCIe Root Complex).
358 * @mask: Mask of _OSC bits to request control of, place to store control mask.
359 * @req: Mask of _OSC bits the control of is essential to the caller.
361 * Run _OSC query for @mask and if that is successful, compare the returned
362 * mask of control bits with @req. If all of the @req bits are set in the
363 * returned mask, run _OSC request for it.
365 * The variable at the @mask address may be modified regardless of whether or
366 * not the function returns success. On success it will contain the mask of
367 * _OSC bits the BIOS has granted control of, but its contents are meaningless
370 acpi_status acpi_pci_osc_control_set(acpi_handle handle, u32 *mask, u32 req)
372 struct acpi_pci_root *root;
373 acpi_status status = AE_OK;
377 return AE_BAD_PARAMETER;
379 ctrl = *mask & OSC_PCI_CONTROL_MASKS;
380 if ((ctrl & req) != req)
383 root = acpi_pci_find_root(handle);
387 mutex_lock(&osc_lock);
389 *mask = ctrl | root->osc_control_set;
390 /* No need to evaluate _OSC if the control was already granted. */
391 if ((root->osc_control_set & ctrl) == ctrl)
394 /* Need to check the available controls bits before requesting them. */
396 status = acpi_pci_query_osc(root, root->osc_support_set, mask);
397 if (ACPI_FAILURE(status))
401 decode_osc_control(root, "platform does not support",
406 if ((ctrl & req) != req) {
407 decode_osc_control(root, "not requesting control; platform does not support",
413 capbuf[OSC_QUERY_DWORD] = 0;
414 capbuf[OSC_SUPPORT_DWORD] = root->osc_support_set;
415 capbuf[OSC_CONTROL_DWORD] = ctrl;
416 status = acpi_pci_run_osc(handle, capbuf, mask);
417 if (ACPI_SUCCESS(status))
418 root->osc_control_set = *mask;
420 mutex_unlock(&osc_lock);
423 EXPORT_SYMBOL(acpi_pci_osc_control_set);
425 static void negotiate_os_control(struct acpi_pci_root *root, int *no_aspm,
428 u32 support, control, requested;
430 struct acpi_device *device = root->device;
431 acpi_handle handle = device->handle;
434 * Apple always return failure on _OSC calls when _OSI("Darwin") has
435 * been called successfully. We know the feature set supported by the
436 * platform, so avoid calling _OSC at all
438 if (x86_apple_machine) {
439 root->osc_control_set = ~OSC_PCI_EXPRESS_PME_CONTROL;
440 decode_osc_control(root, "OS assumes control of",
441 root->osc_control_set);
446 * All supported architectures that use ACPI have support for
447 * PCI domains, so we indicate this in _OSC support capabilities.
449 support = OSC_PCI_SEGMENT_GROUPS_SUPPORT;
450 support |= OSC_PCI_HPX_TYPE_3_SUPPORT;
451 if (pci_ext_cfg_avail())
452 support |= OSC_PCI_EXT_CONFIG_SUPPORT;
453 if (pcie_aspm_support_enabled())
454 support |= OSC_PCI_ASPM_SUPPORT | OSC_PCI_CLOCK_PM_SUPPORT;
455 if (pci_msi_enabled())
456 support |= OSC_PCI_MSI_SUPPORT;
458 decode_osc_support(root, "OS supports", support);
459 status = acpi_pci_osc_support(root, support);
460 if (ACPI_FAILURE(status)) {
463 /* _OSC is optional for PCI host bridges */
464 if ((status == AE_NOT_FOUND) && !is_pcie)
467 dev_info(&device->dev, "_OSC failed (%s)%s\n",
468 acpi_format_exception(status),
469 pcie_aspm_support_enabled() ? "; disabling ASPM" : "");
473 if (pcie_ports_disabled) {
474 dev_info(&device->dev, "PCIe port services disabled; not requesting _OSC control\n");
478 if ((support & ACPI_PCIE_REQ_SUPPORT) != ACPI_PCIE_REQ_SUPPORT) {
479 decode_osc_support(root, "not requesting OS control; OS requires",
480 ACPI_PCIE_REQ_SUPPORT);
484 control = OSC_PCI_EXPRESS_CAPABILITY_CONTROL
485 | OSC_PCI_EXPRESS_PME_CONTROL;
487 if (IS_ENABLED(CONFIG_PCIEASPM))
488 control |= OSC_PCI_EXPRESS_LTR_CONTROL;
490 if (IS_ENABLED(CONFIG_HOTPLUG_PCI_PCIE))
491 control |= OSC_PCI_EXPRESS_NATIVE_HP_CONTROL;
493 if (IS_ENABLED(CONFIG_HOTPLUG_PCI_SHPC))
494 control |= OSC_PCI_SHPC_NATIVE_HP_CONTROL;
496 if (pci_aer_available()) {
497 if (aer_acpi_firmware_first())
498 dev_info(&device->dev,
499 "PCIe AER handled by firmware\n");
501 control |= OSC_PCI_EXPRESS_AER_CONTROL;
505 status = acpi_pci_osc_control_set(handle, &control,
506 OSC_PCI_EXPRESS_CAPABILITY_CONTROL);
507 if (ACPI_SUCCESS(status)) {
508 decode_osc_control(root, "OS now controls", control);
509 if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_ASPM) {
511 * We have ASPM control, but the FADT indicates that
512 * it's unsupported. Leave existing configuration
513 * intact and prevent the OS from touching it.
515 dev_info(&device->dev, "FADT indicates ASPM is unsupported, using BIOS configuration\n");
519 decode_osc_control(root, "OS requested", requested);
520 decode_osc_control(root, "platform willing to grant", control);
521 dev_info(&device->dev, "_OSC failed (%s); disabling ASPM\n",
522 acpi_format_exception(status));
525 * We want to disable ASPM here, but aspm_disabled
526 * needs to remain in its state from boot so that we
527 * properly handle PCIe 1.1 devices. So we set this
528 * flag here, to defer the action until after the ACPI
535 static int acpi_pci_root_add(struct acpi_device *device,
536 const struct acpi_device_id *not_used)
538 unsigned long long segment, bus;
541 struct acpi_pci_root *root;
542 acpi_handle handle = device->handle;
544 bool hotadd = system_state == SYSTEM_RUNNING;
547 root = kzalloc(sizeof(struct acpi_pci_root), GFP_KERNEL);
552 status = acpi_evaluate_integer(handle, METHOD_NAME__SEG, NULL,
554 if (ACPI_FAILURE(status) && status != AE_NOT_FOUND) {
555 dev_err(&device->dev, "can't evaluate _SEG\n");
560 /* Check _CRS first, then _BBN. If no _BBN, default to zero. */
561 root->secondary.flags = IORESOURCE_BUS;
562 status = try_get_root_bridge_busnr(handle, &root->secondary);
563 if (ACPI_FAILURE(status)) {
565 * We need both the start and end of the downstream bus range
566 * to interpret _CBA (MMCONFIG base address), so it really is
567 * supposed to be in _CRS. If we don't find it there, all we
568 * can do is assume [_BBN-0xFF] or [0-0xFF].
570 root->secondary.end = 0xFF;
571 dev_warn(&device->dev,
572 FW_BUG "no secondary bus range in _CRS\n");
573 status = acpi_evaluate_integer(handle, METHOD_NAME__BBN,
575 if (ACPI_SUCCESS(status))
576 root->secondary.start = bus;
577 else if (status == AE_NOT_FOUND)
578 root->secondary.start = 0;
580 dev_err(&device->dev, "can't evaluate _BBN\n");
586 root->device = device;
587 root->segment = segment & 0xFFFF;
588 strcpy(acpi_device_name(device), ACPI_PCI_ROOT_DEVICE_NAME);
589 strcpy(acpi_device_class(device), ACPI_PCI_ROOT_CLASS);
590 device->driver_data = root;
592 if (hotadd && dmar_device_add(handle)) {
597 pr_info(PREFIX "%s [%s] (domain %04x %pR)\n",
598 acpi_device_name(device), acpi_device_bid(device),
599 root->segment, &root->secondary);
601 root->mcfg_addr = acpi_pci_root_get_mcfg_addr(handle);
603 is_pcie = strcmp(acpi_device_hid(device), "PNP0A08") == 0;
604 negotiate_os_control(root, &no_aspm, is_pcie);
607 * TBD: Need PCI interface for enumeration/configuration of roots.
611 * Scan the Root Bridge
612 * --------------------
613 * Must do this prior to any attempt to bind the root device, as the
614 * PCI namespace does not get created until this call is made (and
615 * thus the root bridge's pci_dev does not exist).
617 root->bus = pci_acpi_scan_root(root);
619 dev_err(&device->dev,
620 "Bus %04x:%02x not present in PCI namespace\n",
621 root->segment, (unsigned int)root->secondary.start);
622 device->driver_data = NULL;
630 pci_acpi_add_bus_pm_notifier(device);
631 device_set_wakeup_capable(root->bus->bridge, device->wakeup.flags.valid);
634 pcibios_resource_survey_bus(root->bus);
635 pci_assign_unassigned_root_bus_resources(root->bus);
637 * This is only called for the hotadd case. For the boot-time
638 * case, we need to wait until after PCI initialization in
639 * order to deal with IOAPICs mapped in on a PCI BAR.
641 * This is currently x86-specific, because acpi_ioapic_add()
642 * is an empty function without CONFIG_ACPI_HOTPLUG_IOAPIC.
643 * And CONFIG_ACPI_HOTPLUG_IOAPIC depends on CONFIG_X86_IO_APIC
644 * (see drivers/acpi/Kconfig).
646 acpi_ioapic_add(root->device->handle);
649 pci_lock_rescan_remove();
650 pci_bus_add_devices(root->bus);
651 pci_unlock_rescan_remove();
656 dmar_device_remove(handle);
662 static void acpi_pci_root_remove(struct acpi_device *device)
664 struct acpi_pci_root *root = acpi_driver_data(device);
666 pci_lock_rescan_remove();
668 pci_stop_root_bus(root->bus);
670 pci_ioapic_remove(root);
671 device_set_wakeup_capable(root->bus->bridge, false);
672 pci_acpi_remove_bus_pm_notifier(device);
674 pci_remove_root_bus(root->bus);
675 WARN_ON(acpi_ioapic_remove(root));
677 dmar_device_remove(device->handle);
679 pci_unlock_rescan_remove();
685 * Following code to support acpi_pci_root_create() is copied from
686 * arch/x86/pci/acpi.c and modified so it could be reused by x86, IA64
689 static void acpi_pci_root_validate_resources(struct device *dev,
690 struct list_head *resources,
694 struct resource *res1, *res2, *root = NULL;
695 struct resource_entry *tmp, *entry, *entry2;
697 BUG_ON((type & (IORESOURCE_MEM | IORESOURCE_IO)) == 0);
698 root = (type & IORESOURCE_MEM) ? &iomem_resource : &ioport_resource;
700 list_splice_init(resources, &list);
701 resource_list_for_each_entry_safe(entry, tmp, &list) {
706 if (!(res1->flags & type))
709 /* Exclude non-addressable range or non-addressable portion */
710 end = min(res1->end, root->end);
711 if (end <= res1->start) {
712 dev_info(dev, "host bridge window %pR (ignored, not CPU addressable)\n",
716 } else if (res1->end != end) {
717 dev_info(dev, "host bridge window %pR ([%#llx-%#llx] ignored, not CPU addressable)\n",
718 res1, (unsigned long long)end + 1,
719 (unsigned long long)res1->end);
723 resource_list_for_each_entry(entry2, resources) {
725 if (!(res2->flags & type))
729 * I don't like throwing away windows because then
730 * our resources no longer match the ACPI _CRS, but
731 * the kernel resource tree doesn't allow overlaps.
733 if (resource_overlaps(res1, res2)) {
734 res2->start = min(res1->start, res2->start);
735 res2->end = max(res1->end, res2->end);
736 dev_info(dev, "host bridge window expanded to %pR; %pR ignored\n",
744 resource_list_del(entry);
746 resource_list_free_entry(entry);
748 resource_list_add_tail(entry, resources);
752 static void acpi_pci_root_remap_iospace(struct fwnode_handle *fwnode,
753 struct resource_entry *entry)
756 struct resource *res = entry->res;
757 resource_size_t cpu_addr = res->start;
758 resource_size_t pci_addr = cpu_addr - entry->offset;
759 resource_size_t length = resource_size(res);
762 if (pci_register_io_range(fwnode, cpu_addr, length))
765 port = pci_address_to_pio(cpu_addr);
766 if (port == (unsigned long)-1)
770 res->end = port + length - 1;
771 entry->offset = port - pci_addr;
773 if (pci_remap_iospace(res, cpu_addr) < 0)
776 pr_info("Remapped I/O %pa to %pR\n", &cpu_addr, res);
779 res->flags |= IORESOURCE_DISABLED;
783 int acpi_pci_probe_root_resources(struct acpi_pci_root_info *info)
786 struct list_head *list = &info->resources;
787 struct acpi_device *device = info->bridge;
788 struct resource_entry *entry, *tmp;
791 flags = IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT;
792 ret = acpi_dev_get_resources(device, list,
793 acpi_dev_filter_resource_type_cb,
796 dev_warn(&device->dev,
797 "failed to parse _CRS method, error code %d\n", ret);
799 dev_dbg(&device->dev,
800 "no IO and memory resources present in _CRS\n");
802 resource_list_for_each_entry_safe(entry, tmp, list) {
803 if (entry->res->flags & IORESOURCE_IO)
804 acpi_pci_root_remap_iospace(&device->fwnode,
807 if (entry->res->flags & IORESOURCE_DISABLED)
808 resource_list_destroy_entry(entry);
810 entry->res->name = info->name;
812 acpi_pci_root_validate_resources(&device->dev, list,
814 acpi_pci_root_validate_resources(&device->dev, list,
821 static void pci_acpi_root_add_resources(struct acpi_pci_root_info *info)
823 struct resource_entry *entry, *tmp;
824 struct resource *res, *conflict, *root = NULL;
826 resource_list_for_each_entry_safe(entry, tmp, &info->resources) {
828 if (res->flags & IORESOURCE_MEM)
829 root = &iomem_resource;
830 else if (res->flags & IORESOURCE_IO)
831 root = &ioport_resource;
836 * Some legacy x86 host bridge drivers use iomem_resource and
837 * ioport_resource as default resource pool, skip it.
842 conflict = insert_resource_conflict(root, res);
844 dev_info(&info->bridge->dev,
845 "ignoring host bridge window %pR (conflicts with %s %pR)\n",
846 res, conflict->name, conflict);
847 resource_list_destroy_entry(entry);
852 static void __acpi_pci_root_release_info(struct acpi_pci_root_info *info)
854 struct resource *res;
855 struct resource_entry *entry, *tmp;
860 resource_list_for_each_entry_safe(entry, tmp, &info->resources) {
863 (res->flags & (IORESOURCE_MEM | IORESOURCE_IO)))
864 release_resource(res);
865 resource_list_destroy_entry(entry);
868 info->ops->release_info(info);
871 static void acpi_pci_root_release_info(struct pci_host_bridge *bridge)
873 struct resource *res;
874 struct resource_entry *entry;
876 resource_list_for_each_entry(entry, &bridge->windows) {
878 if (res->flags & IORESOURCE_IO)
879 pci_unmap_iospace(res);
881 (res->flags & (IORESOURCE_MEM | IORESOURCE_IO)))
882 release_resource(res);
884 __acpi_pci_root_release_info(bridge->release_data);
887 struct pci_bus *acpi_pci_root_create(struct acpi_pci_root *root,
888 struct acpi_pci_root_ops *ops,
889 struct acpi_pci_root_info *info,
892 int ret, busnum = root->secondary.start;
893 struct acpi_device *device = root->device;
894 int node = acpi_get_node(device->handle);
896 struct pci_host_bridge *host_bridge;
899 info->bridge = device;
901 INIT_LIST_HEAD(&info->resources);
902 snprintf(info->name, sizeof(info->name), "PCI Bus %04x:%02x",
903 root->segment, busnum);
905 if (ops->init_info && ops->init_info(info))
906 goto out_release_info;
907 if (ops->prepare_resources)
908 ret = ops->prepare_resources(info);
910 ret = acpi_pci_probe_root_resources(info);
912 goto out_release_info;
914 pci_acpi_root_add_resources(info);
915 pci_add_resource(&info->resources, &root->secondary);
916 bus = pci_create_root_bus(NULL, busnum, ops->pci_ops,
917 sysdata, &info->resources);
919 goto out_release_info;
921 host_bridge = to_pci_host_bridge(bus->bridge);
922 if (!(root->osc_control_set & OSC_PCI_EXPRESS_NATIVE_HP_CONTROL))
923 host_bridge->native_pcie_hotplug = 0;
924 if (!(root->osc_control_set & OSC_PCI_SHPC_NATIVE_HP_CONTROL))
925 host_bridge->native_shpc_hotplug = 0;
926 if (!(root->osc_control_set & OSC_PCI_EXPRESS_AER_CONTROL))
927 host_bridge->native_aer = 0;
928 if (!(root->osc_control_set & OSC_PCI_EXPRESS_PME_CONTROL))
929 host_bridge->native_pme = 0;
930 if (!(root->osc_control_set & OSC_PCI_EXPRESS_LTR_CONTROL))
931 host_bridge->native_ltr = 0;
933 pci_scan_child_bus(bus);
934 pci_set_host_bridge_release(host_bridge, acpi_pci_root_release_info,
936 if (node != NUMA_NO_NODE)
937 dev_printk(KERN_DEBUG, &bus->dev, "on NUMA node %d\n", node);
941 __acpi_pci_root_release_info(info);
945 void __init acpi_pci_root_init(void)
948 if (acpi_pci_disabled)
951 pci_acpi_crs_quirks();
952 acpi_scan_add_handler_with_hotplug(&pci_root_handler, "pci_root");