drivers/acpi/acpi_lpss.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * ACPI support for Intel Lynxpoint LPSS.
   4  *
   5  * Copyright (C) 2013, Intel Corporation
   6  * Authors: Mika Westerberg <mika.westerberg@linux.intel.com>
   7  *          Rafael J. Wysocki <rafael.j.wysocki@intel.com>
   8  */
   9
  10 #include <linux/acpi.h>
  11 #include <linux/clkdev.h>
  12 #include <linux/clk-provider.h>
  13 #include <linux/dmi.h>
  14 #include <linux/err.h>
  15 #include <linux/io.h>
  16 #include <linux/mutex.h>
  17 #include <linux/pci.h>
  18 #include <linux/platform_device.h>
  19 #include <linux/platform_data/x86/clk-lpss.h>
  20 #include <linux/platform_data/x86/pmc_atom.h>
  21 #include <linux/pm_domain.h>
  22 #include <linux/pm_runtime.h>
  23 #include <linux/pwm.h>
  24 #include <linux/pxa2xx_ssp.h>
  25 #include <linux/suspend.h>
  26 #include <linux/delay.h>
  27
  28 #include "internal.h"
  29
  30 #ifdef CONFIG_X86_INTEL_LPSS
  31
  32 #include <asm/cpu_device_id.h>
  33 #include <asm/intel-family.h>
  34 #include <asm/iosf_mbi.h>
  35
  36 #define LPSS_ADDR(desc) ((unsigned long)&desc)
  37
  38 #define LPSS_CLK_SIZE   0x04
  39 #define LPSS_LTR_SIZE   0x18
  40
  41 /* Offsets relative to LPSS_PRIVATE_OFFSET */
  42 #define LPSS_CLK_DIVIDER_DEF_MASK       (BIT(1) | BIT(16))
  43 #define LPSS_RESETS                     0x04
  44 #define LPSS_RESETS_RESET_FUNC          BIT(0)
  45 #define LPSS_RESETS_RESET_APB           BIT(1)
  46 #define LPSS_GENERAL                    0x08
  47 #define LPSS_GENERAL_LTR_MODE_SW        BIT(2)
  48 #define LPSS_GENERAL_UART_RTS_OVRD      BIT(3)
  49 #define LPSS_SW_LTR                     0x10
  50 #define LPSS_AUTO_LTR                   0x14
  51 #define LPSS_LTR_SNOOP_REQ              BIT(15)
  52 #define LPSS_LTR_SNOOP_MASK             0x0000FFFF
  53 #define LPSS_LTR_SNOOP_LAT_1US          0x800
  54 #define LPSS_LTR_SNOOP_LAT_32US         0xC00
  55 #define LPSS_LTR_SNOOP_LAT_SHIFT        5
  56 #define LPSS_LTR_SNOOP_LAT_CUTOFF       3000
  57 #define LPSS_LTR_MAX_VAL                0x3FF
  58 #define LPSS_TX_INT                     0x20
  59 #define LPSS_TX_INT_MASK                BIT(1)
  60
  61 #define LPSS_PRV_REG_COUNT              9
  62
  63 /* LPSS Flags */
  64 #define LPSS_CLK                        BIT(0)
  65 #define LPSS_CLK_GATE                   BIT(1)
  66 #define LPSS_CLK_DIVIDER                BIT(2)
  67 #define LPSS_LTR                        BIT(3)
  68 #define LPSS_SAVE_CTX                   BIT(4)
  69 /*
  70  * For some devices the DSDT AML code for another device turns off the device
  71  * before our suspend handler runs, causing us to read/save all 1-s (0xffffffff)
  72  * as ctx register values.
  73  * Luckily these devices always use the same ctx register values, so we can
  74  * work around this by saving the ctx registers once on activation.
  75  */
  76 #define LPSS_SAVE_CTX_ONCE              BIT(5)
  77 #define LPSS_NO_D3_DELAY                BIT(6)
  78
  79 struct lpss_private_data;
  80
  81 struct lpss_device_desc {
  82         unsigned int flags;
  83         const char *clk_con_id;
  84         unsigned int prv_offset;
  85         size_t prv_size_override;
  86         const struct property_entry *properties;
  87         void (*setup)(struct lpss_private_data *pdata);
  88         bool resume_from_noirq;
  89 };
  90
  91 static const struct lpss_device_desc lpss_dma_desc = {
  92         .flags = LPSS_CLK,
  93 };
  94
  95 struct lpss_private_data {
  96         struct acpi_device *adev;
  97         void __iomem *mmio_base;
  98         resource_size_t mmio_size;
  99         unsigned int fixed_clk_rate;
 100         struct clk *clk;
 101         const struct lpss_device_desc *dev_desc;
 102         u32 prv_reg_ctx[LPSS_PRV_REG_COUNT];
 103 };
 104
 105 /* Devices which need to be in D3 before lpss_iosf_enter_d3_state() proceeds */
 106 static u32 pmc_atom_d3_mask = 0xfe000ffe;
 107
 108 /* LPSS run time quirks */
 109 static unsigned int lpss_quirks;
 110
 111 /*
 112  * LPSS_QUIRK_ALWAYS_POWER_ON: override power state for LPSS DMA device.
 113  *
 114  * The LPSS DMA controller has neither _PS0 nor _PS3 method. Moreover
 115  * it can be powered off automatically whenever the last LPSS device goes down.
 116  * In case of no power any access to the DMA controller will hang the system.
 117  * The behaviour is reproduced on some HP laptops based on Intel BayTrail as
 118  * well as on ASuS T100TA transformer.
 119  *
 120  * This quirk overrides power state of entire LPSS island to keep DMA powered
 121  * on whenever we have at least one other device in use.
 122  */
 123 #define LPSS_QUIRK_ALWAYS_POWER_ON      BIT(0)
 124
 125 /* UART Component Parameter Register */
 126 #define LPSS_UART_CPR                   0xF4
 127 #define LPSS_UART_CPR_AFCE              BIT(4)
 128
 129 static void lpss_uart_setup(struct lpss_private_data *pdata)
 130 {
 131         unsigned int offset;
 132         u32 val;
 133
 134         offset = pdata->dev_desc->prv_offset + LPSS_TX_INT;
 135         val = readl(pdata->mmio_base + offset);
 136         writel(val | LPSS_TX_INT_MASK, pdata->mmio_base + offset);
 137
 138         val = readl(pdata->mmio_base + LPSS_UART_CPR);
 139         if (!(val & LPSS_UART_CPR_AFCE)) {
 140                 offset = pdata->dev_desc->prv_offset + LPSS_GENERAL;
 141                 val = readl(pdata->mmio_base + offset);
 142                 val |= LPSS_GENERAL_UART_RTS_OVRD;
 143                 writel(val, pdata->mmio_base + offset);
 144         }
 145 }
 146
 147 static void lpss_deassert_reset(struct lpss_private_data *pdata)
 148 {
 149         unsigned int offset;
 150         u32 val;
 151
 152         offset = pdata->dev_desc->prv_offset + LPSS_RESETS;
 153         val = readl(pdata->mmio_base + offset);
 154         val |= LPSS_RESETS_RESET_APB | LPSS_RESETS_RESET_FUNC;
 155         writel(val, pdata->mmio_base + offset);
 156 }
 157
 158 /*
 159  * BYT PWM used for backlight control by the i915 driver on systems without
 160  * the Crystal Cove PMIC.
 161  */
 162 static struct pwm_lookup byt_pwm_lookup[] = {
 163         PWM_LOOKUP_WITH_MODULE("80860F09:00", 0, "0000:00:02.0",
 164                                "pwm_soc_backlight", 0, PWM_POLARITY_NORMAL,
 165                                "pwm-lpss-platform"),
 166 };
 167
 168 static void byt_pwm_setup(struct lpss_private_data *pdata)
 169 {
 170         u64 uid;
 171
 172         /* Only call pwm_add_table for the first PWM controller */
 173         if (acpi_dev_uid_to_integer(pdata->adev, &uid) || uid != 1)
 174                 return;
 175
 176         pwm_add_table(byt_pwm_lookup, ARRAY_SIZE(byt_pwm_lookup));
 177 }
 178
 179 #define LPSS_I2C_ENABLE                 0x6c
 180
 181 static void byt_i2c_setup(struct lpss_private_data *pdata)
 182 {
 183         acpi_handle handle = pdata->adev->handle;
 184         unsigned long long shared_host = 0;
 185         acpi_status status;
 186         u64 uid;
 187
 188         /* Expected to always be successfull, but better safe then sorry */
 189         if (!acpi_dev_uid_to_integer(pdata->adev, &uid) && uid) {
 190                 /* Detect I2C bus shared with PUNIT and ignore its d3 status */
 191                 status = acpi_evaluate_integer(handle, "_SEM", NULL, &shared_host);
 192                 if (ACPI_SUCCESS(status) && shared_host)
 193                         pmc_atom_d3_mask &= ~(BIT_LPSS2_F1_I2C1 << (uid - 1));
 194         }
 195
 196         lpss_deassert_reset(pdata);
 197
 198         if (readl(pdata->mmio_base + pdata->dev_desc->prv_offset))
 199                 pdata->fixed_clk_rate = 133000000;
 200
 201         writel(0, pdata->mmio_base + LPSS_I2C_ENABLE);
 202 }
 203
 204 /* BSW PWM used for backlight control by the i915 driver */
 205 static struct pwm_lookup bsw_pwm_lookup[] = {
 206         PWM_LOOKUP_WITH_MODULE("80862288:00", 0, "0000:00:02.0",
 207                                "pwm_soc_backlight", 0, PWM_POLARITY_NORMAL,
 208                                "pwm-lpss-platform"),
 209 };
 210
 211 static void bsw_pwm_setup(struct lpss_private_data *pdata)
 212 {
 213         u64 uid;
 214
 215         /* Only call pwm_add_table for the first PWM controller */
 216         if (acpi_dev_uid_to_integer(pdata->adev, &uid) || uid != 1)
 217                 return;
 218
 219         pwm_add_table(bsw_pwm_lookup, ARRAY_SIZE(bsw_pwm_lookup));
 220 }
 221
 222 static const struct property_entry lpt_spi_properties[] = {
 223         PROPERTY_ENTRY_U32("intel,spi-pxa2xx-type", LPSS_LPT_SSP),
 224         { }
 225 };
 226
 227 static const struct lpss_device_desc lpt_spi_dev_desc = {
 228         .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_LTR
 229                         | LPSS_SAVE_CTX,
 230         .prv_offset = 0x800,
 231         .properties = lpt_spi_properties,
 232 };
 233
 234 static const struct lpss_device_desc lpt_i2c_dev_desc = {
 235         .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_LTR | LPSS_SAVE_CTX,
 236         .prv_offset = 0x800,
 237 };
 238
 239 static struct property_entry uart_properties[] = {
 240         PROPERTY_ENTRY_U32("reg-io-width", 4),
 241         PROPERTY_ENTRY_U32("reg-shift", 2),
 242         PROPERTY_ENTRY_BOOL("snps,uart-16550-compatible"),
 243         { },
 244 };
 245
 246 static const struct lpss_device_desc lpt_uart_dev_desc = {
 247         .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_LTR
 248                         | LPSS_SAVE_CTX,
 249         .clk_con_id = "baudclk",
 250         .prv_offset = 0x800,
 251         .setup = lpss_uart_setup,
 252         .properties = uart_properties,
 253 };
 254
 255 static const struct lpss_device_desc lpt_sdio_dev_desc = {
 256         .flags = LPSS_LTR,
 257         .prv_offset = 0x1000,
 258         .prv_size_override = 0x1018,
 259 };
 260
 261 static const struct lpss_device_desc byt_pwm_dev_desc = {
 262         .flags = LPSS_SAVE_CTX,
 263         .prv_offset = 0x800,
 264         .setup = byt_pwm_setup,
 265 };
 266
 267 static const struct lpss_device_desc bsw_pwm_dev_desc = {
 268         .flags = LPSS_SAVE_CTX_ONCE | LPSS_NO_D3_DELAY,
 269         .prv_offset = 0x800,
 270         .setup = bsw_pwm_setup,
 271         .resume_from_noirq = true,
 272 };
 273
 274 static const struct lpss_device_desc byt_uart_dev_desc = {
 275         .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_SAVE_CTX,
 276         .clk_con_id = "baudclk",
 277         .prv_offset = 0x800,
 278         .setup = lpss_uart_setup,
 279         .properties = uart_properties,
 280 };
 281
 282 static const struct lpss_device_desc bsw_uart_dev_desc = {
 283         .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_SAVE_CTX
 284                         | LPSS_NO_D3_DELAY,
 285         .clk_con_id = "baudclk",
 286         .prv_offset = 0x800,
 287         .setup = lpss_uart_setup,
 288         .properties = uart_properties,
 289 };
 290
 291 static const struct property_entry byt_spi_properties[] = {
 292         PROPERTY_ENTRY_U32("intel,spi-pxa2xx-type", LPSS_BYT_SSP),
 293         { }
 294 };
 295
 296 static const struct lpss_device_desc byt_spi_dev_desc = {
 297         .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_SAVE_CTX,
 298         .prv_offset = 0x400,
 299         .properties = byt_spi_properties,
 300 };
 301
 302 static const struct lpss_device_desc byt_sdio_dev_desc = {
 303         .flags = LPSS_CLK,
 304 };
 305
 306 static const struct lpss_device_desc byt_i2c_dev_desc = {
 307         .flags = LPSS_CLK | LPSS_SAVE_CTX,
 308         .prv_offset = 0x800,
 309         .setup = byt_i2c_setup,
 310         .resume_from_noirq = true,
 311 };
 312
 313 static const struct lpss_device_desc bsw_i2c_dev_desc = {
 314         .flags = LPSS_CLK | LPSS_SAVE_CTX | LPSS_NO_D3_DELAY,
 315         .prv_offset = 0x800,
 316         .setup = byt_i2c_setup,
 317         .resume_from_noirq = true,
 318 };
 319
 320 static const struct property_entry bsw_spi_properties[] = {
 321         PROPERTY_ENTRY_U32("intel,spi-pxa2xx-type", LPSS_BSW_SSP),
 322         { }
 323 };
 324
 325 static const struct lpss_device_desc bsw_spi_dev_desc = {
 326         .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_SAVE_CTX
 327                         | LPSS_NO_D3_DELAY,
 328         .prv_offset = 0x400,
 329         .setup = lpss_deassert_reset,
 330         .properties = bsw_spi_properties,
 331 };
 332
 333 static const struct x86_cpu_id lpss_cpu_ids[] = {
 334         X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT,     NULL),
 335         X86_MATCH_INTEL_FAM6_MODEL(ATOM_AIRMONT,        NULL),
 336         {}
 337 };
 338
 339 #else
 340
 341 #define LPSS_ADDR(desc) (0UL)
 342
 343 #endif /* CONFIG_X86_INTEL_LPSS */
 344
 345 static const struct acpi_device_id acpi_lpss_device_ids[] = {
 346         /* Generic LPSS devices */
 347         { "INTL9C60", LPSS_ADDR(lpss_dma_desc) },
 348
 349         /* Lynxpoint LPSS devices */
 350         { "INT33C0", LPSS_ADDR(lpt_spi_dev_desc) },
 351         { "INT33C1", LPSS_ADDR(lpt_spi_dev_desc) },
 352         { "INT33C2", LPSS_ADDR(lpt_i2c_dev_desc) },
 353         { "INT33C3", LPSS_ADDR(lpt_i2c_dev_desc) },
 354         { "INT33C4", LPSS_ADDR(lpt_uart_dev_desc) },
 355         { "INT33C5", LPSS_ADDR(lpt_uart_dev_desc) },
 356         { "INT33C6", LPSS_ADDR(lpt_sdio_dev_desc) },
 357         { "INT33C7", },
 358
 359         /* BayTrail LPSS devices */
 360         { "80860F09", LPSS_ADDR(byt_pwm_dev_desc) },
 361         { "80860F0A", LPSS_ADDR(byt_uart_dev_desc) },
 362         { "80860F0E", LPSS_ADDR(byt_spi_dev_desc) },
 363         { "80860F14", LPSS_ADDR(byt_sdio_dev_desc) },
 364         { "80860F41", LPSS_ADDR(byt_i2c_dev_desc) },
 365         { "INT33B2", },
 366         { "INT33FC", },
 367
 368         /* Braswell LPSS devices */
 369         { "80862286", LPSS_ADDR(lpss_dma_desc) },
 370         { "80862288", LPSS_ADDR(bsw_pwm_dev_desc) },
 371         { "8086228A", LPSS_ADDR(bsw_uart_dev_desc) },
 372         { "8086228E", LPSS_ADDR(bsw_spi_dev_desc) },
 373         { "808622C0", LPSS_ADDR(lpss_dma_desc) },
 374         { "808622C1", LPSS_ADDR(bsw_i2c_dev_desc) },
 375
 376         /* Broadwell LPSS devices */
 377         { "INT3430", LPSS_ADDR(lpt_spi_dev_desc) },
 378         { "INT3431", LPSS_ADDR(lpt_spi_dev_desc) },
 379         { "INT3432", LPSS_ADDR(lpt_i2c_dev_desc) },
 380         { "INT3433", LPSS_ADDR(lpt_i2c_dev_desc) },
 381         { "INT3434", LPSS_ADDR(lpt_uart_dev_desc) },
 382         { "INT3435", LPSS_ADDR(lpt_uart_dev_desc) },
 383         { "INT3436", LPSS_ADDR(lpt_sdio_dev_desc) },
 384         { "INT3437", },
 385
 386         /* Wildcat Point LPSS devices */
 387         { "INT3438", LPSS_ADDR(lpt_spi_dev_desc) },
 388
 389         { }
 390 };
 391
 392 #ifdef CONFIG_X86_INTEL_LPSS
 393
 394 /* LPSS main clock device. */
 395 static struct platform_device *lpss_clk_dev;
 396
 397 static inline void lpt_register_clock_device(void)
 398 {
 399         lpss_clk_dev = platform_device_register_simple("clk-lpss-atom",
 400                                                        PLATFORM_DEVID_NONE,
 401                                                        NULL, 0);
 402 }
 403
 404 static int register_device_clock(struct acpi_device *adev,
 405                                  struct lpss_private_data *pdata)
 406 {
 407         const struct lpss_device_desc *dev_desc = pdata->dev_desc;
 408         const char *devname = dev_name(&adev->dev);
 409         struct clk *clk;
 410         struct lpss_clk_data *clk_data;
 411         const char *parent, *clk_name;
 412         void __iomem *prv_base;
 413
 414         if (!lpss_clk_dev)
 415                 lpt_register_clock_device();
 416
 417         if (IS_ERR(lpss_clk_dev))
 418                 return PTR_ERR(lpss_clk_dev);
 419
 420         clk_data = platform_get_drvdata(lpss_clk_dev);
 421         if (!clk_data)
 422                 return -ENODEV;
 423         clk = clk_data->clk;
 424
 425         if (!pdata->mmio_base
 426             || pdata->mmio_size < dev_desc->prv_offset + LPSS_CLK_SIZE)
 427                 return -ENODATA;
 428
 429         parent = clk_data->name;
 430         prv_base = pdata->mmio_base + dev_desc->prv_offset;
 431
 432         if (pdata->fixed_clk_rate) {
 433                 clk = clk_register_fixed_rate(NULL, devname, parent, 0,
 434                                               pdata->fixed_clk_rate);
 435                 goto out;
 436         }
 437
 438         if (dev_desc->flags & LPSS_CLK_GATE) {
 439                 clk = clk_register_gate(NULL, devname, parent, 0,
 440                                         prv_base, 0, 0, NULL);
 441                 parent = devname;
 442         }
 443
 444         if (dev_desc->flags & LPSS_CLK_DIVIDER) {
 445                 /* Prevent division by zero */
 446                 if (!readl(prv_base))
 447                         writel(LPSS_CLK_DIVIDER_DEF_MASK, prv_base);
 448
 449                 clk_name = kasprintf(GFP_KERNEL, "%s-div", devname);
 450                 if (!clk_name)
 451                         return -ENOMEM;
 452                 clk = clk_register_fractional_divider(NULL, clk_name, parent,
 453                                                       CLK_FRAC_DIVIDER_POWER_OF_TWO_PS,
 454                                                       prv_base, 1, 15, 16, 15, 0, NULL);
 455                 parent = clk_name;
 456
 457                 clk_name = kasprintf(GFP_KERNEL, "%s-update", devname);
 458                 if (!clk_name) {
 459                         kfree(parent);
 460                         return -ENOMEM;
 461                 }
 462                 clk = clk_register_gate(NULL, clk_name, parent,
 463                                         CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE,
 464                                         prv_base, 31, 0, NULL);
 465                 kfree(parent);
 466                 kfree(clk_name);
 467         }
 468 out:
 469         if (IS_ERR(clk))
 470                 return PTR_ERR(clk);
 471
 472         pdata->clk = clk;
 473         clk_register_clkdev(clk, dev_desc->clk_con_id, devname);
 474         return 0;
 475 }
 476
 477 struct lpss_device_links {
 478         const char *supplier_hid;
 479         const char *supplier_uid;
 480         const char *consumer_hid;
 481         const char *consumer_uid;
 482         u32 flags;
 483         const struct dmi_system_id *dep_missing_ids;
 484 };
 485
 486 /* Please keep this list sorted alphabetically by vendor and model */
 487 static const struct dmi_system_id i2c1_dep_missing_dmi_ids[] = {
 488         {
 489                 .matches = {
 490                         DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
 491                         DMI_MATCH(DMI_PRODUCT_NAME, "T200TA"),
 492                 },
 493         },
 494         {}
 495 };
 496
 497 /*
 498  * The _DEP method is used to identify dependencies but instead of creating
 499  * device links for every handle in _DEP, only links in the following list are
 500  * created. That is necessary because, in the general case, _DEP can refer to
 501  * devices that might not have drivers, or that are on different buses, or where
 502  * the supplier is not enumerated until after the consumer is probed.
 503  */
 504 static const struct lpss_device_links lpss_device_links[] = {
 505         /* CHT External sdcard slot controller depends on PMIC I2C ctrl */
 506         {"808622C1", "7", "80860F14", "3", DL_FLAG_PM_RUNTIME},
 507         /* CHT iGPU depends on PMIC I2C controller */
 508         {"808622C1", "7", "LNXVIDEO", NULL, DL_FLAG_PM_RUNTIME},
 509         /* BYT iGPU depends on the Embedded Controller I2C controller (UID 1) */
 510         {"80860F41", "1", "LNXVIDEO", NULL, DL_FLAG_PM_RUNTIME,
 511          i2c1_dep_missing_dmi_ids},
 512         /* BYT CR iGPU depends on PMIC I2C controller (UID 5 on CR) */
 513         {"80860F41", "5", "LNXVIDEO", NULL, DL_FLAG_PM_RUNTIME},
 514         /* BYT iGPU depends on PMIC I2C controller (UID 7 on non CR) */
 515         {"80860F41", "7", "LNXVIDEO", NULL, DL_FLAG_PM_RUNTIME},
 516 };
 517
 518 static bool acpi_lpss_is_supplier(struct acpi_device *adev,
 519                                   const struct lpss_device_links *link)
 520 {
 521         return acpi_dev_hid_uid_match(adev, link->supplier_hid, link->supplier_uid);
 522 }
 523
 524 static bool acpi_lpss_is_consumer(struct acpi_device *adev,
 525                                   const struct lpss_device_links *link)
 526 {
 527         return acpi_dev_hid_uid_match(adev, link->consumer_hid, link->consumer_uid);
 528 }
 529
 530 struct hid_uid {
 531         const char *hid;
 532         const char *uid;
 533 };
 534
 535 static int match_hid_uid(struct device *dev, const void *data)
 536 {
 537         struct acpi_device *adev = ACPI_COMPANION(dev);
 538         const struct hid_uid *id = data;
 539
 540         if (!adev)
 541                 return 0;
 542
 543         return acpi_dev_hid_uid_match(adev, id->hid, id->uid);
 544 }
 545
 546 static struct device *acpi_lpss_find_device(const char *hid, const char *uid)
 547 {
 548         struct device *dev;
 549
 550         struct hid_uid data = {
 551                 .hid = hid,
 552                 .uid = uid,
 553         };
 554
 555         dev = bus_find_device(&platform_bus_type, NULL, &data, match_hid_uid);
 556         if (dev)
 557                 return dev;
 558
 559         return bus_find_device(&pci_bus_type, NULL, &data, match_hid_uid);
 560 }
 561
 562 static bool acpi_lpss_dep(struct acpi_device *adev, acpi_handle handle)
 563 {
 564         struct acpi_handle_list dep_devices;
 565         acpi_status status;
 566         int i;
 567
 568         if (!acpi_has_method(adev->handle, "_DEP"))
 569                 return false;
 570
 571         status = acpi_evaluate_reference(adev->handle, "_DEP", NULL,
 572                                          &dep_devices);
 573         if (ACPI_FAILURE(status)) {
 574                 dev_dbg(&adev->dev, "Failed to evaluate _DEP.\n");
 575                 return false;
 576         }
 577
 578         for (i = 0; i < dep_devices.count; i++) {
 579                 if (dep_devices.handles[i] == handle)
 580                         return true;
 581         }
 582
 583         return false;
 584 }
 585
 586 static void acpi_lpss_link_consumer(struct device *dev1,
 587                                     const struct lpss_device_links *link)
 588 {
 589         struct device *dev2;
 590
 591         dev2 = acpi_lpss_find_device(link->consumer_hid, link->consumer_uid);
 592         if (!dev2)
 593                 return;
 594
 595         if ((link->dep_missing_ids && dmi_check_system(link->dep_missing_ids))
 596             || acpi_lpss_dep(ACPI_COMPANION(dev2), ACPI_HANDLE(dev1)))
 597                 device_link_add(dev2, dev1, link->flags);
 598
 599         put_device(dev2);
 600 }
 601
 602 static void acpi_lpss_link_supplier(struct device *dev1,
 603                                     const struct lpss_device_links *link)
 604 {
 605         struct device *dev2;
 606
 607         dev2 = acpi_lpss_find_device(link->supplier_hid, link->supplier_uid);
 608         if (!dev2)
 609                 return;
 610
 611         if ((link->dep_missing_ids && dmi_check_system(link->dep_missing_ids))
 612             || acpi_lpss_dep(ACPI_COMPANION(dev1), ACPI_HANDLE(dev2)))
 613                 device_link_add(dev1, dev2, link->flags);
 614
 615         put_device(dev2);
 616 }
 617
 618 static void acpi_lpss_create_device_links(struct acpi_device *adev,
 619                                           struct platform_device *pdev)
 620 {
 621         int i;
 622
 623         for (i = 0; i < ARRAY_SIZE(lpss_device_links); i++) {
 624                 const struct lpss_device_links *link = &lpss_device_links[i];
 625
 626                 if (acpi_lpss_is_supplier(adev, link))
 627                         acpi_lpss_link_consumer(&pdev->dev, link);
 628
 629                 if (acpi_lpss_is_consumer(adev, link))
 630                         acpi_lpss_link_supplier(&pdev->dev, link);
 631         }
 632 }
 633
 634 static int acpi_lpss_create_device(struct acpi_device *adev,
 635                                    const struct acpi_device_id *id)
 636 {
 637         const struct lpss_device_desc *dev_desc;
 638         struct lpss_private_data *pdata;
 639         struct resource_entry *rentry;
 640         struct list_head resource_list;
 641         struct platform_device *pdev;
 642         int ret;
 643
 644         dev_desc = (const struct lpss_device_desc *)id->driver_data;
 645         if (!dev_desc) {
 646                 pdev = acpi_create_platform_device(adev, NULL);
 647                 return IS_ERR_OR_NULL(pdev) ? PTR_ERR(pdev) : 1;
 648         }
 649         pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
 650         if (!pdata)
 651                 return -ENOMEM;
 652
 653         INIT_LIST_HEAD(&resource_list);
 654         ret = acpi_dev_get_memory_resources(adev, &resource_list);
 655         if (ret < 0)
 656                 goto err_out;
 657
 658         rentry = list_first_entry_or_null(&resource_list, struct resource_entry, node);
 659         if (rentry) {
 660                 if (dev_desc->prv_size_override)
 661                         pdata->mmio_size = dev_desc->prv_size_override;
 662                 else
 663                         pdata->mmio_size = resource_size(rentry->res);
 664                 pdata->mmio_base = ioremap(rentry->res->start, pdata->mmio_size);
 665         }
 666
 667         acpi_dev_free_resource_list(&resource_list);
 668
 669         if (!pdata->mmio_base) {
 670                 /* Avoid acpi_bus_attach() instantiating a pdev for this dev. */
 671                 adev->pnp.type.platform_id = 0;
 672                 goto out_free;
 673         }
 674
 675         pdata->adev = adev;
 676         pdata->dev_desc = dev_desc;
 677
 678         if (dev_desc->setup)
 679                 dev_desc->setup(pdata);
 680
 681         if (dev_desc->flags & LPSS_CLK) {
 682                 ret = register_device_clock(adev, pdata);
 683                 if (ret)
 684                         goto out_free;
 685         }
 686
 687         /*
 688          * This works around a known issue in ACPI tables where LPSS devices
 689          * have _PS0 and _PS3 without _PSC (and no power resources), so
 690          * acpi_bus_init_power() will assume that the BIOS has put them into D0.
 691          */
 692         acpi_device_fix_up_power(adev);
 693
 694         adev->driver_data = pdata;
 695         pdev = acpi_create_platform_device(adev, dev_desc->properties);
 696         if (IS_ERR_OR_NULL(pdev)) {
 697                 adev->driver_data = NULL;
 698                 ret = PTR_ERR(pdev);
 699                 goto err_out;
 700         }
 701
 702         acpi_lpss_create_device_links(adev, pdev);
 703         return 1;
 704
 705 out_free:
 706         /* Skip the device, but continue the namespace scan */
 707         ret = 0;
 708 err_out:
 709         kfree(pdata);
 710         return ret;
 711 }
 712
 713 static u32 __lpss_reg_read(struct lpss_private_data *pdata, unsigned int reg)
 714 {
 715         return readl(pdata->mmio_base + pdata->dev_desc->prv_offset + reg);
 716 }
 717
 718 static void __lpss_reg_write(u32 val, struct lpss_private_data *pdata,
 719                              unsigned int reg)
 720 {
 721         writel(val, pdata->mmio_base + pdata->dev_desc->prv_offset + reg);
 722 }
 723
 724 static int lpss_reg_read(struct device *dev, unsigned int reg, u32 *val)
 725 {
 726         struct acpi_device *adev = ACPI_COMPANION(dev);
 727         struct lpss_private_data *pdata;
 728         unsigned long flags;
 729         int ret;
 730
 731         if (WARN_ON(!adev))
 732                 return -ENODEV;
 733
 734         spin_lock_irqsave(&dev->power.lock, flags);
 735         if (pm_runtime_suspended(dev)) {
 736                 ret = -EAGAIN;
 737                 goto out;
 738         }
 739         pdata = acpi_driver_data(adev);
 740         if (WARN_ON(!pdata || !pdata->mmio_base)) {
 741                 ret = -ENODEV;
 742                 goto out;
 743         }
 744         *val = __lpss_reg_read(pdata, reg);
 745         ret = 0;
 746
 747  out:
 748         spin_unlock_irqrestore(&dev->power.lock, flags);
 749         return ret;
 750 }
 751
 752 static ssize_t lpss_ltr_show(struct device *dev, struct device_attribute *attr,
 753                              char *buf)
 754 {
 755         u32 ltr_value = 0;
 756         unsigned int reg;
 757         int ret;
 758
 759         reg = strcmp(attr->attr.name, "auto_ltr") ? LPSS_SW_LTR : LPSS_AUTO_LTR;
 760         ret = lpss_reg_read(dev, reg, &ltr_value);
 761         if (ret)
 762                 return ret;
 763
 764         return sysfs_emit(buf, "%08x\n", ltr_value);
 765 }
 766
 767 static ssize_t lpss_ltr_mode_show(struct device *dev,
 768                                   struct device_attribute *attr, char *buf)
 769 {
 770         u32 ltr_mode = 0;
 771         char *outstr;
 772         int ret;
 773
 774         ret = lpss_reg_read(dev, LPSS_GENERAL, &ltr_mode);
 775         if (ret)
 776                 return ret;
 777
 778         outstr = (ltr_mode & LPSS_GENERAL_LTR_MODE_SW) ? "sw" : "auto";
 779         return sprintf(buf, "%s\n", outstr);
 780 }
 781
 782 static DEVICE_ATTR(auto_ltr, S_IRUSR, lpss_ltr_show, NULL);
 783 static DEVICE_ATTR(sw_ltr, S_IRUSR, lpss_ltr_show, NULL);
 784 static DEVICE_ATTR(ltr_mode, S_IRUSR, lpss_ltr_mode_show, NULL);
 785
 786 static struct attribute *lpss_attrs[] = {
 787         &dev_attr_auto_ltr.attr,
 788         &dev_attr_sw_ltr.attr,
 789         &dev_attr_ltr_mode.attr,
 790         NULL,
 791 };
 792
 793 static const struct attribute_group lpss_attr_group = {
 794         .attrs = lpss_attrs,
 795         .name = "lpss_ltr",
 796 };
 797
 798 static void acpi_lpss_set_ltr(struct device *dev, s32 val)
 799 {
 800         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
 801         u32 ltr_mode, ltr_val;
 802
 803         ltr_mode = __lpss_reg_read(pdata, LPSS_GENERAL);
 804         if (val < 0) {
 805                 if (ltr_mode & LPSS_GENERAL_LTR_MODE_SW) {
 806                         ltr_mode &= ~LPSS_GENERAL_LTR_MODE_SW;
 807                         __lpss_reg_write(ltr_mode, pdata, LPSS_GENERAL);
 808                 }
 809                 return;
 810         }
 811         ltr_val = __lpss_reg_read(pdata, LPSS_SW_LTR) & ~LPSS_LTR_SNOOP_MASK;
 812         if (val >= LPSS_LTR_SNOOP_LAT_CUTOFF) {
 813                 ltr_val |= LPSS_LTR_SNOOP_LAT_32US;
 814                 val = LPSS_LTR_MAX_VAL;
 815         } else if (val > LPSS_LTR_MAX_VAL) {
 816                 ltr_val |= LPSS_LTR_SNOOP_LAT_32US | LPSS_LTR_SNOOP_REQ;
 817                 val >>= LPSS_LTR_SNOOP_LAT_SHIFT;
 818         } else {
 819                 ltr_val |= LPSS_LTR_SNOOP_LAT_1US | LPSS_LTR_SNOOP_REQ;
 820         }
 821         ltr_val |= val;
 822         __lpss_reg_write(ltr_val, pdata, LPSS_SW_LTR);
 823         if (!(ltr_mode & LPSS_GENERAL_LTR_MODE_SW)) {
 824                 ltr_mode |= LPSS_GENERAL_LTR_MODE_SW;
 825                 __lpss_reg_write(ltr_mode, pdata, LPSS_GENERAL);
 826         }
 827 }
 828
 829 #ifdef CONFIG_PM
 830 /**
 831  * acpi_lpss_save_ctx() - Save the private registers of LPSS device
 832  * @dev: LPSS device
 833  * @pdata: pointer to the private data of the LPSS device
 834  *
 835  * Most LPSS devices have private registers which may loose their context when
 836  * the device is powered down. acpi_lpss_save_ctx() saves those registers into
 837  * prv_reg_ctx array.
 838  */
 839 static void acpi_lpss_save_ctx(struct device *dev,
 840                                struct lpss_private_data *pdata)
 841 {
 842         unsigned int i;
 843
 844         for (i = 0; i < LPSS_PRV_REG_COUNT; i++) {
 845                 unsigned long offset = i * sizeof(u32);
 846
 847                 pdata->prv_reg_ctx[i] = __lpss_reg_read(pdata, offset);
 848                 dev_dbg(dev, "saving 0x%08x from LPSS reg at offset 0x%02lx\n",
 849                         pdata->prv_reg_ctx[i], offset);
 850         }
 851 }
 852
 853 /**
 854  * acpi_lpss_restore_ctx() - Restore the private registers of LPSS device
 855  * @dev: LPSS device
 856  * @pdata: pointer to the private data of the LPSS device
 857  *
 858  * Restores the registers that were previously stored with acpi_lpss_save_ctx().
 859  */
 860 static void acpi_lpss_restore_ctx(struct device *dev,
 861                                   struct lpss_private_data *pdata)
 862 {
 863         unsigned int i;
 864
 865         for (i = 0; i < LPSS_PRV_REG_COUNT; i++) {
 866                 unsigned long offset = i * sizeof(u32);
 867
 868                 __lpss_reg_write(pdata->prv_reg_ctx[i], pdata, offset);
 869                 dev_dbg(dev, "restoring 0x%08x to LPSS reg at offset 0x%02lx\n",
 870                         pdata->prv_reg_ctx[i], offset);
 871         }
 872 }
 873
 874 static void acpi_lpss_d3_to_d0_delay(struct lpss_private_data *pdata)
 875 {
 876         /*
 877          * The following delay is needed or the subsequent write operations may
 878          * fail. The LPSS devices are actually PCI devices and the PCI spec
 879          * expects 10ms delay before the device can be accessed after D3 to D0
 880          * transition. However some platforms like BSW does not need this delay.
 881          */
 882         unsigned int delay = 10;        /* default 10ms delay */
 883
 884         if (pdata->dev_desc->flags & LPSS_NO_D3_DELAY)
 885                 delay = 0;
 886
 887         msleep(delay);
 888 }
 889
 890 static int acpi_lpss_activate(struct device *dev)
 891 {
 892         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
 893         int ret;
 894
 895         ret = acpi_dev_resume(dev);
 896         if (ret)
 897                 return ret;
 898
 899         acpi_lpss_d3_to_d0_delay(pdata);
 900
 901         /*
 902          * This is called only on ->probe() stage where a device is either in
 903          * known state defined by BIOS or most likely powered off. Due to this
 904          * we have to deassert reset line to be sure that ->probe() will
 905          * recognize the device.
 906          */
 907         if (pdata->dev_desc->flags & (LPSS_SAVE_CTX | LPSS_SAVE_CTX_ONCE))
 908                 lpss_deassert_reset(pdata);
 909
 910 #ifdef CONFIG_PM
 911         if (pdata->dev_desc->flags & LPSS_SAVE_CTX_ONCE)
 912                 acpi_lpss_save_ctx(dev, pdata);
 913 #endif
 914
 915         return 0;
 916 }
 917
 918 static void acpi_lpss_dismiss(struct device *dev)
 919 {
 920         acpi_dev_suspend(dev, false);
 921 }
 922
 923 /* IOSF SB for LPSS island */
 924 #define LPSS_IOSF_UNIT_LPIOEP           0xA0
 925 #define LPSS_IOSF_UNIT_LPIO1            0xAB
 926 #define LPSS_IOSF_UNIT_LPIO2            0xAC
 927
 928 #define LPSS_IOSF_PMCSR                 0x84
 929 #define LPSS_PMCSR_D0                   0
 930 #define LPSS_PMCSR_D3hot                3
 931 #define LPSS_PMCSR_Dx_MASK              GENMASK(1, 0)
 932
 933 #define LPSS_IOSF_GPIODEF0              0x154
 934 #define LPSS_GPIODEF0_DMA1_D3           BIT(2)
 935 #define LPSS_GPIODEF0_DMA2_D3           BIT(3)
 936 #define LPSS_GPIODEF0_DMA_D3_MASK       GENMASK(3, 2)
 937 #define LPSS_GPIODEF0_DMA_LLP           BIT(13)
 938
 939 static DEFINE_MUTEX(lpss_iosf_mutex);
 940 static bool lpss_iosf_d3_entered = true;
 941
 942 static void lpss_iosf_enter_d3_state(void)
 943 {
 944         u32 value1 = 0;
 945         u32 mask1 = LPSS_GPIODEF0_DMA_D3_MASK | LPSS_GPIODEF0_DMA_LLP;
 946         u32 value2 = LPSS_PMCSR_D3hot;
 947         u32 mask2 = LPSS_PMCSR_Dx_MASK;
 948         /*
 949          * PMC provides an information about actual status of the LPSS devices.
 950          * Here we read the values related to LPSS power island, i.e. LPSS
 951          * devices, excluding both LPSS DMA controllers, along with SCC domain.
 952          */
 953         u32 func_dis, d3_sts_0, pmc_status;
 954         int ret;
 955
 956         ret = pmc_atom_read(PMC_FUNC_DIS, &func_dis);
 957         if (ret)
 958                 return;
 959
 960         mutex_lock(&lpss_iosf_mutex);
 961
 962         ret = pmc_atom_read(PMC_D3_STS_0, &d3_sts_0);
 963         if (ret)
 964                 goto exit;
 965
 966         /*
 967          * Get the status of entire LPSS power island per device basis.
 968          * Shutdown both LPSS DMA controllers if and only if all other devices
 969          * are already in D3hot.
 970          */
 971         pmc_status = (~(d3_sts_0 | func_dis)) & pmc_atom_d3_mask;
 972         if (pmc_status)
 973                 goto exit;
 974
 975         iosf_mbi_modify(LPSS_IOSF_UNIT_LPIO1, MBI_CFG_WRITE,
 976                         LPSS_IOSF_PMCSR, value2, mask2);
 977
 978         iosf_mbi_modify(LPSS_IOSF_UNIT_LPIO2, MBI_CFG_WRITE,
 979                         LPSS_IOSF_PMCSR, value2, mask2);
 980
 981         iosf_mbi_modify(LPSS_IOSF_UNIT_LPIOEP, MBI_CR_WRITE,
 982                         LPSS_IOSF_GPIODEF0, value1, mask1);
 983
 984         lpss_iosf_d3_entered = true;
 985
 986 exit:
 987         mutex_unlock(&lpss_iosf_mutex);
 988 }
 989
 990 static void lpss_iosf_exit_d3_state(void)
 991 {
 992         u32 value1 = LPSS_GPIODEF0_DMA1_D3 | LPSS_GPIODEF0_DMA2_D3 |
 993                      LPSS_GPIODEF0_DMA_LLP;
 994         u32 mask1 = LPSS_GPIODEF0_DMA_D3_MASK | LPSS_GPIODEF0_DMA_LLP;
 995         u32 value2 = LPSS_PMCSR_D0;
 996         u32 mask2 = LPSS_PMCSR_Dx_MASK;
 997
 998         mutex_lock(&lpss_iosf_mutex);
 999
1000         if (!lpss_iosf_d3_entered)
1001                 goto exit;
1002
1003         lpss_iosf_d3_entered = false;
1004
1005         iosf_mbi_modify(LPSS_IOSF_UNIT_LPIOEP, MBI_CR_WRITE,
1006                         LPSS_IOSF_GPIODEF0, value1, mask1);
1007
1008         iosf_mbi_modify(LPSS_IOSF_UNIT_LPIO2, MBI_CFG_WRITE,
1009                         LPSS_IOSF_PMCSR, value2, mask2);
1010
1011         iosf_mbi_modify(LPSS_IOSF_UNIT_LPIO1, MBI_CFG_WRITE,
1012                         LPSS_IOSF_PMCSR, value2, mask2);
1013
1014 exit:
1015         mutex_unlock(&lpss_iosf_mutex);
1016 }
1017
1018 static int acpi_lpss_suspend(struct device *dev, bool wakeup)
1019 {
1020         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1021         int ret;
1022
1023         if (pdata->dev_desc->flags & LPSS_SAVE_CTX)
1024                 acpi_lpss_save_ctx(dev, pdata);
1025
1026         ret = acpi_dev_suspend(dev, wakeup);
1027
1028         /*
1029          * This call must be last in the sequence, otherwise PMC will return
1030          * wrong status for devices being about to be powered off. See
1031          * lpss_iosf_enter_d3_state() for further information.
1032          */
1033         if (acpi_target_system_state() == ACPI_STATE_S0 &&
1034             lpss_quirks & LPSS_QUIRK_ALWAYS_POWER_ON && iosf_mbi_available())
1035                 lpss_iosf_enter_d3_state();
1036
1037         return ret;
1038 }
1039
1040 static int acpi_lpss_resume(struct device *dev)
1041 {
1042         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1043         int ret;
1044
1045         /*
1046          * This call is kept first to be in symmetry with
1047          * acpi_lpss_runtime_suspend() one.
1048          */
1049         if (lpss_quirks & LPSS_QUIRK_ALWAYS_POWER_ON && iosf_mbi_available())
1050                 lpss_iosf_exit_d3_state();
1051
1052         ret = acpi_dev_resume(dev);
1053         if (ret)
1054                 return ret;
1055
1056         acpi_lpss_d3_to_d0_delay(pdata);
1057
1058         if (pdata->dev_desc->flags & (LPSS_SAVE_CTX | LPSS_SAVE_CTX_ONCE))
1059                 acpi_lpss_restore_ctx(dev, pdata);
1060
1061         return 0;
1062 }
1063
1064 #ifdef CONFIG_PM_SLEEP
1065 static int acpi_lpss_do_suspend_late(struct device *dev)
1066 {
1067         int ret;
1068
1069         if (dev_pm_skip_suspend(dev))
1070                 return 0;
1071
1072         ret = pm_generic_suspend_late(dev);
1073         return ret ? ret : acpi_lpss_suspend(dev, device_may_wakeup(dev));
1074 }
1075
1076 static int acpi_lpss_suspend_late(struct device *dev)
1077 {
1078         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1079
1080         if (pdata->dev_desc->resume_from_noirq)
1081                 return 0;
1082
1083         return acpi_lpss_do_suspend_late(dev);
1084 }
1085
1086 static int acpi_lpss_suspend_noirq(struct device *dev)
1087 {
1088         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1089         int ret;
1090
1091         if (pdata->dev_desc->resume_from_noirq) {
1092                 /*
1093                  * The driver's ->suspend_late callback will be invoked by
1094                  * acpi_lpss_do_suspend_late(), with the assumption that the
1095                  * driver really wanted to run that code in ->suspend_noirq, but
1096                  * it could not run after acpi_dev_suspend() and the driver
1097                  * expected the latter to be called in the "late" phase.
1098                  */
1099                 ret = acpi_lpss_do_suspend_late(dev);
1100                 if (ret)
1101                         return ret;
1102         }
1103
1104         return acpi_subsys_suspend_noirq(dev);
1105 }
1106
1107 static int acpi_lpss_do_resume_early(struct device *dev)
1108 {
1109         int ret = acpi_lpss_resume(dev);
1110
1111         return ret ? ret : pm_generic_resume_early(dev);
1112 }
1113
1114 static int acpi_lpss_resume_early(struct device *dev)
1115 {
1116         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1117
1118         if (pdata->dev_desc->resume_from_noirq)
1119                 return 0;
1120
1121         if (dev_pm_skip_resume(dev))
1122                 return 0;
1123
1124         return acpi_lpss_do_resume_early(dev);
1125 }
1126
1127 static int acpi_lpss_resume_noirq(struct device *dev)
1128 {
1129         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1130         int ret;
1131
1132         /* Follow acpi_subsys_resume_noirq(). */
1133         if (dev_pm_skip_resume(dev))
1134                 return 0;
1135
1136         ret = pm_generic_resume_noirq(dev);
1137         if (ret)
1138                 return ret;
1139
1140         if (!pdata->dev_desc->resume_from_noirq)
1141                 return 0;
1142
1143         /*
1144          * The driver's ->resume_early callback will be invoked by
1145          * acpi_lpss_do_resume_early(), with the assumption that the driver
1146          * really wanted to run that code in ->resume_noirq, but it could not
1147          * run before acpi_dev_resume() and the driver expected the latter to be
1148          * called in the "early" phase.
1149          */
1150         return acpi_lpss_do_resume_early(dev);
1151 }
1152
1153 static int acpi_lpss_do_restore_early(struct device *dev)
1154 {
1155         int ret = acpi_lpss_resume(dev);
1156
1157         return ret ? ret : pm_generic_restore_early(dev);
1158 }
1159
1160 static int acpi_lpss_restore_early(struct device *dev)
1161 {
1162         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1163
1164         if (pdata->dev_desc->resume_from_noirq)
1165                 return 0;
1166
1167         return acpi_lpss_do_restore_early(dev);
1168 }
1169
1170 static int acpi_lpss_restore_noirq(struct device *dev)
1171 {
1172         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1173         int ret;
1174
1175         ret = pm_generic_restore_noirq(dev);
1176         if (ret)
1177                 return ret;
1178
1179         if (!pdata->dev_desc->resume_from_noirq)
1180                 return 0;
1181
1182         /* This is analogous to what happens in acpi_lpss_resume_noirq(). */
1183         return acpi_lpss_do_restore_early(dev);
1184 }
1185
1186 static int acpi_lpss_do_poweroff_late(struct device *dev)
1187 {
1188         int ret = pm_generic_poweroff_late(dev);
1189
1190         return ret ? ret : acpi_lpss_suspend(dev, device_may_wakeup(dev));
1191 }
1192
1193 static int acpi_lpss_poweroff_late(struct device *dev)
1194 {
1195         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1196
1197         if (dev_pm_skip_suspend(dev))
1198                 return 0;
1199
1200         if (pdata->dev_desc->resume_from_noirq)
1201                 return 0;
1202
1203         return acpi_lpss_do_poweroff_late(dev);
1204 }
1205
1206 static int acpi_lpss_poweroff_noirq(struct device *dev)
1207 {
1208         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1209
1210         if (dev_pm_skip_suspend(dev))
1211                 return 0;
1212
1213         if (pdata->dev_desc->resume_from_noirq) {
1214                 /* This is analogous to the acpi_lpss_suspend_noirq() case. */
1215                 int ret = acpi_lpss_do_poweroff_late(dev);
1216
1217                 if (ret)
1218                         return ret;
1219         }
1220
1221         return pm_generic_poweroff_noirq(dev);
1222 }
1223 #endif /* CONFIG_PM_SLEEP */
1224
1225 static int acpi_lpss_runtime_suspend(struct device *dev)
1226 {
1227         int ret = pm_generic_runtime_suspend(dev);
1228
1229         return ret ? ret : acpi_lpss_suspend(dev, true);
1230 }
1231
1232 static int acpi_lpss_runtime_resume(struct device *dev)
1233 {
1234         int ret = acpi_lpss_resume(dev);
1235
1236         return ret ? ret : pm_generic_runtime_resume(dev);
1237 }
1238 #endif /* CONFIG_PM */
1239
1240 static struct dev_pm_domain acpi_lpss_pm_domain = {
1241 #ifdef CONFIG_PM
1242         .activate = acpi_lpss_activate,
1243         .dismiss = acpi_lpss_dismiss,
1244 #endif
1245         .ops = {
1246 #ifdef CONFIG_PM
1247 #ifdef CONFIG_PM_SLEEP
1248                 .prepare = acpi_subsys_prepare,
1249                 .complete = acpi_subsys_complete,
1250                 .suspend = acpi_subsys_suspend,
1251                 .suspend_late = acpi_lpss_suspend_late,
1252                 .suspend_noirq = acpi_lpss_suspend_noirq,
1253                 .resume_noirq = acpi_lpss_resume_noirq,
1254                 .resume_early = acpi_lpss_resume_early,
1255                 .freeze = acpi_subsys_freeze,
1256                 .poweroff = acpi_subsys_poweroff,
1257                 .poweroff_late = acpi_lpss_poweroff_late,
1258                 .poweroff_noirq = acpi_lpss_poweroff_noirq,
1259                 .restore_noirq = acpi_lpss_restore_noirq,
1260                 .restore_early = acpi_lpss_restore_early,
1261 #endif
1262                 .runtime_suspend = acpi_lpss_runtime_suspend,
1263                 .runtime_resume = acpi_lpss_runtime_resume,
1264 #endif
1265         },
1266 };
1267
1268 static int acpi_lpss_platform_notify(struct notifier_block *nb,
1269                                      unsigned long action, void *data)
1270 {
1271         struct platform_device *pdev = to_platform_device(data);
1272         struct lpss_private_data *pdata;
1273         struct acpi_device *adev;
1274         const struct acpi_device_id *id;
1275
1276         id = acpi_match_device(acpi_lpss_device_ids, &pdev->dev);
1277         if (!id || !id->driver_data)
1278                 return 0;
1279
1280         adev = ACPI_COMPANION(&pdev->dev);
1281         if (!adev)
1282                 return 0;
1283
1284         pdata = acpi_driver_data(adev);
1285         if (!pdata)
1286                 return 0;
1287
1288         if (pdata->mmio_base &&
1289             pdata->mmio_size < pdata->dev_desc->prv_offset + LPSS_LTR_SIZE) {
1290                 dev_err(&pdev->dev, "MMIO size insufficient to access LTR\n");
1291                 return 0;
1292         }
1293
1294         switch (action) {
1295         case BUS_NOTIFY_BIND_DRIVER:
1296                 dev_pm_domain_set(&pdev->dev, &acpi_lpss_pm_domain);
1297                 break;
1298         case BUS_NOTIFY_DRIVER_NOT_BOUND:
1299         case BUS_NOTIFY_UNBOUND_DRIVER:
1300                 dev_pm_domain_set(&pdev->dev, NULL);
1301                 break;
1302         case BUS_NOTIFY_ADD_DEVICE:
1303                 dev_pm_domain_set(&pdev->dev, &acpi_lpss_pm_domain);
1304                 if (pdata->dev_desc->flags & LPSS_LTR)
1305                         return sysfs_create_group(&pdev->dev.kobj,
1306                                                   &lpss_attr_group);
1307                 break;
1308         case BUS_NOTIFY_DEL_DEVICE:
1309                 if (pdata->dev_desc->flags & LPSS_LTR)
1310                         sysfs_remove_group(&pdev->dev.kobj, &lpss_attr_group);
1311                 dev_pm_domain_set(&pdev->dev, NULL);
1312                 break;
1313         default:
1314                 break;
1315         }
1316
1317         return 0;
1318 }
1319
1320 static struct notifier_block acpi_lpss_nb = {
1321         .notifier_call = acpi_lpss_platform_notify,
1322 };
1323
1324 static void acpi_lpss_bind(struct device *dev)
1325 {
1326         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1327
1328         if (!pdata || !pdata->mmio_base || !(pdata->dev_desc->flags & LPSS_LTR))
1329                 return;
1330
1331         if (pdata->mmio_size >= pdata->dev_desc->prv_offset + LPSS_LTR_SIZE)
1332                 dev->power.set_latency_tolerance = acpi_lpss_set_ltr;
1333         else
1334                 dev_err(dev, "MMIO size insufficient to access LTR\n");
1335 }
1336
1337 static void acpi_lpss_unbind(struct device *dev)
1338 {
1339         dev->power.set_latency_tolerance = NULL;
1340 }
1341
1342 static struct acpi_scan_handler lpss_handler = {
1343         .ids = acpi_lpss_device_ids,
1344         .attach = acpi_lpss_create_device,
1345         .bind = acpi_lpss_bind,
1346         .unbind = acpi_lpss_unbind,
1347 };
1348
1349 void __init acpi_lpss_init(void)
1350 {
1351         const struct x86_cpu_id *id;
1352         int ret;
1353
1354         ret = lpss_atom_clk_init();
1355         if (ret)
1356                 return;
1357
1358         id = x86_match_cpu(lpss_cpu_ids);
1359         if (id)
1360                 lpss_quirks |= LPSS_QUIRK_ALWAYS_POWER_ON;
1361
1362         bus_register_notifier(&platform_bus_type, &acpi_lpss_nb);
1363         acpi_scan_add_handler(&lpss_handler);
1364 }
1365
1366 #else
1367
1368 static struct acpi_scan_handler lpss_handler = {
1369         .ids = acpi_lpss_device_ids,
1370 };
1371
1372 void __init acpi_lpss_init(void)
1373 {
1374         acpi_scan_add_handler(&lpss_handler);
1375 }
1376
1377 #endif /* CONFIG_X86_INTEL_LPSS */