drivers/acpi/acpi_lpss.c

   1 /*
   2  * ACPI support for Intel Lynxpoint LPSS.
   3  *
   4  * Copyright (C) 2013, Intel Corporation
   5  * Authors: Mika Westerberg <mika.westerberg@linux.intel.com>
   6  *          Rafael J. Wysocki <rafael.j.wysocki@intel.com>
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  */
  12
  13 #include <linux/acpi.h>
  14 #include <linux/clkdev.h>
  15 #include <linux/clk-provider.h>
  16 #include <linux/err.h>
  17 #include <linux/io.h>
  18 #include <linux/mutex.h>
  19 #include <linux/platform_device.h>
  20 #include <linux/platform_data/clk-lpss.h>
  21 #include <linux/platform_data/x86/pmc_atom.h>
  22 #include <linux/pm_domain.h>
  23 #include <linux/pm_runtime.h>
  24 #include <linux/pwm.h>
  25 #include <linux/suspend.h>
  26 #include <linux/delay.h>
  27
  28 #include "internal.h"
  29
  30 ACPI_MODULE_NAME("acpi_lpss");
  31
  32 #ifdef CONFIG_X86_INTEL_LPSS
  33
  34 #include <asm/cpu_device_id.h>
  35 #include <asm/intel-family.h>
  36 #include <asm/iosf_mbi.h>
  37
  38 #define LPSS_ADDR(desc) ((unsigned long)&desc)
  39
  40 #define LPSS_CLK_SIZE   0x04
  41 #define LPSS_LTR_SIZE   0x18
  42
  43 /* Offsets relative to LPSS_PRIVATE_OFFSET */
  44 #define LPSS_CLK_DIVIDER_DEF_MASK       (BIT(1) | BIT(16))
  45 #define LPSS_RESETS                     0x04
  46 #define LPSS_RESETS_RESET_FUNC          BIT(0)
  47 #define LPSS_RESETS_RESET_APB           BIT(1)
  48 #define LPSS_GENERAL                    0x08
  49 #define LPSS_GENERAL_LTR_MODE_SW        BIT(2)
  50 #define LPSS_GENERAL_UART_RTS_OVRD      BIT(3)
  51 #define LPSS_SW_LTR                     0x10
  52 #define LPSS_AUTO_LTR                   0x14
  53 #define LPSS_LTR_SNOOP_REQ              BIT(15)
  54 #define LPSS_LTR_SNOOP_MASK             0x0000FFFF
  55 #define LPSS_LTR_SNOOP_LAT_1US          0x800
  56 #define LPSS_LTR_SNOOP_LAT_32US         0xC00
  57 #define LPSS_LTR_SNOOP_LAT_SHIFT        5
  58 #define LPSS_LTR_SNOOP_LAT_CUTOFF       3000
  59 #define LPSS_LTR_MAX_VAL                0x3FF
  60 #define LPSS_TX_INT                     0x20
  61 #define LPSS_TX_INT_MASK                BIT(1)
  62
  63 #define LPSS_PRV_REG_COUNT              9
  64
  65 /* LPSS Flags */
  66 #define LPSS_CLK                        BIT(0)
  67 #define LPSS_CLK_GATE                   BIT(1)
  68 #define LPSS_CLK_DIVIDER                BIT(2)
  69 #define LPSS_LTR                        BIT(3)
  70 #define LPSS_SAVE_CTX                   BIT(4)
  71 #define LPSS_NO_D3_DELAY                BIT(5)
  72
  73 /* Crystal Cove PMIC shares same ACPI ID between different platforms */
  74 #define BYT_CRC_HRV                     2
  75 #define CHT_CRC_HRV                     3
  76
  77 struct lpss_private_data;
  78
  79 struct lpss_device_desc {
  80         unsigned int flags;
  81         const char *clk_con_id;
  82         unsigned int prv_offset;
  83         size_t prv_size_override;
  84         struct property_entry *properties;
  85         void (*setup)(struct lpss_private_data *pdata);
  86 };
  87
  88 static const struct lpss_device_desc lpss_dma_desc = {
  89         .flags = LPSS_CLK,
  90 };
  91
  92 struct lpss_private_data {
  93         struct acpi_device *adev;
  94         void __iomem *mmio_base;
  95         resource_size_t mmio_size;
  96         unsigned int fixed_clk_rate;
  97         struct clk *clk;
  98         const struct lpss_device_desc *dev_desc;
  99         u32 prv_reg_ctx[LPSS_PRV_REG_COUNT];
 100 };
 101
 102 /* LPSS run time quirks */
 103 static unsigned int lpss_quirks;
 104
 105 /*
 106  * LPSS_QUIRK_ALWAYS_POWER_ON: override power state for LPSS DMA device.
 107  *
 108  * The LPSS DMA controller has neither _PS0 nor _PS3 method. Moreover
 109  * it can be powered off automatically whenever the last LPSS device goes down.
 110  * In case of no power any access to the DMA controller will hang the system.
 111  * The behaviour is reproduced on some HP laptops based on Intel BayTrail as
 112  * well as on ASuS T100TA transformer.
 113  *
 114  * This quirk overrides power state of entire LPSS island to keep DMA powered
 115  * on whenever we have at least one other device in use.
 116  */
 117 #define LPSS_QUIRK_ALWAYS_POWER_ON      BIT(0)
 118
 119 /* UART Component Parameter Register */
 120 #define LPSS_UART_CPR                   0xF4
 121 #define LPSS_UART_CPR_AFCE              BIT(4)
 122
 123 static void lpss_uart_setup(struct lpss_private_data *pdata)
 124 {
 125         unsigned int offset;
 126         u32 val;
 127
 128         offset = pdata->dev_desc->prv_offset + LPSS_TX_INT;
 129         val = readl(pdata->mmio_base + offset);
 130         writel(val | LPSS_TX_INT_MASK, pdata->mmio_base + offset);
 131
 132         val = readl(pdata->mmio_base + LPSS_UART_CPR);
 133         if (!(val & LPSS_UART_CPR_AFCE)) {
 134                 offset = pdata->dev_desc->prv_offset + LPSS_GENERAL;
 135                 val = readl(pdata->mmio_base + offset);
 136                 val |= LPSS_GENERAL_UART_RTS_OVRD;
 137                 writel(val, pdata->mmio_base + offset);
 138         }
 139 }
 140
 141 static void lpss_deassert_reset(struct lpss_private_data *pdata)
 142 {
 143         unsigned int offset;
 144         u32 val;
 145
 146         offset = pdata->dev_desc->prv_offset + LPSS_RESETS;
 147         val = readl(pdata->mmio_base + offset);
 148         val |= LPSS_RESETS_RESET_APB | LPSS_RESETS_RESET_FUNC;
 149         writel(val, pdata->mmio_base + offset);
 150 }
 151
 152 /*
 153  * BYT PWM used for backlight control by the i915 driver on systems without
 154  * the Crystal Cove PMIC.
 155  */
 156 static struct pwm_lookup byt_pwm_lookup[] = {
 157         PWM_LOOKUP_WITH_MODULE("80860F09:00", 0, "0000:00:02.0",
 158                                "pwm_backlight", 0, PWM_POLARITY_NORMAL,
 159                                "pwm-lpss-platform"),
 160 };
 161
 162 static void byt_pwm_setup(struct lpss_private_data *pdata)
 163 {
 164         struct acpi_device *adev = pdata->adev;
 165
 166         /* Only call pwm_add_table for the first PWM controller */
 167         if (!adev->pnp.unique_id || strcmp(adev->pnp.unique_id, "1"))
 168                 return;
 169
 170         if (!acpi_dev_present("INT33FD", NULL, BYT_CRC_HRV))
 171                 pwm_add_table(byt_pwm_lookup, ARRAY_SIZE(byt_pwm_lookup));
 172 }
 173
 174 #define LPSS_I2C_ENABLE                 0x6c
 175
 176 static void byt_i2c_setup(struct lpss_private_data *pdata)
 177 {
 178         lpss_deassert_reset(pdata);
 179
 180         if (readl(pdata->mmio_base + pdata->dev_desc->prv_offset))
 181                 pdata->fixed_clk_rate = 133000000;
 182
 183         writel(0, pdata->mmio_base + LPSS_I2C_ENABLE);
 184 }
 185
 186 /* BSW PWM used for backlight control by the i915 driver */
 187 static struct pwm_lookup bsw_pwm_lookup[] = {
 188         PWM_LOOKUP_WITH_MODULE("80862288:00", 0, "0000:00:02.0",
 189                                "pwm_backlight", 0, PWM_POLARITY_NORMAL,
 190                                "pwm-lpss-platform"),
 191 };
 192
 193 static void bsw_pwm_setup(struct lpss_private_data *pdata)
 194 {
 195         struct acpi_device *adev = pdata->adev;
 196
 197         /* Only call pwm_add_table for the first PWM controller */
 198         if (!adev->pnp.unique_id || strcmp(adev->pnp.unique_id, "1"))
 199                 return;
 200
 201         pwm_add_table(bsw_pwm_lookup, ARRAY_SIZE(bsw_pwm_lookup));
 202 }
 203
 204 static const struct lpss_device_desc lpt_dev_desc = {
 205         .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_LTR,
 206         .prv_offset = 0x800,
 207 };
 208
 209 static const struct lpss_device_desc lpt_i2c_dev_desc = {
 210         .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_LTR,
 211         .prv_offset = 0x800,
 212 };
 213
 214 static struct property_entry uart_properties[] = {
 215         PROPERTY_ENTRY_U32("reg-io-width", 4),
 216         PROPERTY_ENTRY_U32("reg-shift", 2),
 217         PROPERTY_ENTRY_BOOL("snps,uart-16550-compatible"),
 218         { },
 219 };
 220
 221 static const struct lpss_device_desc lpt_uart_dev_desc = {
 222         .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_LTR,
 223         .clk_con_id = "baudclk",
 224         .prv_offset = 0x800,
 225         .setup = lpss_uart_setup,
 226         .properties = uart_properties,
 227 };
 228
 229 static const struct lpss_device_desc lpt_sdio_dev_desc = {
 230         .flags = LPSS_LTR,
 231         .prv_offset = 0x1000,
 232         .prv_size_override = 0x1018,
 233 };
 234
 235 static const struct lpss_device_desc byt_pwm_dev_desc = {
 236         .flags = LPSS_SAVE_CTX,
 237         .prv_offset = 0x800,
 238         .setup = byt_pwm_setup,
 239 };
 240
 241 static const struct lpss_device_desc bsw_pwm_dev_desc = {
 242         .flags = LPSS_SAVE_CTX | LPSS_NO_D3_DELAY,
 243         .prv_offset = 0x800,
 244         .setup = bsw_pwm_setup,
 245 };
 246
 247 static const struct lpss_device_desc byt_uart_dev_desc = {
 248         .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_SAVE_CTX,
 249         .clk_con_id = "baudclk",
 250         .prv_offset = 0x800,
 251         .setup = lpss_uart_setup,
 252         .properties = uart_properties,
 253 };
 254
 255 static const struct lpss_device_desc bsw_uart_dev_desc = {
 256         .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_SAVE_CTX
 257                         | LPSS_NO_D3_DELAY,
 258         .clk_con_id = "baudclk",
 259         .prv_offset = 0x800,
 260         .setup = lpss_uart_setup,
 261         .properties = uart_properties,
 262 };
 263
 264 static const struct lpss_device_desc byt_spi_dev_desc = {
 265         .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_SAVE_CTX,
 266         .prv_offset = 0x400,
 267 };
 268
 269 static const struct lpss_device_desc byt_sdio_dev_desc = {
 270         .flags = LPSS_CLK,
 271 };
 272
 273 static const struct lpss_device_desc byt_i2c_dev_desc = {
 274         .flags = LPSS_CLK | LPSS_SAVE_CTX,
 275         .prv_offset = 0x800,
 276         .setup = byt_i2c_setup,
 277 };
 278
 279 static const struct lpss_device_desc bsw_i2c_dev_desc = {
 280         .flags = LPSS_CLK | LPSS_SAVE_CTX | LPSS_NO_D3_DELAY,
 281         .prv_offset = 0x800,
 282         .setup = byt_i2c_setup,
 283 };
 284
 285 static const struct lpss_device_desc bsw_spi_dev_desc = {
 286         .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_SAVE_CTX
 287                         | LPSS_NO_D3_DELAY,
 288         .prv_offset = 0x400,
 289         .setup = lpss_deassert_reset,
 290 };
 291
 292 #define ICPU(model)     { X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, }
 293
 294 static const struct x86_cpu_id lpss_cpu_ids[] = {
 295         ICPU(INTEL_FAM6_ATOM_SILVERMONT),       /* Valleyview, Bay Trail */
 296         ICPU(INTEL_FAM6_ATOM_AIRMONT),  /* Braswell, Cherry Trail */
 297         {}
 298 };
 299
 300 #else
 301
 302 #define LPSS_ADDR(desc) (0UL)
 303
 304 #endif /* CONFIG_X86_INTEL_LPSS */
 305
 306 static const struct acpi_device_id acpi_lpss_device_ids[] = {
 307         /* Generic LPSS devices */
 308         { "INTL9C60", LPSS_ADDR(lpss_dma_desc) },
 309
 310         /* Lynxpoint LPSS devices */
 311         { "INT33C0", LPSS_ADDR(lpt_dev_desc) },
 312         { "INT33C1", LPSS_ADDR(lpt_dev_desc) },
 313         { "INT33C2", LPSS_ADDR(lpt_i2c_dev_desc) },
 314         { "INT33C3", LPSS_ADDR(lpt_i2c_dev_desc) },
 315         { "INT33C4", LPSS_ADDR(lpt_uart_dev_desc) },
 316         { "INT33C5", LPSS_ADDR(lpt_uart_dev_desc) },
 317         { "INT33C6", LPSS_ADDR(lpt_sdio_dev_desc) },
 318         { "INT33C7", },
 319
 320         /* BayTrail LPSS devices */
 321         { "80860F09", LPSS_ADDR(byt_pwm_dev_desc) },
 322         { "80860F0A", LPSS_ADDR(byt_uart_dev_desc) },
 323         { "80860F0E", LPSS_ADDR(byt_spi_dev_desc) },
 324         { "80860F14", LPSS_ADDR(byt_sdio_dev_desc) },
 325         { "80860F41", LPSS_ADDR(byt_i2c_dev_desc) },
 326         { "INT33B2", },
 327         { "INT33FC", },
 328
 329         /* Braswell LPSS devices */
 330         { "80862286", LPSS_ADDR(lpss_dma_desc) },
 331         { "80862288", LPSS_ADDR(bsw_pwm_dev_desc) },
 332         { "8086228A", LPSS_ADDR(bsw_uart_dev_desc) },
 333         { "8086228E", LPSS_ADDR(bsw_spi_dev_desc) },
 334         { "808622C0", LPSS_ADDR(lpss_dma_desc) },
 335         { "808622C1", LPSS_ADDR(bsw_i2c_dev_desc) },
 336
 337         /* Broadwell LPSS devices */
 338         { "INT3430", LPSS_ADDR(lpt_dev_desc) },
 339         { "INT3431", LPSS_ADDR(lpt_dev_desc) },
 340         { "INT3432", LPSS_ADDR(lpt_i2c_dev_desc) },
 341         { "INT3433", LPSS_ADDR(lpt_i2c_dev_desc) },
 342         { "INT3434", LPSS_ADDR(lpt_uart_dev_desc) },
 343         { "INT3435", LPSS_ADDR(lpt_uart_dev_desc) },
 344         { "INT3436", LPSS_ADDR(lpt_sdio_dev_desc) },
 345         { "INT3437", },
 346
 347         /* Wildcat Point LPSS devices */
 348         { "INT3438", LPSS_ADDR(lpt_dev_desc) },
 349
 350         { }
 351 };
 352
 353 #ifdef CONFIG_X86_INTEL_LPSS
 354
 355 static int is_memory(struct acpi_resource *res, void *not_used)
 356 {
 357         struct resource r;
 358         return !acpi_dev_resource_memory(res, &r);
 359 }
 360
 361 /* LPSS main clock device. */
 362 static struct platform_device *lpss_clk_dev;
 363
 364 static inline void lpt_register_clock_device(void)
 365 {
 366         lpss_clk_dev = platform_device_register_simple("clk-lpt", -1, NULL, 0);
 367 }
 368
 369 static int register_device_clock(struct acpi_device *adev,
 370                                  struct lpss_private_data *pdata)
 371 {
 372         const struct lpss_device_desc *dev_desc = pdata->dev_desc;
 373         const char *devname = dev_name(&adev->dev);
 374         struct clk *clk;
 375         struct lpss_clk_data *clk_data;
 376         const char *parent, *clk_name;
 377         void __iomem *prv_base;
 378
 379         if (!lpss_clk_dev)
 380                 lpt_register_clock_device();
 381
 382         clk_data = platform_get_drvdata(lpss_clk_dev);
 383         if (!clk_data)
 384                 return -ENODEV;
 385         clk = clk_data->clk;
 386
 387         if (!pdata->mmio_base
 388             || pdata->mmio_size < dev_desc->prv_offset + LPSS_CLK_SIZE)
 389                 return -ENODATA;
 390
 391         parent = clk_data->name;
 392         prv_base = pdata->mmio_base + dev_desc->prv_offset;
 393
 394         if (pdata->fixed_clk_rate) {
 395                 clk = clk_register_fixed_rate(NULL, devname, parent, 0,
 396                                               pdata->fixed_clk_rate);
 397                 goto out;
 398         }
 399
 400         if (dev_desc->flags & LPSS_CLK_GATE) {
 401                 clk = clk_register_gate(NULL, devname, parent, 0,
 402                                         prv_base, 0, 0, NULL);
 403                 parent = devname;
 404         }
 405
 406         if (dev_desc->flags & LPSS_CLK_DIVIDER) {
 407                 /* Prevent division by zero */
 408                 if (!readl(prv_base))
 409                         writel(LPSS_CLK_DIVIDER_DEF_MASK, prv_base);
 410
 411                 clk_name = kasprintf(GFP_KERNEL, "%s-div", devname);
 412                 if (!clk_name)
 413                         return -ENOMEM;
 414                 clk = clk_register_fractional_divider(NULL, clk_name, parent,
 415                                                       0, prv_base,
 416                                                       1, 15, 16, 15, 0, NULL);
 417                 parent = clk_name;
 418
 419                 clk_name = kasprintf(GFP_KERNEL, "%s-update", devname);
 420                 if (!clk_name) {
 421                         kfree(parent);
 422                         return -ENOMEM;
 423                 }
 424                 clk = clk_register_gate(NULL, clk_name, parent,
 425                                         CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE,
 426                                         prv_base, 31, 0, NULL);
 427                 kfree(parent);
 428                 kfree(clk_name);
 429         }
 430 out:
 431         if (IS_ERR(clk))
 432                 return PTR_ERR(clk);
 433
 434         pdata->clk = clk;
 435         clk_register_clkdev(clk, dev_desc->clk_con_id, devname);
 436         return 0;
 437 }
 438
 439 struct lpss_device_links {
 440         const char *supplier_hid;
 441         const char *supplier_uid;
 442         const char *consumer_hid;
 443         const char *consumer_uid;
 444         u32 flags;
 445 };
 446
 447 /*
 448  * The _DEP method is used to identify dependencies but instead of creating
 449  * device links for every handle in _DEP, only links in the following list are
 450  * created. That is necessary because, in the general case, _DEP can refer to
 451  * devices that might not have drivers, or that are on different buses, or where
 452  * the supplier is not enumerated until after the consumer is probed.
 453  */
 454 static const struct lpss_device_links lpss_device_links[] = {
 455         {"808622C1", "7", "80860F14", "3", DL_FLAG_PM_RUNTIME},
 456 };
 457
 458 static bool hid_uid_match(const char *hid1, const char *uid1,
 459                           const char *hid2, const char *uid2)
 460 {
 461         return !strcmp(hid1, hid2) && uid1 && uid2 && !strcmp(uid1, uid2);
 462 }
 463
 464 static bool acpi_lpss_is_supplier(struct acpi_device *adev,
 465                                   const struct lpss_device_links *link)
 466 {
 467         return hid_uid_match(acpi_device_hid(adev), acpi_device_uid(adev),
 468                              link->supplier_hid, link->supplier_uid);
 469 }
 470
 471 static bool acpi_lpss_is_consumer(struct acpi_device *adev,
 472                                   const struct lpss_device_links *link)
 473 {
 474         return hid_uid_match(acpi_device_hid(adev), acpi_device_uid(adev),
 475                              link->consumer_hid, link->consumer_uid);
 476 }
 477
 478 struct hid_uid {
 479         const char *hid;
 480         const char *uid;
 481 };
 482
 483 static int match_hid_uid(struct device *dev, void *data)
 484 {
 485         struct acpi_device *adev = ACPI_COMPANION(dev);
 486         struct hid_uid *id = data;
 487
 488         if (!adev)
 489                 return 0;
 490
 491         return hid_uid_match(acpi_device_hid(adev), acpi_device_uid(adev),
 492                              id->hid, id->uid);
 493 }
 494
 495 static struct device *acpi_lpss_find_device(const char *hid, const char *uid)
 496 {
 497         struct hid_uid data = {
 498                 .hid = hid,
 499                 .uid = uid,
 500         };
 501
 502         return bus_find_device(&platform_bus_type, NULL, &data, match_hid_uid);
 503 }
 504
 505 static bool acpi_lpss_dep(struct acpi_device *adev, acpi_handle handle)
 506 {
 507         struct acpi_handle_list dep_devices;
 508         acpi_status status;
 509         int i;
 510
 511         if (!acpi_has_method(adev->handle, "_DEP"))
 512                 return false;
 513
 514         status = acpi_evaluate_reference(adev->handle, "_DEP", NULL,
 515                                          &dep_devices);
 516         if (ACPI_FAILURE(status)) {
 517                 dev_dbg(&adev->dev, "Failed to evaluate _DEP.\n");
 518                 return false;
 519         }
 520
 521         for (i = 0; i < dep_devices.count; i++) {
 522                 if (dep_devices.handles[i] == handle)
 523                         return true;
 524         }
 525
 526         return false;
 527 }
 528
 529 static void acpi_lpss_link_consumer(struct device *dev1,
 530                                     const struct lpss_device_links *link)
 531 {
 532         struct device *dev2;
 533
 534         dev2 = acpi_lpss_find_device(link->consumer_hid, link->consumer_uid);
 535         if (!dev2)
 536                 return;
 537
 538         if (acpi_lpss_dep(ACPI_COMPANION(dev2), ACPI_HANDLE(dev1)))
 539                 device_link_add(dev2, dev1, link->flags);
 540
 541         put_device(dev2);
 542 }
 543
 544 static void acpi_lpss_link_supplier(struct device *dev1,
 545                                     const struct lpss_device_links *link)
 546 {
 547         struct device *dev2;
 548
 549         dev2 = acpi_lpss_find_device(link->supplier_hid, link->supplier_uid);
 550         if (!dev2)
 551                 return;
 552
 553         if (acpi_lpss_dep(ACPI_COMPANION(dev1), ACPI_HANDLE(dev2)))
 554                 device_link_add(dev1, dev2, link->flags);
 555
 556         put_device(dev2);
 557 }
 558
 559 static void acpi_lpss_create_device_links(struct acpi_device *adev,
 560                                           struct platform_device *pdev)
 561 {
 562         int i;
 563
 564         for (i = 0; i < ARRAY_SIZE(lpss_device_links); i++) {
 565                 const struct lpss_device_links *link = &lpss_device_links[i];
 566
 567                 if (acpi_lpss_is_supplier(adev, link))
 568                         acpi_lpss_link_consumer(&pdev->dev, link);
 569
 570                 if (acpi_lpss_is_consumer(adev, link))
 571                         acpi_lpss_link_supplier(&pdev->dev, link);
 572         }
 573 }
 574
 575 static int acpi_lpss_create_device(struct acpi_device *adev,
 576                                    const struct acpi_device_id *id)
 577 {
 578         const struct lpss_device_desc *dev_desc;
 579         struct lpss_private_data *pdata;
 580         struct resource_entry *rentry;
 581         struct list_head resource_list;
 582         struct platform_device *pdev;
 583         int ret;
 584
 585         dev_desc = (const struct lpss_device_desc *)id->driver_data;
 586         if (!dev_desc) {
 587                 pdev = acpi_create_platform_device(adev, NULL);
 588                 return IS_ERR_OR_NULL(pdev) ? PTR_ERR(pdev) : 1;
 589         }
 590         pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
 591         if (!pdata)
 592                 return -ENOMEM;
 593
 594         INIT_LIST_HEAD(&resource_list);
 595         ret = acpi_dev_get_resources(adev, &resource_list, is_memory, NULL);
 596         if (ret < 0)
 597                 goto err_out;
 598
 599         list_for_each_entry(rentry, &resource_list, node)
 600                 if (resource_type(rentry->res) == IORESOURCE_MEM) {
 601                         if (dev_desc->prv_size_override)
 602                                 pdata->mmio_size = dev_desc->prv_size_override;
 603                         else
 604                                 pdata->mmio_size = resource_size(rentry->res);
 605                         pdata->mmio_base = ioremap(rentry->res->start,
 606                                                    pdata->mmio_size);
 607                         break;
 608                 }
 609
 610         acpi_dev_free_resource_list(&resource_list);
 611
 612         if (!pdata->mmio_base) {
 613                 /* Avoid acpi_bus_attach() instantiating a pdev for this dev. */
 614                 adev->pnp.type.platform_id = 0;
 615                 /* Skip the device, but continue the namespace scan. */
 616                 ret = 0;
 617                 goto err_out;
 618         }
 619
 620         pdata->adev = adev;
 621         pdata->dev_desc = dev_desc;
 622
 623         if (dev_desc->setup)
 624                 dev_desc->setup(pdata);
 625
 626         if (dev_desc->flags & LPSS_CLK) {
 627                 ret = register_device_clock(adev, pdata);
 628                 if (ret) {
 629                         /* Skip the device, but continue the namespace scan. */
 630                         ret = 0;
 631                         goto err_out;
 632                 }
 633         }
 634
 635         /*
 636          * This works around a known issue in ACPI tables where LPSS devices
 637          * have _PS0 and _PS3 without _PSC (and no power resources), so
 638          * acpi_bus_init_power() will assume that the BIOS has put them into D0.
 639          */
 640         ret = acpi_device_fix_up_power(adev);
 641         if (ret) {
 642                 /* Skip the device, but continue the namespace scan. */
 643                 ret = 0;
 644                 goto err_out;
 645         }
 646
 647         adev->driver_data = pdata;
 648         pdev = acpi_create_platform_device(adev, dev_desc->properties);
 649         if (!IS_ERR_OR_NULL(pdev)) {
 650                 acpi_lpss_create_device_links(adev, pdev);
 651                 return 1;
 652         }
 653
 654         ret = PTR_ERR(pdev);
 655         adev->driver_data = NULL;
 656
 657  err_out:
 658         kfree(pdata);
 659         return ret;
 660 }
 661
 662 static u32 __lpss_reg_read(struct lpss_private_data *pdata, unsigned int reg)
 663 {
 664         return readl(pdata->mmio_base + pdata->dev_desc->prv_offset + reg);
 665 }
 666
 667 static void __lpss_reg_write(u32 val, struct lpss_private_data *pdata,
 668                              unsigned int reg)
 669 {
 670         writel(val, pdata->mmio_base + pdata->dev_desc->prv_offset + reg);
 671 }
 672
 673 static int lpss_reg_read(struct device *dev, unsigned int reg, u32 *val)
 674 {
 675         struct acpi_device *adev;
 676         struct lpss_private_data *pdata;
 677         unsigned long flags;
 678         int ret;
 679
 680         ret = acpi_bus_get_device(ACPI_HANDLE(dev), &adev);
 681         if (WARN_ON(ret))
 682                 return ret;
 683
 684         spin_lock_irqsave(&dev->power.lock, flags);
 685         if (pm_runtime_suspended(dev)) {
 686                 ret = -EAGAIN;
 687                 goto out;
 688         }
 689         pdata = acpi_driver_data(adev);
 690         if (WARN_ON(!pdata || !pdata->mmio_base)) {
 691                 ret = -ENODEV;
 692                 goto out;
 693         }
 694         *val = __lpss_reg_read(pdata, reg);
 695
 696  out:
 697         spin_unlock_irqrestore(&dev->power.lock, flags);
 698         return ret;
 699 }
 700
 701 static ssize_t lpss_ltr_show(struct device *dev, struct device_attribute *attr,
 702                              char *buf)
 703 {
 704         u32 ltr_value = 0;
 705         unsigned int reg;
 706         int ret;
 707
 708         reg = strcmp(attr->attr.name, "auto_ltr") ? LPSS_SW_LTR : LPSS_AUTO_LTR;
 709         ret = lpss_reg_read(dev, reg, &ltr_value);
 710         if (ret)
 711                 return ret;
 712
 713         return snprintf(buf, PAGE_SIZE, "%08x\n", ltr_value);
 714 }
 715
 716 static ssize_t lpss_ltr_mode_show(struct device *dev,
 717                                   struct device_attribute *attr, char *buf)
 718 {
 719         u32 ltr_mode = 0;
 720         char *outstr;
 721         int ret;
 722
 723         ret = lpss_reg_read(dev, LPSS_GENERAL, &ltr_mode);
 724         if (ret)
 725                 return ret;
 726
 727         outstr = (ltr_mode & LPSS_GENERAL_LTR_MODE_SW) ? "sw" : "auto";
 728         return sprintf(buf, "%s\n", outstr);
 729 }
 730
 731 static DEVICE_ATTR(auto_ltr, S_IRUSR, lpss_ltr_show, NULL);
 732 static DEVICE_ATTR(sw_ltr, S_IRUSR, lpss_ltr_show, NULL);
 733 static DEVICE_ATTR(ltr_mode, S_IRUSR, lpss_ltr_mode_show, NULL);
 734
 735 static struct attribute *lpss_attrs[] = {
 736         &dev_attr_auto_ltr.attr,
 737         &dev_attr_sw_ltr.attr,
 738         &dev_attr_ltr_mode.attr,
 739         NULL,
 740 };
 741
 742 static const struct attribute_group lpss_attr_group = {
 743         .attrs = lpss_attrs,
 744         .name = "lpss_ltr",
 745 };
 746
 747 static void acpi_lpss_set_ltr(struct device *dev, s32 val)
 748 {
 749         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
 750         u32 ltr_mode, ltr_val;
 751
 752         ltr_mode = __lpss_reg_read(pdata, LPSS_GENERAL);
 753         if (val < 0) {
 754                 if (ltr_mode & LPSS_GENERAL_LTR_MODE_SW) {
 755                         ltr_mode &= ~LPSS_GENERAL_LTR_MODE_SW;
 756                         __lpss_reg_write(ltr_mode, pdata, LPSS_GENERAL);
 757                 }
 758                 return;
 759         }
 760         ltr_val = __lpss_reg_read(pdata, LPSS_SW_LTR) & ~LPSS_LTR_SNOOP_MASK;
 761         if (val >= LPSS_LTR_SNOOP_LAT_CUTOFF) {
 762                 ltr_val |= LPSS_LTR_SNOOP_LAT_32US;
 763                 val = LPSS_LTR_MAX_VAL;
 764         } else if (val > LPSS_LTR_MAX_VAL) {
 765                 ltr_val |= LPSS_LTR_SNOOP_LAT_32US | LPSS_LTR_SNOOP_REQ;
 766                 val >>= LPSS_LTR_SNOOP_LAT_SHIFT;
 767         } else {
 768                 ltr_val |= LPSS_LTR_SNOOP_LAT_1US | LPSS_LTR_SNOOP_REQ;
 769         }
 770         ltr_val |= val;
 771         __lpss_reg_write(ltr_val, pdata, LPSS_SW_LTR);
 772         if (!(ltr_mode & LPSS_GENERAL_LTR_MODE_SW)) {
 773                 ltr_mode |= LPSS_GENERAL_LTR_MODE_SW;
 774                 __lpss_reg_write(ltr_mode, pdata, LPSS_GENERAL);
 775         }
 776 }
 777
 778 #ifdef CONFIG_PM
 779 /**
 780  * acpi_lpss_save_ctx() - Save the private registers of LPSS device
 781  * @dev: LPSS device
 782  * @pdata: pointer to the private data of the LPSS device
 783  *
 784  * Most LPSS devices have private registers which may loose their context when
 785  * the device is powered down. acpi_lpss_save_ctx() saves those registers into
 786  * prv_reg_ctx array.
 787  */
 788 static void acpi_lpss_save_ctx(struct device *dev,
 789                                struct lpss_private_data *pdata)
 790 {
 791         unsigned int i;
 792
 793         for (i = 0; i < LPSS_PRV_REG_COUNT; i++) {
 794                 unsigned long offset = i * sizeof(u32);
 795
 796                 pdata->prv_reg_ctx[i] = __lpss_reg_read(pdata, offset);
 797                 dev_dbg(dev, "saving 0x%08x from LPSS reg at offset 0x%02lx\n",
 798                         pdata->prv_reg_ctx[i], offset);
 799         }
 800 }
 801
 802 /**
 803  * acpi_lpss_restore_ctx() - Restore the private registers of LPSS device
 804  * @dev: LPSS device
 805  * @pdata: pointer to the private data of the LPSS device
 806  *
 807  * Restores the registers that were previously stored with acpi_lpss_save_ctx().
 808  */
 809 static void acpi_lpss_restore_ctx(struct device *dev,
 810                                   struct lpss_private_data *pdata)
 811 {
 812         unsigned int i;
 813
 814         for (i = 0; i < LPSS_PRV_REG_COUNT; i++) {
 815                 unsigned long offset = i * sizeof(u32);
 816
 817                 __lpss_reg_write(pdata->prv_reg_ctx[i], pdata, offset);
 818                 dev_dbg(dev, "restoring 0x%08x to LPSS reg at offset 0x%02lx\n",
 819                         pdata->prv_reg_ctx[i], offset);
 820         }
 821 }
 822
 823 static void acpi_lpss_d3_to_d0_delay(struct lpss_private_data *pdata)
 824 {
 825         /*
 826          * The following delay is needed or the subsequent write operations may
 827          * fail. The LPSS devices are actually PCI devices and the PCI spec
 828          * expects 10ms delay before the device can be accessed after D3 to D0
 829          * transition. However some platforms like BSW does not need this delay.
 830          */
 831         unsigned int delay = 10;        /* default 10ms delay */
 832
 833         if (pdata->dev_desc->flags & LPSS_NO_D3_DELAY)
 834                 delay = 0;
 835
 836         msleep(delay);
 837 }
 838
 839 static int acpi_lpss_activate(struct device *dev)
 840 {
 841         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
 842         int ret;
 843
 844         ret = acpi_dev_resume(dev);
 845         if (ret)
 846                 return ret;
 847
 848         acpi_lpss_d3_to_d0_delay(pdata);
 849
 850         /*
 851          * This is called only on ->probe() stage where a device is either in
 852          * known state defined by BIOS or most likely powered off. Due to this
 853          * we have to deassert reset line to be sure that ->probe() will
 854          * recognize the device.
 855          */
 856         if (pdata->dev_desc->flags & LPSS_SAVE_CTX)
 857                 lpss_deassert_reset(pdata);
 858
 859         return 0;
 860 }
 861
 862 static void acpi_lpss_dismiss(struct device *dev)
 863 {
 864         acpi_dev_suspend(dev, false);
 865 }
 866
 867 /* IOSF SB for LPSS island */
 868 #define LPSS_IOSF_UNIT_LPIOEP           0xA0
 869 #define LPSS_IOSF_UNIT_LPIO1            0xAB
 870 #define LPSS_IOSF_UNIT_LPIO2            0xAC
 871
 872 #define LPSS_IOSF_PMCSR                 0x84
 873 #define LPSS_PMCSR_D0                   0
 874 #define LPSS_PMCSR_D3hot                3
 875 #define LPSS_PMCSR_Dx_MASK              GENMASK(1, 0)
 876
 877 #define LPSS_IOSF_GPIODEF0              0x154
 878 #define LPSS_GPIODEF0_DMA1_D3           BIT(2)
 879 #define LPSS_GPIODEF0_DMA2_D3           BIT(3)
 880 #define LPSS_GPIODEF0_DMA_D3_MASK       GENMASK(3, 2)
 881 #define LPSS_GPIODEF0_DMA_LLP           BIT(13)
 882
 883 static DEFINE_MUTEX(lpss_iosf_mutex);
 884 static bool lpss_iosf_d3_entered = true;
 885
 886 static void lpss_iosf_enter_d3_state(void)
 887 {
 888         u32 value1 = 0;
 889         u32 mask1 = LPSS_GPIODEF0_DMA_D3_MASK | LPSS_GPIODEF0_DMA_LLP;
 890         u32 value2 = LPSS_PMCSR_D3hot;
 891         u32 mask2 = LPSS_PMCSR_Dx_MASK;
 892         /*
 893          * PMC provides an information about actual status of the LPSS devices.
 894          * Here we read the values related to LPSS power island, i.e. LPSS
 895          * devices, excluding both LPSS DMA controllers, along with SCC domain.
 896          */
 897         u32 func_dis, d3_sts_0, pmc_status, pmc_mask = 0xfe000ffe;
 898         int ret;
 899
 900         ret = pmc_atom_read(PMC_FUNC_DIS, &func_dis);
 901         if (ret)
 902                 return;
 903
 904         mutex_lock(&lpss_iosf_mutex);
 905
 906         ret = pmc_atom_read(PMC_D3_STS_0, &d3_sts_0);
 907         if (ret)
 908                 goto exit;
 909
 910         /*
 911          * Get the status of entire LPSS power island per device basis.
 912          * Shutdown both LPSS DMA controllers if and only if all other devices
 913          * are already in D3hot.
 914          */
 915         pmc_status = (~(d3_sts_0 | func_dis)) & pmc_mask;
 916         if (pmc_status)
 917                 goto exit;
 918
 919         iosf_mbi_modify(LPSS_IOSF_UNIT_LPIO1, MBI_CFG_WRITE,
 920                         LPSS_IOSF_PMCSR, value2, mask2);
 921
 922         iosf_mbi_modify(LPSS_IOSF_UNIT_LPIO2, MBI_CFG_WRITE,
 923                         LPSS_IOSF_PMCSR, value2, mask2);
 924
 925         iosf_mbi_modify(LPSS_IOSF_UNIT_LPIOEP, MBI_CR_WRITE,
 926                         LPSS_IOSF_GPIODEF0, value1, mask1);
 927
 928         lpss_iosf_d3_entered = true;
 929
 930 exit:
 931         mutex_unlock(&lpss_iosf_mutex);
 932 }
 933
 934 static void lpss_iosf_exit_d3_state(void)
 935 {
 936         u32 value1 = LPSS_GPIODEF0_DMA1_D3 | LPSS_GPIODEF0_DMA2_D3 |
 937                      LPSS_GPIODEF0_DMA_LLP;
 938         u32 mask1 = LPSS_GPIODEF0_DMA_D3_MASK | LPSS_GPIODEF0_DMA_LLP;
 939         u32 value2 = LPSS_PMCSR_D0;
 940         u32 mask2 = LPSS_PMCSR_Dx_MASK;
 941
 942         mutex_lock(&lpss_iosf_mutex);
 943
 944         if (!lpss_iosf_d3_entered)
 945                 goto exit;
 946
 947         lpss_iosf_d3_entered = false;
 948
 949         iosf_mbi_modify(LPSS_IOSF_UNIT_LPIOEP, MBI_CR_WRITE,
 950                         LPSS_IOSF_GPIODEF0, value1, mask1);
 951
 952         iosf_mbi_modify(LPSS_IOSF_UNIT_LPIO2, MBI_CFG_WRITE,
 953                         LPSS_IOSF_PMCSR, value2, mask2);
 954
 955         iosf_mbi_modify(LPSS_IOSF_UNIT_LPIO1, MBI_CFG_WRITE,
 956                         LPSS_IOSF_PMCSR, value2, mask2);
 957
 958 exit:
 959         mutex_unlock(&lpss_iosf_mutex);
 960 }
 961
 962 static int acpi_lpss_suspend(struct device *dev, bool wakeup)
 963 {
 964         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
 965         int ret;
 966
 967         if (pdata->dev_desc->flags & LPSS_SAVE_CTX)
 968                 acpi_lpss_save_ctx(dev, pdata);
 969
 970         ret = acpi_dev_suspend(dev, wakeup);
 971
 972         /*
 973          * This call must be last in the sequence, otherwise PMC will return
 974          * wrong status for devices being about to be powered off. See
 975          * lpss_iosf_enter_d3_state() for further information.
 976          */
 977         if (acpi_target_system_state() == ACPI_STATE_S0 &&
 978             lpss_quirks & LPSS_QUIRK_ALWAYS_POWER_ON && iosf_mbi_available())
 979                 lpss_iosf_enter_d3_state();
 980
 981         return ret;
 982 }
 983
 984 static int acpi_lpss_resume(struct device *dev)
 985 {
 986         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
 987         int ret;
 988
 989         /*
 990          * This call is kept first to be in symmetry with
 991          * acpi_lpss_runtime_suspend() one.
 992          */
 993         if (lpss_quirks & LPSS_QUIRK_ALWAYS_POWER_ON && iosf_mbi_available())
 994                 lpss_iosf_exit_d3_state();
 995
 996         ret = acpi_dev_resume(dev);
 997         if (ret)
 998                 return ret;
 999
1000         acpi_lpss_d3_to_d0_delay(pdata);
1001
1002         if (pdata->dev_desc->flags & LPSS_SAVE_CTX)
1003                 acpi_lpss_restore_ctx(dev, pdata);
1004
1005         return 0;
1006 }
1007
1008 #ifdef CONFIG_PM_SLEEP
1009 static int acpi_lpss_suspend_late(struct device *dev)
1010 {
1011         int ret;
1012
1013         if (dev_pm_smart_suspend_and_suspended(dev))
1014                 return 0;
1015
1016         ret = pm_generic_suspend_late(dev);
1017         return ret ? ret : acpi_lpss_suspend(dev, device_may_wakeup(dev));
1018 }
1019
1020 static int acpi_lpss_resume_early(struct device *dev)
1021 {
1022         int ret = acpi_lpss_resume(dev);
1023
1024         return ret ? ret : pm_generic_resume_early(dev);
1025 }
1026 #endif /* CONFIG_PM_SLEEP */
1027
1028 static int acpi_lpss_runtime_suspend(struct device *dev)
1029 {
1030         int ret = pm_generic_runtime_suspend(dev);
1031
1032         return ret ? ret : acpi_lpss_suspend(dev, true);
1033 }
1034
1035 static int acpi_lpss_runtime_resume(struct device *dev)
1036 {
1037         int ret = acpi_lpss_resume(dev);
1038
1039         return ret ? ret : pm_generic_runtime_resume(dev);
1040 }
1041 #endif /* CONFIG_PM */
1042
1043 static struct dev_pm_domain acpi_lpss_pm_domain = {
1044 #ifdef CONFIG_PM
1045         .activate = acpi_lpss_activate,
1046         .dismiss = acpi_lpss_dismiss,
1047 #endif
1048         .ops = {
1049 #ifdef CONFIG_PM
1050 #ifdef CONFIG_PM_SLEEP
1051                 .prepare = acpi_subsys_prepare,
1052                 .complete = acpi_subsys_complete,
1053                 .suspend = acpi_subsys_suspend,
1054                 .suspend_late = acpi_lpss_suspend_late,
1055                 .suspend_noirq = acpi_subsys_suspend_noirq,
1056                 .resume_noirq = acpi_subsys_resume_noirq,
1057                 .resume_early = acpi_lpss_resume_early,
1058                 .freeze = acpi_subsys_freeze,
1059                 .freeze_late = acpi_subsys_freeze_late,
1060                 .freeze_noirq = acpi_subsys_freeze_noirq,
1061                 .thaw_noirq = acpi_subsys_thaw_noirq,
1062                 .poweroff = acpi_subsys_suspend,
1063                 .poweroff_late = acpi_lpss_suspend_late,
1064                 .poweroff_noirq = acpi_subsys_suspend_noirq,
1065                 .restore_noirq = acpi_subsys_resume_noirq,
1066                 .restore_early = acpi_lpss_resume_early,
1067 #endif
1068                 .runtime_suspend = acpi_lpss_runtime_suspend,
1069                 .runtime_resume = acpi_lpss_runtime_resume,
1070 #endif
1071         },
1072 };
1073
1074 static int acpi_lpss_platform_notify(struct notifier_block *nb,
1075                                      unsigned long action, void *data)
1076 {
1077         struct platform_device *pdev = to_platform_device(data);
1078         struct lpss_private_data *pdata;
1079         struct acpi_device *adev;
1080         const struct acpi_device_id *id;
1081
1082         id = acpi_match_device(acpi_lpss_device_ids, &pdev->dev);
1083         if (!id || !id->driver_data)
1084                 return 0;
1085
1086         if (acpi_bus_get_device(ACPI_HANDLE(&pdev->dev), &adev))
1087                 return 0;
1088
1089         pdata = acpi_driver_data(adev);
1090         if (!pdata)
1091                 return 0;
1092
1093         if (pdata->mmio_base &&
1094             pdata->mmio_size < pdata->dev_desc->prv_offset + LPSS_LTR_SIZE) {
1095                 dev_err(&pdev->dev, "MMIO size insufficient to access LTR\n");
1096                 return 0;
1097         }
1098
1099         switch (action) {
1100         case BUS_NOTIFY_BIND_DRIVER:
1101                 dev_pm_domain_set(&pdev->dev, &acpi_lpss_pm_domain);
1102                 break;
1103         case BUS_NOTIFY_DRIVER_NOT_BOUND:
1104         case BUS_NOTIFY_UNBOUND_DRIVER:
1105                 dev_pm_domain_set(&pdev->dev, NULL);
1106                 break;
1107         case BUS_NOTIFY_ADD_DEVICE:
1108                 dev_pm_domain_set(&pdev->dev, &acpi_lpss_pm_domain);
1109                 if (pdata->dev_desc->flags & LPSS_LTR)
1110                         return sysfs_create_group(&pdev->dev.kobj,
1111                                                   &lpss_attr_group);
1112                 break;
1113         case BUS_NOTIFY_DEL_DEVICE:
1114                 if (pdata->dev_desc->flags & LPSS_LTR)
1115                         sysfs_remove_group(&pdev->dev.kobj, &lpss_attr_group);
1116                 dev_pm_domain_set(&pdev->dev, NULL);
1117                 break;
1118         default:
1119                 break;
1120         }
1121
1122         return 0;
1123 }
1124
1125 static struct notifier_block acpi_lpss_nb = {
1126         .notifier_call = acpi_lpss_platform_notify,
1127 };
1128
1129 static void acpi_lpss_bind(struct device *dev)
1130 {
1131         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1132
1133         if (!pdata || !pdata->mmio_base || !(pdata->dev_desc->flags & LPSS_LTR))
1134                 return;
1135
1136         if (pdata->mmio_size >= pdata->dev_desc->prv_offset + LPSS_LTR_SIZE)
1137                 dev->power.set_latency_tolerance = acpi_lpss_set_ltr;
1138         else
1139                 dev_err(dev, "MMIO size insufficient to access LTR\n");
1140 }
1141
1142 static void acpi_lpss_unbind(struct device *dev)
1143 {
1144         dev->power.set_latency_tolerance = NULL;
1145 }
1146
1147 static struct acpi_scan_handler lpss_handler = {
1148         .ids = acpi_lpss_device_ids,
1149         .attach = acpi_lpss_create_device,
1150         .bind = acpi_lpss_bind,
1151         .unbind = acpi_lpss_unbind,
1152 };
1153
1154 void __init acpi_lpss_init(void)
1155 {
1156         const struct x86_cpu_id *id;
1157         int ret;
1158
1159         ret = lpt_clk_init();
1160         if (ret)
1161                 return;
1162
1163         id = x86_match_cpu(lpss_cpu_ids);
1164         if (id)
1165                 lpss_quirks |= LPSS_QUIRK_ALWAYS_POWER_ON;
1166
1167         bus_register_notifier(&platform_bus_type, &acpi_lpss_nb);
1168         acpi_scan_add_handler(&lpss_handler);
1169 }
1170
1171 #else
1172
1173 static struct acpi_scan_handler lpss_handler = {
1174         .ids = acpi_lpss_device_ids,
1175 };
1176
1177 void __init acpi_lpss_init(void)
1178 {
1179         acpi_scan_add_handler(&lpss_handler);
1180 }
1181
1182 #endif /* CONFIG_X86_INTEL_LPSS */