1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2020-2023 Intel Corporation
6 #include <linux/genalloc.h>
7 #include <linux/highmem.h>
8 #include <linux/kthread.h>
9 #include <linux/wait.h>
14 #include "ivpu_hw_reg_io.h"
16 #include "ivpu_jsm_msg.h"
19 #define IPC_MAX_RX_MSG 128
20 #define IS_KTHREAD() (get_current()->flags & PF_KTHREAD)
22 struct ivpu_ipc_tx_buf {
23 struct ivpu_ipc_hdr ipc;
24 struct vpu_jsm_msg jsm;
27 struct ivpu_ipc_rx_msg {
28 struct list_head link;
29 struct ivpu_ipc_hdr *ipc_hdr;
30 struct vpu_jsm_msg *jsm_msg;
33 static void ivpu_ipc_msg_dump(struct ivpu_device *vdev, char *c,
34 struct ivpu_ipc_hdr *ipc_hdr, u32 vpu_addr)
37 "%s: vpu:0x%x (data_addr:0x%08x, data_size:0x%x, channel:0x%x, src_node:0x%x, dst_node:0x%x, status:0x%x)",
38 c, vpu_addr, ipc_hdr->data_addr, ipc_hdr->data_size, ipc_hdr->channel,
39 ipc_hdr->src_node, ipc_hdr->dst_node, ipc_hdr->status);
42 static void ivpu_jsm_msg_dump(struct ivpu_device *vdev, char *c,
43 struct vpu_jsm_msg *jsm_msg, u32 vpu_addr)
45 u32 *payload = (u32 *)&jsm_msg->payload;
48 "%s: vpu:0x%08x (type:0x%x, status:0x%x, id: 0x%x, result: 0x%x, payload:0x%x 0x%x 0x%x 0x%x 0x%x)\n",
49 c, vpu_addr, jsm_msg->type, jsm_msg->status, jsm_msg->request_id, jsm_msg->result,
50 payload[0], payload[1], payload[2], payload[3], payload[4]);
54 ivpu_ipc_rx_mark_free(struct ivpu_device *vdev, struct ivpu_ipc_hdr *ipc_hdr,
55 struct vpu_jsm_msg *jsm_msg)
57 ipc_hdr->status = IVPU_IPC_HDR_FREE;
59 jsm_msg->status = VPU_JSM_MSG_FREE;
60 wmb(); /* Flush WC buffers for message statuses */
63 static void ivpu_ipc_mem_fini(struct ivpu_device *vdev)
65 struct ivpu_ipc_info *ipc = vdev->ipc;
67 ivpu_bo_free_internal(ipc->mem_rx);
68 ivpu_bo_free_internal(ipc->mem_tx);
72 ivpu_ipc_tx_prepare(struct ivpu_device *vdev, struct ivpu_ipc_consumer *cons,
73 struct vpu_jsm_msg *req)
75 struct ivpu_ipc_info *ipc = vdev->ipc;
76 struct ivpu_ipc_tx_buf *tx_buf;
80 tx_buf_vpu_addr = gen_pool_alloc(ipc->mm_tx, sizeof(*tx_buf));
81 if (!tx_buf_vpu_addr) {
82 ivpu_err(vdev, "Failed to reserve IPC buffer, size %ld\n",
87 tx_buf = ivpu_to_cpu_addr(ipc->mem_tx, tx_buf_vpu_addr);
88 if (drm_WARN_ON(&vdev->drm, !tx_buf)) {
89 gen_pool_free(ipc->mm_tx, tx_buf_vpu_addr, sizeof(*tx_buf));
93 jsm_vpu_addr = tx_buf_vpu_addr + offsetof(struct ivpu_ipc_tx_buf, jsm);
95 if (tx_buf->ipc.status != IVPU_IPC_HDR_FREE)
96 ivpu_warn(vdev, "IPC message vpu:0x%x not released by firmware\n",
99 if (tx_buf->jsm.status != VPU_JSM_MSG_FREE)
100 ivpu_warn(vdev, "JSM message vpu:0x%x not released by firmware\n",
103 memset(tx_buf, 0, sizeof(*tx_buf));
104 tx_buf->ipc.data_addr = jsm_vpu_addr;
105 /* TODO: Set data_size to actual JSM message size, not union of all messages */
106 tx_buf->ipc.data_size = sizeof(*req);
107 tx_buf->ipc.channel = cons->channel;
108 tx_buf->ipc.src_node = 0;
109 tx_buf->ipc.dst_node = 1;
110 tx_buf->ipc.status = IVPU_IPC_HDR_ALLOCATED;
111 tx_buf->jsm.type = req->type;
112 tx_buf->jsm.status = VPU_JSM_MSG_ALLOCATED;
113 tx_buf->jsm.payload = req->payload;
115 req->request_id = atomic_inc_return(&ipc->request_id);
116 tx_buf->jsm.request_id = req->request_id;
117 cons->request_id = req->request_id;
118 wmb(); /* Flush WC buffers for IPC, JSM msgs */
120 cons->tx_vpu_addr = tx_buf_vpu_addr;
122 ivpu_jsm_msg_dump(vdev, "TX", &tx_buf->jsm, jsm_vpu_addr);
123 ivpu_ipc_msg_dump(vdev, "TX", &tx_buf->ipc, tx_buf_vpu_addr);
128 static void ivpu_ipc_tx_release(struct ivpu_device *vdev, u32 vpu_addr)
130 struct ivpu_ipc_info *ipc = vdev->ipc;
133 gen_pool_free(ipc->mm_tx, vpu_addr, sizeof(struct ivpu_ipc_tx_buf));
136 static void ivpu_ipc_tx(struct ivpu_device *vdev, u32 vpu_addr)
138 ivpu_hw_reg_ipc_tx_set(vdev, vpu_addr);
142 ivpu_ipc_consumer_add(struct ivpu_device *vdev, struct ivpu_ipc_consumer *cons, u32 channel)
144 struct ivpu_ipc_info *ipc = vdev->ipc;
146 INIT_LIST_HEAD(&cons->link);
147 cons->channel = channel;
148 cons->tx_vpu_addr = 0;
149 cons->request_id = 0;
150 spin_lock_init(&cons->rx_msg_lock);
151 INIT_LIST_HEAD(&cons->rx_msg_list);
152 init_waitqueue_head(&cons->rx_msg_wq);
154 spin_lock_irq(&ipc->cons_list_lock);
155 list_add_tail(&cons->link, &ipc->cons_list);
156 spin_unlock_irq(&ipc->cons_list_lock);
159 void ivpu_ipc_consumer_del(struct ivpu_device *vdev, struct ivpu_ipc_consumer *cons)
161 struct ivpu_ipc_info *ipc = vdev->ipc;
162 struct ivpu_ipc_rx_msg *rx_msg, *r;
164 spin_lock_irq(&ipc->cons_list_lock);
165 list_del(&cons->link);
166 spin_unlock_irq(&ipc->cons_list_lock);
168 spin_lock_irq(&cons->rx_msg_lock);
169 list_for_each_entry_safe(rx_msg, r, &cons->rx_msg_list, link) {
170 list_del(&rx_msg->link);
171 ivpu_ipc_rx_mark_free(vdev, rx_msg->ipc_hdr, rx_msg->jsm_msg);
172 atomic_dec(&ipc->rx_msg_count);
175 spin_unlock_irq(&cons->rx_msg_lock);
177 ivpu_ipc_tx_release(vdev, cons->tx_vpu_addr);
181 ivpu_ipc_send(struct ivpu_device *vdev, struct ivpu_ipc_consumer *cons, struct vpu_jsm_msg *req)
183 struct ivpu_ipc_info *ipc = vdev->ipc;
186 mutex_lock(&ipc->lock);
193 ret = ivpu_ipc_tx_prepare(vdev, cons, req);
197 ivpu_ipc_tx(vdev, cons->tx_vpu_addr);
200 mutex_unlock(&ipc->lock);
204 int ivpu_ipc_receive(struct ivpu_device *vdev, struct ivpu_ipc_consumer *cons,
205 struct ivpu_ipc_hdr *ipc_buf,
206 struct vpu_jsm_msg *ipc_payload, unsigned long timeout_ms)
208 struct ivpu_ipc_info *ipc = vdev->ipc;
209 struct ivpu_ipc_rx_msg *rx_msg;
210 int wait_ret, ret = 0;
212 wait_ret = wait_event_interruptible_timeout(cons->rx_msg_wq,
213 (IS_KTHREAD() && kthread_should_stop()) ||
214 !list_empty(&cons->rx_msg_list),
215 msecs_to_jiffies(timeout_ms));
217 if (IS_KTHREAD() && kthread_should_stop())
226 spin_lock_irq(&cons->rx_msg_lock);
227 rx_msg = list_first_entry_or_null(&cons->rx_msg_list, struct ivpu_ipc_rx_msg, link);
229 spin_unlock_irq(&cons->rx_msg_lock);
232 list_del(&rx_msg->link);
233 spin_unlock_irq(&cons->rx_msg_lock);
236 memcpy(ipc_buf, rx_msg->ipc_hdr, sizeof(*ipc_buf));
237 if (rx_msg->jsm_msg) {
238 u32 size = min_t(int, rx_msg->ipc_hdr->data_size, sizeof(*ipc_payload));
240 if (rx_msg->jsm_msg->result != VPU_JSM_STATUS_SUCCESS) {
241 ivpu_dbg(vdev, IPC, "IPC resp result error: %d\n", rx_msg->jsm_msg->result);
246 memcpy(ipc_payload, rx_msg->jsm_msg, size);
249 ivpu_ipc_rx_mark_free(vdev, rx_msg->ipc_hdr, rx_msg->jsm_msg);
250 atomic_dec(&ipc->rx_msg_count);
257 ivpu_ipc_send_receive_internal(struct ivpu_device *vdev, struct vpu_jsm_msg *req,
258 enum vpu_ipc_msg_type expected_resp_type,
259 struct vpu_jsm_msg *resp, u32 channel,
260 unsigned long timeout_ms)
262 struct ivpu_ipc_consumer cons;
265 ivpu_ipc_consumer_add(vdev, &cons, channel);
267 ret = ivpu_ipc_send(vdev, &cons, req);
269 ivpu_warn(vdev, "IPC send failed: %d\n", ret);
273 ret = ivpu_ipc_receive(vdev, &cons, NULL, resp, timeout_ms);
275 ivpu_warn(vdev, "IPC receive failed: type 0x%x, ret %d\n", req->type, ret);
279 if (resp->type != expected_resp_type) {
280 ivpu_warn(vdev, "Invalid JSM response type: 0x%x\n", resp->type);
285 ivpu_ipc_consumer_del(vdev, &cons);
289 int ivpu_ipc_send_receive(struct ivpu_device *vdev, struct vpu_jsm_msg *req,
290 enum vpu_ipc_msg_type expected_resp_type,
291 struct vpu_jsm_msg *resp, u32 channel,
292 unsigned long timeout_ms)
294 struct vpu_jsm_msg hb_req = { .type = VPU_JSM_MSG_QUERY_ENGINE_HB };
295 struct vpu_jsm_msg hb_resp;
298 ret = ivpu_rpm_get(vdev);
302 ret = ivpu_ipc_send_receive_internal(vdev, req, expected_resp_type, resp,
303 channel, timeout_ms);
304 if (ret != -ETIMEDOUT)
307 hb_ret = ivpu_ipc_send_receive_internal(vdev, &hb_req, VPU_JSM_MSG_QUERY_ENGINE_HB_DONE,
308 &hb_resp, VPU_IPC_CHAN_ASYNC_CMD,
310 if (hb_ret == -ETIMEDOUT) {
311 ivpu_hw_diagnose_failure(vdev);
312 ivpu_pm_schedule_recovery(vdev);
321 ivpu_ipc_match_consumer(struct ivpu_device *vdev, struct ivpu_ipc_consumer *cons,
322 struct ivpu_ipc_hdr *ipc_hdr, struct vpu_jsm_msg *jsm_msg)
324 if (cons->channel != ipc_hdr->channel)
327 if (!jsm_msg || jsm_msg->request_id == cons->request_id)
334 ivpu_ipc_dispatch(struct ivpu_device *vdev, struct ivpu_ipc_consumer *cons,
335 struct ivpu_ipc_hdr *ipc_hdr, struct vpu_jsm_msg *jsm_msg)
337 struct ivpu_ipc_info *ipc = vdev->ipc;
338 struct ivpu_ipc_rx_msg *rx_msg;
341 lockdep_assert_held(&ipc->cons_list_lock);
343 rx_msg = kzalloc(sizeof(*rx_msg), GFP_ATOMIC);
345 ivpu_ipc_rx_mark_free(vdev, ipc_hdr, jsm_msg);
349 atomic_inc(&ipc->rx_msg_count);
351 rx_msg->ipc_hdr = ipc_hdr;
352 rx_msg->jsm_msg = jsm_msg;
354 spin_lock_irqsave(&cons->rx_msg_lock, flags);
355 list_add_tail(&rx_msg->link, &cons->rx_msg_list);
356 spin_unlock_irqrestore(&cons->rx_msg_lock, flags);
358 wake_up(&cons->rx_msg_wq);
361 int ivpu_ipc_irq_handler(struct ivpu_device *vdev)
363 struct ivpu_ipc_info *ipc = vdev->ipc;
364 struct ivpu_ipc_consumer *cons;
365 struct ivpu_ipc_hdr *ipc_hdr;
366 struct vpu_jsm_msg *jsm_msg;
372 * Driver needs to purge all messages from IPC FIFO to clear IPC interrupt.
373 * Without purge IPC FIFO to 0 next IPC interrupts won't be generated.
375 while (ivpu_hw_reg_ipc_rx_count_get(vdev)) {
376 vpu_addr = ivpu_hw_reg_ipc_rx_addr_get(vdev);
377 if (vpu_addr == REG_IO_ERROR) {
378 ivpu_err(vdev, "Failed to read IPC rx addr register\n");
382 ipc_hdr = ivpu_to_cpu_addr(ipc->mem_rx, vpu_addr);
384 ivpu_warn(vdev, "IPC msg 0x%x out of range\n", vpu_addr);
387 ivpu_ipc_msg_dump(vdev, "RX", ipc_hdr, vpu_addr);
390 if (ipc_hdr->channel != IVPU_IPC_CHAN_BOOT_MSG) {
391 jsm_msg = ivpu_to_cpu_addr(ipc->mem_rx, ipc_hdr->data_addr);
393 ivpu_warn(vdev, "JSM msg 0x%x out of range\n", ipc_hdr->data_addr);
394 ivpu_ipc_rx_mark_free(vdev, ipc_hdr, NULL);
397 ivpu_jsm_msg_dump(vdev, "RX", jsm_msg, ipc_hdr->data_addr);
400 if (atomic_read(&ipc->rx_msg_count) > IPC_MAX_RX_MSG) {
401 ivpu_warn(vdev, "IPC RX msg dropped, msg count %d\n", IPC_MAX_RX_MSG);
402 ivpu_ipc_rx_mark_free(vdev, ipc_hdr, jsm_msg);
407 spin_lock_irqsave(&ipc->cons_list_lock, flags);
408 list_for_each_entry(cons, &ipc->cons_list, link) {
409 if (ivpu_ipc_match_consumer(vdev, cons, ipc_hdr, jsm_msg)) {
410 ivpu_ipc_dispatch(vdev, cons, ipc_hdr, jsm_msg);
415 spin_unlock_irqrestore(&ipc->cons_list_lock, flags);
418 ivpu_dbg(vdev, IPC, "IPC RX msg 0x%x dropped (no consumer)\n", vpu_addr);
419 ivpu_ipc_rx_mark_free(vdev, ipc_hdr, jsm_msg);
426 int ivpu_ipc_init(struct ivpu_device *vdev)
428 struct ivpu_ipc_info *ipc = vdev->ipc;
431 ipc->mem_tx = ivpu_bo_alloc_internal(vdev, 0, SZ_16K, DRM_IVPU_BO_WC);
435 ipc->mem_rx = ivpu_bo_alloc_internal(vdev, 0, SZ_16K, DRM_IVPU_BO_WC);
439 ipc->mm_tx = devm_gen_pool_create(vdev->drm.dev, __ffs(IVPU_IPC_ALIGNMENT),
441 if (IS_ERR(ipc->mm_tx)) {
442 ret = PTR_ERR(ipc->mm_tx);
443 ivpu_err(vdev, "Failed to create gen pool, %pe\n", ipc->mm_tx);
447 ret = gen_pool_add(ipc->mm_tx, ipc->mem_tx->vpu_addr, ipc->mem_tx->base.size, -1);
449 ivpu_err(vdev, "gen_pool_add failed, ret %d\n", ret);
453 INIT_LIST_HEAD(&ipc->cons_list);
454 spin_lock_init(&ipc->cons_list_lock);
455 drmm_mutex_init(&vdev->drm, &ipc->lock);
457 ivpu_ipc_reset(vdev);
461 ivpu_bo_free_internal(ipc->mem_rx);
463 ivpu_bo_free_internal(ipc->mem_tx);
467 void ivpu_ipc_fini(struct ivpu_device *vdev)
469 ivpu_ipc_mem_fini(vdev);
472 void ivpu_ipc_enable(struct ivpu_device *vdev)
474 struct ivpu_ipc_info *ipc = vdev->ipc;
476 mutex_lock(&ipc->lock);
478 mutex_unlock(&ipc->lock);
481 void ivpu_ipc_disable(struct ivpu_device *vdev)
483 struct ivpu_ipc_info *ipc = vdev->ipc;
484 struct ivpu_ipc_consumer *cons, *c;
487 mutex_lock(&ipc->lock);
489 mutex_unlock(&ipc->lock);
491 spin_lock_irqsave(&ipc->cons_list_lock, flags);
492 list_for_each_entry_safe(cons, c, &ipc->cons_list, link)
493 wake_up(&cons->rx_msg_wq);
494 spin_unlock_irqrestore(&ipc->cons_list_lock, flags);
497 void ivpu_ipc_reset(struct ivpu_device *vdev)
499 struct ivpu_ipc_info *ipc = vdev->ipc;
501 mutex_lock(&ipc->lock);
503 memset(ipc->mem_tx->kvaddr, 0, ipc->mem_tx->base.size);
504 memset(ipc->mem_rx->kvaddr, 0, ipc->mem_rx->base.size);
505 wmb(); /* Flush WC buffers for TX and RX rings */
507 mutex_unlock(&ipc->lock);