drivers/accel/ivpu/ivpu_ipc.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright (C) 2020-2023 Intel Corporation
   4  */
   5
   6 #include <linux/genalloc.h>
   7 #include <linux/highmem.h>
   8 #include <linux/kthread.h>
   9 #include <linux/wait.h>
  10
  11 #include "ivpu_drv.h"
  12 #include "ivpu_gem.h"
  13 #include "ivpu_hw.h"
  14 #include "ivpu_hw_reg_io.h"
  15 #include "ivpu_ipc.h"
  16 #include "ivpu_jsm_msg.h"
  17 #include "ivpu_pm.h"
  18
  19 #define IPC_MAX_RX_MSG  128
  20 #define IS_KTHREAD()    (get_current()->flags & PF_KTHREAD)
  21
  22 struct ivpu_ipc_tx_buf {
  23         struct ivpu_ipc_hdr ipc;
  24         struct vpu_jsm_msg jsm;
  25 };
  26
  27 struct ivpu_ipc_rx_msg {
  28         struct list_head link;
  29         struct ivpu_ipc_hdr *ipc_hdr;
  30         struct vpu_jsm_msg *jsm_msg;
  31 };
  32
  33 static void ivpu_ipc_msg_dump(struct ivpu_device *vdev, char *c,
  34                               struct ivpu_ipc_hdr *ipc_hdr, u32 vpu_addr)
  35 {
  36         ivpu_dbg(vdev, IPC,
  37                  "%s: vpu:0x%x (data_addr:0x%08x, data_size:0x%x, channel:0x%x, src_node:0x%x, dst_node:0x%x, status:0x%x)",
  38                  c, vpu_addr, ipc_hdr->data_addr, ipc_hdr->data_size, ipc_hdr->channel,
  39                  ipc_hdr->src_node, ipc_hdr->dst_node, ipc_hdr->status);
  40 }
  41
  42 static void ivpu_jsm_msg_dump(struct ivpu_device *vdev, char *c,
  43                               struct vpu_jsm_msg *jsm_msg, u32 vpu_addr)
  44 {
  45         u32 *payload = (u32 *)&jsm_msg->payload;
  46
  47         ivpu_dbg(vdev, JSM,
  48                  "%s: vpu:0x%08x (type:0x%x, status:0x%x, id: 0x%x, result: 0x%x, payload:0x%x 0x%x 0x%x 0x%x 0x%x)\n",
  49                  c, vpu_addr, jsm_msg->type, jsm_msg->status, jsm_msg->request_id, jsm_msg->result,
  50                  payload[0], payload[1], payload[2], payload[3], payload[4]);
  51 }
  52
  53 static void
  54 ivpu_ipc_rx_mark_free(struct ivpu_device *vdev, struct ivpu_ipc_hdr *ipc_hdr,
  55                       struct vpu_jsm_msg *jsm_msg)
  56 {
  57         ipc_hdr->status = IVPU_IPC_HDR_FREE;
  58         if (jsm_msg)
  59                 jsm_msg->status = VPU_JSM_MSG_FREE;
  60         wmb(); /* Flush WC buffers for message statuses */
  61 }
  62
  63 static void ivpu_ipc_mem_fini(struct ivpu_device *vdev)
  64 {
  65         struct ivpu_ipc_info *ipc = vdev->ipc;
  66
  67         ivpu_bo_free_internal(ipc->mem_rx);
  68         ivpu_bo_free_internal(ipc->mem_tx);
  69 }
  70
  71 static int
  72 ivpu_ipc_tx_prepare(struct ivpu_device *vdev, struct ivpu_ipc_consumer *cons,
  73                     struct vpu_jsm_msg *req)
  74 {
  75         struct ivpu_ipc_info *ipc = vdev->ipc;
  76         struct ivpu_ipc_tx_buf *tx_buf;
  77         u32 tx_buf_vpu_addr;
  78         u32 jsm_vpu_addr;
  79
  80         tx_buf_vpu_addr = gen_pool_alloc(ipc->mm_tx, sizeof(*tx_buf));
  81         if (!tx_buf_vpu_addr) {
  82                 ivpu_err(vdev, "Failed to reserve IPC buffer, size %ld\n",
  83                          sizeof(*tx_buf));
  84                 return -ENOMEM;
  85         }
  86
  87         tx_buf = ivpu_to_cpu_addr(ipc->mem_tx, tx_buf_vpu_addr);
  88         if (drm_WARN_ON(&vdev->drm, !tx_buf)) {
  89                 gen_pool_free(ipc->mm_tx, tx_buf_vpu_addr, sizeof(*tx_buf));
  90                 return -EIO;
  91         }
  92
  93         jsm_vpu_addr = tx_buf_vpu_addr + offsetof(struct ivpu_ipc_tx_buf, jsm);
  94
  95         if (tx_buf->ipc.status != IVPU_IPC_HDR_FREE)
  96                 ivpu_warn(vdev, "IPC message vpu:0x%x not released by firmware\n",
  97                           tx_buf_vpu_addr);
  98
  99         if (tx_buf->jsm.status != VPU_JSM_MSG_FREE)
 100                 ivpu_warn(vdev, "JSM message vpu:0x%x not released by firmware\n",
 101                           jsm_vpu_addr);
 102
 103         memset(tx_buf, 0, sizeof(*tx_buf));
 104         tx_buf->ipc.data_addr = jsm_vpu_addr;
 105         /* TODO: Set data_size to actual JSM message size, not union of all messages */
 106         tx_buf->ipc.data_size = sizeof(*req);
 107         tx_buf->ipc.channel = cons->channel;
 108         tx_buf->ipc.src_node = 0;
 109         tx_buf->ipc.dst_node = 1;
 110         tx_buf->ipc.status = IVPU_IPC_HDR_ALLOCATED;
 111         tx_buf->jsm.type = req->type;
 112         tx_buf->jsm.status = VPU_JSM_MSG_ALLOCATED;
 113         tx_buf->jsm.payload = req->payload;
 114
 115         req->request_id = atomic_inc_return(&ipc->request_id);
 116         tx_buf->jsm.request_id = req->request_id;
 117         cons->request_id = req->request_id;
 118         wmb(); /* Flush WC buffers for IPC, JSM msgs */
 119
 120         cons->tx_vpu_addr = tx_buf_vpu_addr;
 121
 122         ivpu_jsm_msg_dump(vdev, "TX", &tx_buf->jsm, jsm_vpu_addr);
 123         ivpu_ipc_msg_dump(vdev, "TX", &tx_buf->ipc, tx_buf_vpu_addr);
 124
 125         return 0;
 126 }
 127
 128 static void ivpu_ipc_tx_release(struct ivpu_device *vdev, u32 vpu_addr)
 129 {
 130         struct ivpu_ipc_info *ipc = vdev->ipc;
 131
 132         if (vpu_addr)
 133                 gen_pool_free(ipc->mm_tx, vpu_addr, sizeof(struct ivpu_ipc_tx_buf));
 134 }
 135
 136 static void ivpu_ipc_tx(struct ivpu_device *vdev, u32 vpu_addr)
 137 {
 138         ivpu_hw_reg_ipc_tx_set(vdev, vpu_addr);
 139 }
 140
 141 void
 142 ivpu_ipc_consumer_add(struct ivpu_device *vdev, struct ivpu_ipc_consumer *cons, u32 channel)
 143 {
 144         struct ivpu_ipc_info *ipc = vdev->ipc;
 145
 146         INIT_LIST_HEAD(&cons->link);
 147         cons->channel = channel;
 148         cons->tx_vpu_addr = 0;
 149         cons->request_id = 0;
 150         spin_lock_init(&cons->rx_msg_lock);
 151         INIT_LIST_HEAD(&cons->rx_msg_list);
 152         init_waitqueue_head(&cons->rx_msg_wq);
 153
 154         spin_lock_irq(&ipc->cons_list_lock);
 155         list_add_tail(&cons->link, &ipc->cons_list);
 156         spin_unlock_irq(&ipc->cons_list_lock);
 157 }
 158
 159 void ivpu_ipc_consumer_del(struct ivpu_device *vdev, struct ivpu_ipc_consumer *cons)
 160 {
 161         struct ivpu_ipc_info *ipc = vdev->ipc;
 162         struct ivpu_ipc_rx_msg *rx_msg, *r;
 163
 164         spin_lock_irq(&ipc->cons_list_lock);
 165         list_del(&cons->link);
 166         spin_unlock_irq(&ipc->cons_list_lock);
 167
 168         spin_lock_irq(&cons->rx_msg_lock);
 169         list_for_each_entry_safe(rx_msg, r, &cons->rx_msg_list, link) {
 170                 list_del(&rx_msg->link);
 171                 ivpu_ipc_rx_mark_free(vdev, rx_msg->ipc_hdr, rx_msg->jsm_msg);
 172                 atomic_dec(&ipc->rx_msg_count);
 173                 kfree(rx_msg);
 174         }
 175         spin_unlock_irq(&cons->rx_msg_lock);
 176
 177         ivpu_ipc_tx_release(vdev, cons->tx_vpu_addr);
 178 }
 179
 180 static int
 181 ivpu_ipc_send(struct ivpu_device *vdev, struct ivpu_ipc_consumer *cons, struct vpu_jsm_msg *req)
 182 {
 183         struct ivpu_ipc_info *ipc = vdev->ipc;
 184         int ret;
 185
 186         mutex_lock(&ipc->lock);
 187
 188         if (!ipc->on) {
 189                 ret = -EAGAIN;
 190                 goto unlock;
 191         }
 192
 193         ret = ivpu_ipc_tx_prepare(vdev, cons, req);
 194         if (ret)
 195                 goto unlock;
 196
 197         ivpu_ipc_tx(vdev, cons->tx_vpu_addr);
 198
 199 unlock:
 200         mutex_unlock(&ipc->lock);
 201         return ret;
 202 }
 203
 204 int ivpu_ipc_receive(struct ivpu_device *vdev, struct ivpu_ipc_consumer *cons,
 205                      struct ivpu_ipc_hdr *ipc_buf,
 206                      struct vpu_jsm_msg *ipc_payload, unsigned long timeout_ms)
 207 {
 208         struct ivpu_ipc_info *ipc = vdev->ipc;
 209         struct ivpu_ipc_rx_msg *rx_msg;
 210         int wait_ret, ret = 0;
 211
 212         wait_ret = wait_event_interruptible_timeout(cons->rx_msg_wq,
 213                                                     (IS_KTHREAD() && kthread_should_stop()) ||
 214                                                     !list_empty(&cons->rx_msg_list),
 215                                                     msecs_to_jiffies(timeout_ms));
 216
 217         if (IS_KTHREAD() && kthread_should_stop())
 218                 return -EINTR;
 219
 220         if (wait_ret == 0)
 221                 return -ETIMEDOUT;
 222
 223         if (wait_ret < 0)
 224                 return -ERESTARTSYS;
 225
 226         spin_lock_irq(&cons->rx_msg_lock);
 227         rx_msg = list_first_entry_or_null(&cons->rx_msg_list, struct ivpu_ipc_rx_msg, link);
 228         if (!rx_msg) {
 229                 spin_unlock_irq(&cons->rx_msg_lock);
 230                 return -EAGAIN;
 231         }
 232         list_del(&rx_msg->link);
 233         spin_unlock_irq(&cons->rx_msg_lock);
 234
 235         if (ipc_buf)
 236                 memcpy(ipc_buf, rx_msg->ipc_hdr, sizeof(*ipc_buf));
 237         if (rx_msg->jsm_msg) {
 238                 u32 size = min_t(int, rx_msg->ipc_hdr->data_size, sizeof(*ipc_payload));
 239
 240                 if (rx_msg->jsm_msg->result != VPU_JSM_STATUS_SUCCESS) {
 241                         ivpu_dbg(vdev, IPC, "IPC resp result error: %d\n", rx_msg->jsm_msg->result);
 242                         ret = -EBADMSG;
 243                 }
 244
 245                 if (ipc_payload)
 246                         memcpy(ipc_payload, rx_msg->jsm_msg, size);
 247         }
 248
 249         ivpu_ipc_rx_mark_free(vdev, rx_msg->ipc_hdr, rx_msg->jsm_msg);
 250         atomic_dec(&ipc->rx_msg_count);
 251         kfree(rx_msg);
 252
 253         return ret;
 254 }
 255
 256 static int
 257 ivpu_ipc_send_receive_internal(struct ivpu_device *vdev, struct vpu_jsm_msg *req,
 258                                enum vpu_ipc_msg_type expected_resp_type,
 259                                struct vpu_jsm_msg *resp, u32 channel,
 260                                unsigned long timeout_ms)
 261 {
 262         struct ivpu_ipc_consumer cons;
 263         int ret;
 264
 265         ivpu_ipc_consumer_add(vdev, &cons, channel);
 266
 267         ret = ivpu_ipc_send(vdev, &cons, req);
 268         if (ret) {
 269                 ivpu_warn(vdev, "IPC send failed: %d\n", ret);
 270                 goto consumer_del;
 271         }
 272
 273         ret = ivpu_ipc_receive(vdev, &cons, NULL, resp, timeout_ms);
 274         if (ret) {
 275                 ivpu_warn(vdev, "IPC receive failed: type 0x%x, ret %d\n", req->type, ret);
 276                 goto consumer_del;
 277         }
 278
 279         if (resp->type != expected_resp_type) {
 280                 ivpu_warn(vdev, "Invalid JSM response type: 0x%x\n", resp->type);
 281                 ret = -EBADE;
 282         }
 283
 284 consumer_del:
 285         ivpu_ipc_consumer_del(vdev, &cons);
 286         return ret;
 287 }
 288
 289 int ivpu_ipc_send_receive(struct ivpu_device *vdev, struct vpu_jsm_msg *req,
 290                           enum vpu_ipc_msg_type expected_resp_type,
 291                           struct vpu_jsm_msg *resp, u32 channel,
 292                           unsigned long timeout_ms)
 293 {
 294         struct vpu_jsm_msg hb_req = { .type = VPU_JSM_MSG_QUERY_ENGINE_HB };
 295         struct vpu_jsm_msg hb_resp;
 296         int ret, hb_ret;
 297
 298         ret = ivpu_rpm_get(vdev);
 299         if (ret < 0)
 300                 return ret;
 301
 302         ret = ivpu_ipc_send_receive_internal(vdev, req, expected_resp_type, resp,
 303                                              channel, timeout_ms);
 304         if (ret != -ETIMEDOUT)
 305                 goto rpm_put;
 306
 307         hb_ret = ivpu_ipc_send_receive_internal(vdev, &hb_req, VPU_JSM_MSG_QUERY_ENGINE_HB_DONE,
 308                                                 &hb_resp, VPU_IPC_CHAN_ASYNC_CMD,
 309                                                 vdev->timeout.jsm);
 310         if (hb_ret == -ETIMEDOUT) {
 311                 ivpu_hw_diagnose_failure(vdev);
 312                 ivpu_pm_schedule_recovery(vdev);
 313         }
 314
 315 rpm_put:
 316         ivpu_rpm_put(vdev);
 317         return ret;
 318 }
 319
 320 static bool
 321 ivpu_ipc_match_consumer(struct ivpu_device *vdev, struct ivpu_ipc_consumer *cons,
 322                         struct ivpu_ipc_hdr *ipc_hdr, struct vpu_jsm_msg *jsm_msg)
 323 {
 324         if (cons->channel != ipc_hdr->channel)
 325                 return false;
 326
 327         if (!jsm_msg || jsm_msg->request_id == cons->request_id)
 328                 return true;
 329
 330         return false;
 331 }
 332
 333 static void
 334 ivpu_ipc_dispatch(struct ivpu_device *vdev, struct ivpu_ipc_consumer *cons,
 335                   struct ivpu_ipc_hdr *ipc_hdr, struct vpu_jsm_msg *jsm_msg)
 336 {
 337         struct ivpu_ipc_info *ipc = vdev->ipc;
 338         struct ivpu_ipc_rx_msg *rx_msg;
 339         unsigned long flags;
 340
 341         lockdep_assert_held(&ipc->cons_list_lock);
 342
 343         rx_msg = kzalloc(sizeof(*rx_msg), GFP_ATOMIC);
 344         if (!rx_msg) {
 345                 ivpu_ipc_rx_mark_free(vdev, ipc_hdr, jsm_msg);
 346                 return;
 347         }
 348
 349         atomic_inc(&ipc->rx_msg_count);
 350
 351         rx_msg->ipc_hdr = ipc_hdr;
 352         rx_msg->jsm_msg = jsm_msg;
 353
 354         spin_lock_irqsave(&cons->rx_msg_lock, flags);
 355         list_add_tail(&rx_msg->link, &cons->rx_msg_list);
 356         spin_unlock_irqrestore(&cons->rx_msg_lock, flags);
 357
 358         wake_up(&cons->rx_msg_wq);
 359 }
 360
 361 int ivpu_ipc_irq_handler(struct ivpu_device *vdev)
 362 {
 363         struct ivpu_ipc_info *ipc = vdev->ipc;
 364         struct ivpu_ipc_consumer *cons;
 365         struct ivpu_ipc_hdr *ipc_hdr;
 366         struct vpu_jsm_msg *jsm_msg;
 367         unsigned long flags;
 368         bool dispatched;
 369         u32 vpu_addr;
 370
 371         /*
 372          * Driver needs to purge all messages from IPC FIFO to clear IPC interrupt.
 373          * Without purge IPC FIFO to 0 next IPC interrupts won't be generated.
 374          */
 375         while (ivpu_hw_reg_ipc_rx_count_get(vdev)) {
 376                 vpu_addr = ivpu_hw_reg_ipc_rx_addr_get(vdev);
 377                 if (vpu_addr == REG_IO_ERROR) {
 378                         ivpu_err(vdev, "Failed to read IPC rx addr register\n");
 379                         return -EIO;
 380                 }
 381
 382                 ipc_hdr = ivpu_to_cpu_addr(ipc->mem_rx, vpu_addr);
 383                 if (!ipc_hdr) {
 384                         ivpu_warn(vdev, "IPC msg 0x%x out of range\n", vpu_addr);
 385                         continue;
 386                 }
 387                 ivpu_ipc_msg_dump(vdev, "RX", ipc_hdr, vpu_addr);
 388
 389                 jsm_msg = NULL;
 390                 if (ipc_hdr->channel != IVPU_IPC_CHAN_BOOT_MSG) {
 391                         jsm_msg = ivpu_to_cpu_addr(ipc->mem_rx, ipc_hdr->data_addr);
 392                         if (!jsm_msg) {
 393                                 ivpu_warn(vdev, "JSM msg 0x%x out of range\n", ipc_hdr->data_addr);
 394                                 ivpu_ipc_rx_mark_free(vdev, ipc_hdr, NULL);
 395                                 continue;
 396                         }
 397                         ivpu_jsm_msg_dump(vdev, "RX", jsm_msg, ipc_hdr->data_addr);
 398                 }
 399
 400                 if (atomic_read(&ipc->rx_msg_count) > IPC_MAX_RX_MSG) {
 401                         ivpu_warn(vdev, "IPC RX msg dropped, msg count %d\n", IPC_MAX_RX_MSG);
 402                         ivpu_ipc_rx_mark_free(vdev, ipc_hdr, jsm_msg);
 403                         continue;
 404                 }
 405
 406                 dispatched = false;
 407                 spin_lock_irqsave(&ipc->cons_list_lock, flags);
 408                 list_for_each_entry(cons, &ipc->cons_list, link) {
 409                         if (ivpu_ipc_match_consumer(vdev, cons, ipc_hdr, jsm_msg)) {
 410                                 ivpu_ipc_dispatch(vdev, cons, ipc_hdr, jsm_msg);
 411                                 dispatched = true;
 412                                 break;
 413                         }
 414                 }
 415                 spin_unlock_irqrestore(&ipc->cons_list_lock, flags);
 416
 417                 if (!dispatched) {
 418                         ivpu_dbg(vdev, IPC, "IPC RX msg 0x%x dropped (no consumer)\n", vpu_addr);
 419                         ivpu_ipc_rx_mark_free(vdev, ipc_hdr, jsm_msg);
 420                 }
 421         }
 422
 423         return 0;
 424 }
 425
 426 int ivpu_ipc_init(struct ivpu_device *vdev)
 427 {
 428         struct ivpu_ipc_info *ipc = vdev->ipc;
 429         int ret = -ENOMEM;
 430
 431         ipc->mem_tx = ivpu_bo_alloc_internal(vdev, 0, SZ_16K, DRM_IVPU_BO_WC);
 432         if (!ipc->mem_tx)
 433                 return ret;
 434
 435         ipc->mem_rx = ivpu_bo_alloc_internal(vdev, 0, SZ_16K, DRM_IVPU_BO_WC);
 436         if (!ipc->mem_rx)
 437                 goto err_free_tx;
 438
 439         ipc->mm_tx = devm_gen_pool_create(vdev->drm.dev, __ffs(IVPU_IPC_ALIGNMENT),
 440                                           -1, "TX_IPC_JSM");
 441         if (IS_ERR(ipc->mm_tx)) {
 442                 ret = PTR_ERR(ipc->mm_tx);
 443                 ivpu_err(vdev, "Failed to create gen pool, %pe\n", ipc->mm_tx);
 444                 goto err_free_rx;
 445         }
 446
 447         ret = gen_pool_add(ipc->mm_tx, ipc->mem_tx->vpu_addr, ipc->mem_tx->base.size, -1);
 448         if (ret) {
 449                 ivpu_err(vdev, "gen_pool_add failed, ret %d\n", ret);
 450                 goto err_free_rx;
 451         }
 452
 453         INIT_LIST_HEAD(&ipc->cons_list);
 454         spin_lock_init(&ipc->cons_list_lock);
 455         drmm_mutex_init(&vdev->drm, &ipc->lock);
 456
 457         ivpu_ipc_reset(vdev);
 458         return 0;
 459
 460 err_free_rx:
 461         ivpu_bo_free_internal(ipc->mem_rx);
 462 err_free_tx:
 463         ivpu_bo_free_internal(ipc->mem_tx);
 464         return ret;
 465 }
 466
 467 void ivpu_ipc_fini(struct ivpu_device *vdev)
 468 {
 469         ivpu_ipc_mem_fini(vdev);
 470 }
 471
 472 void ivpu_ipc_enable(struct ivpu_device *vdev)
 473 {
 474         struct ivpu_ipc_info *ipc = vdev->ipc;
 475
 476         mutex_lock(&ipc->lock);
 477         ipc->on = true;
 478         mutex_unlock(&ipc->lock);
 479 }
 480
 481 void ivpu_ipc_disable(struct ivpu_device *vdev)
 482 {
 483         struct ivpu_ipc_info *ipc = vdev->ipc;
 484         struct ivpu_ipc_consumer *cons, *c;
 485         unsigned long flags;
 486
 487         mutex_lock(&ipc->lock);
 488         ipc->on = false;
 489         mutex_unlock(&ipc->lock);
 490
 491         spin_lock_irqsave(&ipc->cons_list_lock, flags);
 492         list_for_each_entry_safe(cons, c, &ipc->cons_list, link)
 493                 wake_up(&cons->rx_msg_wq);
 494         spin_unlock_irqrestore(&ipc->cons_list_lock, flags);
 495 }
 496
 497 void ivpu_ipc_reset(struct ivpu_device *vdev)
 498 {
 499         struct ivpu_ipc_info *ipc = vdev->ipc;
 500
 501         mutex_lock(&ipc->lock);
 502
 503         memset(ipc->mem_tx->kvaddr, 0, ipc->mem_tx->base.size);
 504         memset(ipc->mem_rx->kvaddr, 0, ipc->mem_rx->base.size);
 505         wmb(); /* Flush WC buffers for TX and RX rings */
 506
 507         mutex_unlock(&ipc->lock);
 508 }