1 Qualcomm QUP SPI controller Device Tree Bindings
2 -------------------------------------------
5 - compatible : Should be "qcom,spi-qup-v1.1.1", "qcom,spi-qup-v2.1.1"
6 or "qcom,spi-qup-v2.2.1"
7 - reg : Physical base address and size of SPI registers map.
8 - clock : Clock phandle (see clock bindings for details).
9 - #address-cells : Number of cells required to define a chip select
10 address on the SPI bus. Should be set to 1.
11 - #size-cells : Should be zero.
12 - pinctrl-names : Must be "default"
13 - pinctrl-n : At least one pinctrl phandle
14 - cs-gpios : Should specify GPIOs used for chipselects.
15 The gpios will be referred to as reg = <index> in the
19 - num-cs : total number of chipselects
23 blsp1_spi1: spi@78b5000 {
24 compatible = "qcom,spi-qup-v2.2.1";
25 reg = <0x78b5000 0x600>;
29 pinctrl-names = "spi";
30 pinctrl-0 = <&blsp_spi0>;
32 cs-gpios = <&soc_gpios 54 GPIO_ACTIVE_HIGH>, <&soc_gpios 4 GPIO_ACTIVE_HIGH>;