doc/device-tree-bindings/ram/st,stm32-fmc.txt

   1 ST, stm32 flexible memory controller Drive
   2 Required properties:
   3 - compatible    : "st,stm32-fmc"
   4 - reg           : fmc controller base address
   5 - clocks        : fmc controller clock
   6 u-boot,dm-pre-reloc: flag to initialize memory before relocation.
   7
   8 on-board sdram memory attributes:
   9 - st,sdram-control : parameters for sdram configuration, in this order:
  10   number of columns
  11   number of rows
  12   memory width
  13   number of intenal banks in memory
  14   cas latency
  15   read burst enable or disable
  16   read pipe delay
  17
  18 - st,sdram-timing: timings for sdram, in this order:
  19   tmrd
  20   txsr
  21   tras
  22   trc
  23   trp
  24   trcd
  25
  26 There is device tree include file at :
  27 include/dt-bindings/memory/stm32-sdram.h to define sdram control and timing
  28 parameters as MACROS.
  29
  30 Example:
  31         fmc: fmc@A0000000 {
  32              compatible = "st,stm32-fmc";
  33              reg = <0xA0000000 0x1000>;
  34              clocks = <&rcc 0 64>;
  35              u-boot,dm-pre-reloc;
  36         };
  37
  38         &fmc {
  39                 pinctrl-0 = <&fmc_pins>;
  40                 pinctrl-names = "default";
  41                 status = "okay";
  42
  43                 mr-nbanks = <1>;
  44                 /* sdram memory configuration from sdram datasheet */
  45         bank1: bank@0 {
  46                st,sdram-control = /bits/ 8 <NO_COL_8 NO_ROW_12 MWIDTH_16 BANKS_2
  47                                                 CAS_3 RD_BURST_EN RD_PIPE_DL_0>;
  48                st,sdram-timing = /bits/ 8 <TMRD_1 TXSR_60 TRAS_42 TRC_60 TRP_18
  49                                                 TRCD_18>;
  50        };
  51 }