1 Intel Bay Trail FSP UPD Binding
2 ===============================
4 The device tree node which describes the overriding of the Intel Bay Trail FSP
5 UPD data for configuring the SoC.
7 All properties can be found within the `upd-region` struct in
8 arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h, under the same names, and in
9 Intel's FSP Binary Configuration Tool for Bay Trail. This list of properties is
10 matched up to Intel's E3800 FSPv4 release.
23 - fsp,lpss-sio-enable-pci-mode
38 - fsp,scc-enable-pci-mode
39 - fsp,igd-render-standby
41 - fsp,emmc45-ddr50-enabled
42 - fsp,emmc45-hs200-enabled
44 - fsp,enable-memory-down
46 If you set "fsp,enable-memory-down" you are strongly encouraged to provide an
47 "fsp,memory-down-params{};" to specify how your memory is configured. If you do
48 not set "fsp,enable-memory-down", then the DIMM SPD information will be
49 discovered by the FSP and used to setup main memory.
54 - fsp,mrc-init-tseg-size
55 - fsp,mrc-init-mmio-size
56 - fsp,mrc-init-spd-addr1
57 - fsp,mrc-init-spd-addr2
60 - fsp,igd-dvmt50-pre-alloc
63 - fsp,serial-debug-port-address
64 - fsp,serial-debug-port-type
66 - fsp,emmc45-retune-timer-value
68 - fsp,memory-down-params {
122 Example (from MinnowMax Dual Core):
123 -----------------------------------
129 compatible = "intel,baytrail-fsp";
130 fsp,mrc-init-tseg-size = <0>;
131 fsp,mrc-init-mmio-size = <0x800>;
132 fsp,mrc-init-spd-addr1 = <0xa0>;
133 fsp,mrc-init-spd-addr2 = <0xa2>;
134 fsp,emmc-boot-mode = <2>;
143 fsp,lpss-sio-enable-pci-mode;
155 fsp,igd-dvmt50-pre-alloc = <2>;
156 fsp,aperture-size = <2>;
158 fsp,serial-debug-port-address = <0x3f8>;
159 fsp,serial-debug-port-type = <1>;
161 fsp,scc-enable-pci-mode;
162 fsp,os-selection = <4>;
163 fsp,emmc45-ddr50-enabled;
164 fsp,emmc45-retune-timer-value = <8>;
166 fsp,enable-memory-down;
167 fsp,memory-down-params {
168 compatible = "intel,baytrail-fsp-mdp";
169 fsp,dram-speed = <1>;
172 fsp,dimm-width = <1>;
173 fsp,dimm-density = <2>;
174 fsp,dimm-bus-width = <3>;
175 fsp,dimm-sides = <0>;
176 fsp,dimm-tcl = <0xb>;
177 fsp,dimm-trpt-rcd = <0xb>;
178 fsp,dimm-twr = <0xc>;
182 fsp,dimm-tfaw = <0x14>;