2 # Copyright (C) 2014, Simon Glass <sjg@chromium.org>
3 # Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
5 # SPDX-License-Identifier: GPL-2.0+
11 This document describes the information about U-Boot running on x86 targets,
12 including supported boards, build instructions, todo list, etc.
16 U-Boot supports running as a coreboot [1] payload on x86. So far only Link
17 (Chromebook Pixel) and QEMU [2] x86 targets have been tested, but it should
18 work with minimal adjustments on other x86 boards since coreboot deals with
19 most of the low-level details.
21 U-Boot also supports booting directly from x86 reset vector, without coreboot.
22 In this case, known as bare mode, from the fact that it runs on the
23 'bare metal', U-Boot acts like a BIOS replacement. Currently Link, QEMU x86
24 targets and all Intel boards support running U-Boot 'bare metal'.
26 As for loading an OS, U-Boot supports directly booting a 32-bit or 64-bit
27 Linux kernel as part of a FIT image. It also supports a compressed zImage.
29 Build Instructions for U-Boot as coreboot payload
30 -------------------------------------------------
31 Building U-Boot as a coreboot payload is just like building U-Boot for targets
32 on other architectures, like below:
34 $ make coreboot-x86_defconfig
37 Note this default configuration will build a U-Boot payload for the QEMU board.
38 To build a coreboot payload against another board, you can change the build
39 configuration during the 'make menuconfig' process.
43 (qemu-x86) Board configuration file
44 (qemu-x86_i440fx) Board Device Tree Source (dts) file
45 (0x01920000) Board specific Cache-As-RAM (CAR) address
46 (0x4000) Board specific Cache-As-RAM (CAR) size
48 Change the 'Board configuration file' and 'Board Device Tree Source (dts) file'
49 to point to a new board. You can also change the Cache-As-RAM (CAR) related
50 settings here if the default values do not fit your new board.
52 Build Instructions for U-Boot as BIOS replacement (bare mode)
53 -------------------------------------------------------------
54 Building a ROM version of U-Boot (hereafter referred to as u-boot.rom) is a
55 little bit tricky, as generally it requires several binary blobs which are not
56 shipped in the U-Boot source tree. Due to this reason, the u-boot.rom build is
57 not turned on by default in the U-Boot source tree. Firstly, you need turn it
58 on by enabling the ROM build:
62 This tells the Makefile to build u-boot.rom as a target.
66 Chromebook Link specific instructions for bare mode:
68 First, you need the following binary blobs:
70 * descriptor.bin - Intel flash descriptor
71 * me.bin - Intel Management Engine
72 * mrc.bin - Memory Reference Code, which sets up SDRAM
73 * video ROM - sets up the display
75 You can get these binary blobs by:
77 $ git clone http://review.coreboot.org/p/blobs.git
80 Find the following files:
82 * ./mainboard/google/link/descriptor.bin
83 * ./mainboard/google/link/me.bin
84 * ./northbridge/intel/sandybridge/systemagent-r6.bin
86 The 3rd one should be renamed to mrc.bin.
87 As for the video ROM, you can get it here [3] and rename it to vga.bin.
88 Make sure all these binary blobs are put in the board directory.
90 Now you can build U-Boot and obtain u-boot.rom:
92 $ make chromebook_link_defconfig
97 Intel Crown Bay specific instructions for bare mode:
99 U-Boot support of Intel Crown Bay board [4] relies on a binary blob called
100 Firmware Support Package [5] to perform all the necessary initialization steps
101 as documented in the BIOS Writer Guide, including initialization of the CPU,
102 memory controller, chipset and certain bus interfaces.
104 Download the Intel FSP for Atom E6xx series and Platform Controller Hub EG20T,
105 install it on your host and locate the FSP binary blob. Note this platform
106 also requires a Chipset Micro Code (CMC) state machine binary to be present in
107 the SPI flash where u-boot.rom resides, and this CMC binary blob can be found
108 in this FSP package too.
110 * ./FSP/QUEENSBAY_FSP_GOLD_001_20-DECEMBER-2013.fd
111 * ./Microcode/C0_22211.BIN
113 Rename the first one to fsp.bin and second one to cmc.bin and put them in the
116 Note the FSP release version 001 has a bug which could cause random endless
117 loop during the FspInit call. This bug was published by Intel although Intel
118 did not describe any details. We need manually apply the patch to the FSP
119 binary using any hex editor (eg: bvi). Go to the offset 0x1fcd8 of the FSP
120 binary, change the following five bytes values from orginally E8 42 FF FF FF
123 As for the video ROM, you need manually extract it from the Intel provided
124 BIOS for Crown Bay here [6], using the AMI MMTool [7]. Check PCI option ROM
125 ID 8086:4108, extract and save it as vga.bin in the board directory.
127 Now you can build U-Boot and obtain u-boot.rom
129 $ make crownbay_defconfig
134 Intel Minnowboard Max instructions for bare mode:
136 This uses as FSP as with Crown Bay, except it is for the Atom E3800 series.
137 Download this and get the .fd file (BAYTRAIL_FSP_GOLD_003_16-SEP-2014.fd at
138 the time of writing). Put it in the board directory:
139 board/intel/minnowmax/fsp.bin
141 Obtain the VGA RAM (Vga.dat at the time of writing) and put it into the same
142 directory: board/intel/minnowmax/vga.bin
144 You still need two more binary blobs. The first comes from the original
145 firmware image available from:
147 http://firmware.intel.com/sites/default/files/2014-WW42.4-MinnowBoardMax.73-64-bit.bin_Release.zip
151 $ unzip 2014-WW42.4-MinnowBoardMax.73-64-bit.bin_Release.zip
153 Use ifdtool in the U-Boot tools directory to extract the images from that
156 $ ./tools/ifdtool -x MNW2MAX1.X64.0073.R02.1409160934.bin
158 This will provide the descriptor file - copy this into the correct place:
160 $ cp flashregion_0_flashdescriptor.bin board/intel/minnowmax/descriptor.bin
162 Then do the same with the sample SPI image provided in the FSP (SPI.bin at
163 the time of writing) to obtain the last image. Note that this will also
164 produce a flash descriptor file, but it does not seem to work, probably
165 because it is not designed for the Minnowmax. That is why you need to get
166 the flash descriptor from the original firmware as above.
168 $ ./tools/ifdtool -x BayleyBay/SPI.bin
169 $ cp flashregion_2_intel_me.bin board/intel/minnowmax/me.bin
171 Now you can build U-Boot and obtain u-boot.rom
173 $ make minnowmax_defconfig
176 Checksums are as follows (but note that newer versions will invalidate this):
178 $ md5sum -b board/intel/minnowmax/*.bin
179 ffda9a3b94df5b74323afb328d51e6b4 board/intel/minnowmax/descriptor.bin
180 69f65b9a580246291d20d08cbef9d7c5 board/intel/minnowmax/fsp.bin
181 894a97d371544ec21de9c3e8e1716c4b board/intel/minnowmax/me.bin
182 a2588537da387da592a27219d56e9962 board/intel/minnowmax/vga.bin
184 The ROM image is broken up into these parts:
186 Offset Description Controlling config
187 ------------------------------------------------------------
188 000000 descriptor.bin Hard-coded to 0 in ifdtool
189 001000 me.bin Set by the descriptor
191 700000 u-boot-dtb.bin CONFIG_SYS_TEXT_BASE
192 790000 vga.bin CONFIG_VGA_BIOS_ADDR
193 7c0000 fsp.bin CONFIG_FSP_ADDR
194 7f8000 <spare> (depends on size of fsp.bin)
195 7fe000 Environment CONFIG_ENV_OFFSET
196 7ff800 U-Boot 16-bit boot CONFIG_SYS_X86_START16
198 Overall ROM image size is controlled by CONFIG_ROM_SIZE.
202 Intel Galileo instructions for bare mode:
204 Only one binary blob is needed for Remote Management Unit (RMU) within Intel
205 Quark SoC. Not like FSP, U-Boot does not call into the binary. The binary is
206 needed by the Quark SoC itself.
208 You can get the binary blob from Quark Board Support Package from Intel website:
210 * ./QuarkSocPkg/QuarkNorthCluster/Binary/QuarkMicrocode/RMU.bin
212 Rename the file and put it to the board directory by:
214 $ cp RMU.bin board/intel/galileo/rmu.bin
216 Now you can build U-Boot and obtain u-boot.rom
218 $ make galileo_defconfig
221 QEMU x86 target instructions:
223 To build u-boot.rom for QEMU x86 targets, just simply run
225 $ make qemu-x86_defconfig
228 Note this default configuration will build a U-Boot for the QEMU x86 i440FX
229 board. To build a U-Boot against QEMU x86 Q35 board, you can change the build
230 configuration during the 'make menuconfig' process like below:
232 Device Tree Control --->
234 (qemu-x86_q35) Default Device Tree for DT control
238 For testing U-Boot as the coreboot payload, there are things that need be paid
239 attention to. coreboot supports loading an ELF executable and a 32-bit plain
240 binary, as well as other supported payloads. With the default configuration,
241 U-Boot is set up to use a separate Device Tree Blob (dtb). As of today, the
242 generated u-boot-dtb.bin needs to be packaged by the cbfstool utility (a tool
243 provided by coreboot) manually as coreboot's 'make menuconfig' does not provide
244 this capability yet. The command is as follows:
246 # in the coreboot root directory
247 $ ./build/util/cbfstool/cbfstool build/coreboot.rom add-flat-binary \
248 -f u-boot-dtb.bin -n fallback/payload -c lzma -l 0x1110000 -e 0x1110000
250 Make sure 0x1110000 matches CONFIG_SYS_TEXT_BASE, which is the symbol address
251 of _x86boot_start (in arch/x86/cpu/start.S).
253 If you want to use ELF as the coreboot payload, change U-Boot configuration to
254 use CONFIG_OF_EMBED instead of CONFIG_OF_SEPARATE.
256 To enable video you must enable these options in coreboot:
258 - Set framebuffer graphics resolution (1280x1024 32k-color (1:5:5))
259 - Keep VESA framebuffer
261 At present it seems that for Minnowboard Max, coreboot does not pass through
262 the video information correctly (it always says the resolution is 0x0). This
263 works correctly for link though.
265 Test with QEMU for bare mode
266 ----------------------------
267 QEMU is a fancy emulator that can enable us to test U-Boot without access to
268 a real x86 board. Please make sure your QEMU version is 2.3.0 or above test
269 U-Boot. To launch QEMU with u-boot.rom, call QEMU as follows:
271 $ qemu-system-i386 -nographic -bios path/to/u-boot.rom
273 This will instantiate an emulated x86 board with i440FX and PIIX chipset. QEMU
274 also supports emulating an x86 board with Q35 and ICH9 based chipset, which is
275 also supported by U-Boot. To instantiate such a machine, call QEMU with:
277 $ qemu-system-i386 -nographic -bios path/to/u-boot.rom -M q35
279 Note by default QEMU instantiated boards only have 128 MiB system memory. But
280 it is enough to have U-Boot boot and function correctly. You can increase the
281 system memory by pass '-m' parameter to QEMU if you want more memory:
283 $ qemu-system-i386 -nographic -bios path/to/u-boot.rom -m 1024
285 This creates a board with 1 GiB system memory. Currently U-Boot for QEMU only
286 supports 3 GiB maximum system memory and reserves the last 1 GiB address space
287 for PCI device memory-mapped I/O and other stuff, so the maximum value of '-m'
290 QEMU emulates a graphic card which U-Boot supports. Removing '-nographic' will
291 show QEMU's VGA console window. Note this will disable QEMU's serial output.
292 If you want to check both consoles, use '-serial stdio'.
294 Multicore is also supported by QEMU via '-smp n' where n is the number of cores
295 to instantiate. Currently the default U-Boot built for QEMU supports 2 cores.
296 In order to support more cores, you need add additional cpu nodes in the device
297 tree and change CONFIG_MAX_CPUS accordingly.
301 Modern CPUs usually require a special bit stream called microcode [8] to be
302 loaded on the processor after power up in order to function properly. U-Boot
303 has already integrated these as hex dumps in the source tree.
307 On a multicore system, U-Boot is executed on the bootstrap processor (BSP).
308 Additional application processors (AP) can be brought up by U-Boot. In order to
309 have an SMP kernel to discover all of the available processors, U-Boot needs to
310 prepare configuration tables which contain the multi-CPUs information before
311 loading the OS kernel. Currently U-Boot supports generating two types of tables
312 for SMP, called Simple Firmware Interface (SFI) [9] and Multi-Processor (MP)
313 [10] tables. The writing of these two tables are controlled by two Kconfig
314 options GENERATE_SFI_TABLE and GENERATE_MP_TABLE.
318 x86 has been converted to use driver model for serial and GPIO.
322 x86 uses device tree to configure the board thus requires CONFIG_OF_CONTROL to
323 be turned on. Not every device on the board is configured via device tree, but
324 more and more devices will be added as time goes by. Check out the directory
325 arch/x86/dts/ for these device tree source files.
329 In keeping with the U-Boot philosophy of providing functions to check and
330 adjust internal settings, there are several x86-specific commands that may be
333 hob - Display information about Firmware Support Package (FSP) Hand-off
334 Block. This is only available on platforms which use FSP, mostly
336 iod - Display I/O memory
337 iow - Write I/O memory
338 mtrr - List and set the Memory Type Range Registers (MTRR). These are used to
339 tell the CPU whether memory is cacheable and if so the cache write
340 mode to use. U-Boot sets up some reasonable values but you can
341 adjust then with this command.
345 As an example of how to set up your boot flow with U-Boot, here are
346 instructions for starting Ubuntu from U-Boot. These instructions have been
347 tested on Minnowboard MAX with a SATA driver but are equally applicable on
348 other platforms and other media. There are really only four steps and its a
349 very simple script, but a more detailed explanation is provided here for
352 Note: It is possible to set up U-Boot to boot automatically using syslinux.
353 It could also use the grub.cfg file (/efi/ubuntu/grub.cfg) to obtain the
354 GUID. If you figure these out, please post patches to this README.
356 Firstly, you will need Ubunutu installed on an available disk. It should be
357 possible to make U-Boot start a USB start-up disk but for now let's assume
358 that you used another boot loader to install Ubuntu.
360 Use the U-Boot command line to find the UUID of the partition you want to
361 boot. For example our disk is SCSI device 0:
365 Partition Map for SCSI device 0 -- Partition Type: EFI
367 Part Start LBA End LBA Name
371 1 0x00000800 0x001007ff ""
372 attrs: 0x0000000000000000
373 type: c12a7328-f81f-11d2-ba4b-00a0c93ec93b
374 guid: 9d02e8e4-4d59-408f-a9b0-fd497bc9291c
375 2 0x00100800 0x037d8fff ""
376 attrs: 0x0000000000000000
377 type: 0fc63daf-8483-4772-8e79-3d69d8477de4
378 guid: 965c59ee-1822-4326-90d2-b02446050059
379 3 0x037d9000 0x03ba27ff ""
380 attrs: 0x0000000000000000
381 type: 0657fd6d-a4ab-43c4-84e5-0933c84b4f4f
382 guid: 2c4282bd-1e82-4bcf-a5ff-51dedbf39f17
385 This shows that your SCSI disk has three partitions. The really long hex
386 strings are called Globally Unique Identifiers (GUIDs). You can look up the
387 'type' ones here [11]. On this disk the first partition is for EFI and is in
388 VFAT format (DOS/Windows):
396 Partition 2 is 'Linux filesystem data' so that will be our root disk. It is
402 <DIR> 16384 lost+found
425 <SYM> 33 initrd.img.old
428 and if you look in the /boot directory you will see the kernel:
430 => ext2ls scsi 0:2 /boot
435 3381262 System.map-3.13.0-32-generic
436 1162712 abi-3.13.0-32-generic
437 165611 config-3.13.0-32-generic
438 176500 memtest86+.bin
439 178176 memtest86+.elf
440 178680 memtest86+_multiboot.bin
441 5798112 vmlinuz-3.13.0-32-generic
442 165762 config-3.13.0-58-generic
443 1165129 abi-3.13.0-58-generic
444 5823136 vmlinuz-3.13.0-58-generic
445 19215259 initrd.img-3.13.0-58-generic
446 3391763 System.map-3.13.0-58-generic
447 5825048 vmlinuz-3.13.0-58-generic.efi.signed
448 28304443 initrd.img-3.13.0-32-generic
451 The 'vmlinuz' files contain a packaged Linux kernel. The format is a kind of
452 self-extracting compressed file mixed with some 'setup' configuration data.
453 Despite its size (uncompressed it is >10MB) this only includes a basic set of
454 device drivers, enough to boot on most hardware types.
456 The 'initrd' files contain a RAM disk. This is something that can be loaded
457 into RAM and will appear to Linux like a disk. Ubuntu uses this to hold lots
458 of drivers for whatever hardware you might have. It is loaded before the
459 real root disk is accessed.
461 The numbers after the end of each file are the version. Here it is Linux
462 version 3.13. You can find the source code for this in the Linux tree with
463 the tag v3.13. The '.0' allows for additional Linux releases to fix problems,
464 but normally this is not needed. The '-58' is used by Ubuntu. Each time they
465 release a new kernel they increment this number. New Ubuntu versions might
466 include kernel patches to fix reported bugs. Stable kernels can exist for
467 some years so this number can get quite high.
469 The '.efi.signed' kernel is signed for EFI's secure boot. U-Boot has its own
470 secure boot mechanism - see [12] [13] and cannot read .efi files at present.
472 To boot Ubuntu from U-Boot the steps are as follows:
474 1. Set up the boot arguments. Use the GUID for the partition you want to
477 => setenv bootargs root=/dev/disk/by-partuuid/965c59ee-1822-4326-90d2-b02446050059 ro
479 Here root= tells Linux the location of its root disk. The disk is specified
480 by its GUID, using '/dev/disk/by-partuuid/', a Linux path to a 'directory'
481 containing all the GUIDs Linux has found. When it starts up, there will be a
482 file in that directory with this name in it. It is also possible to use a
483 device name here, see later.
485 2. Load the kernel. Since it is an ext2/4 filesystem we can do:
487 => ext2load scsi 0:2 03000000 /boot/vmlinuz-3.13.0-58-generic
489 The address 30000000 is arbitrary, but there seem to be problems with using
490 small addresses (sometimes Linux cannot find the ramdisk). This is 48MB into
491 the start of RAM (which is at 0 on x86).
493 3. Load the ramdisk (to 64MB):
495 => ext2load scsi 0:2 04000000 /boot/initrd.img-3.13.0-58-generic
497 4. Start up the kernel. We need to know the size of the ramdisk, but can use
498 a variable for that. U-Boot sets 'filesize' to the size of the last file it
501 => zboot 03000000 0 04000000 ${filesize}
503 Type 'help zboot' if you want to see what the arguments are. U-Boot on x86 is
504 quite verbose when it boots a kernel. You should see these messages from
508 Setup Size = 0x00004400
509 Magic signature found
510 Using boot protocol version 2.0c
511 Linux kernel version 3.13.0-58-generic (buildd@allspice) #97-Ubuntu SMP Wed Jul 8 02:56:15 UTC 2015
512 Building boot_params at 0x00090000
513 Loading bzImage at address 100000 (5805728 bytes)
514 Magic signature found
515 Initial RAM disk at linear address 0x04000000, size 19215259 bytes
516 Kernel command line: "console=ttyS0,115200 root=/dev/disk/by-partuuid/965c59ee-1822-4326-90d2-b02446050059 ro"
520 U-Boot prints out some bootstage timing. This is more useful if you put the
521 above commands into a script since then it will be faster.
523 Timer summary in microseconds:
526 241,535 241,535 board_init_r
527 2,421,611 2,180,076 id=64
529 2,428,215 6,425 main_loop
530 48,860,584 46,432,369 start_kernel
534 1,422,704 vesa display
536 Now the kernel actually starts:
538 [ 0.000000] Initializing cgroup subsys cpuset
539 [ 0.000000] Initializing cgroup subsys cpu
540 [ 0.000000] Initializing cgroup subsys cpuacct
541 [ 0.000000] Linux version 3.13.0-58-generic (buildd@allspice) (gcc version 4.8.2 (Ubuntu 4.8.2-19ubuntu1) ) #97-Ubuntu SMP Wed Jul 8 02:56:15 UTC 2015 (Ubuntu 3.13.0-58.97-generic 3.13.11-ckt22)
542 [ 0.000000] Command line: console=ttyS0,115200 root=/dev/disk/by-partuuid/965c59ee-1822-4326-90d2-b02446050059 ro
544 It continues for a long time. Along the way you will see it pick up your
547 [ 0.000000] RAMDISK: [mem 0x04000000-0x05253fff]
549 [ 0.788540] Trying to unpack rootfs image as initramfs...
550 [ 1.540111] Freeing initrd memory: 18768K (ffff880004000000 - ffff880005254000)
553 Later it actually starts using it:
555 Begin: Running /scripts/local-premount ... done.
557 You should also see your boot disk turn up:
559 [ 4.357243] scsi 1:0:0:0: Direct-Access ATA ADATA SP310 5.2 PQ: 0 ANSI: 5
560 [ 4.366860] sd 1:0:0:0: [sda] 62533296 512-byte logical blocks: (32.0 GB/29.8 GiB)
561 [ 4.375677] sd 1:0:0:0: Attached scsi generic sg0 type 0
562 [ 4.381859] sd 1:0:0:0: [sda] Write Protect is off
563 [ 4.387452] sd 1:0:0:0: [sda] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA
564 [ 4.399535] sda: sda1 sda2 sda3
566 Linux has found the three partitions (sda1-3). Mercifully it doesn't print out
567 the GUIDs. In step 1 above we could have used:
569 setenv bootargs root=/dev/sda2 ro
571 instead of the GUID. However if you add another drive to your board the
572 numbering may change whereas the GUIDs will not. So if your boot partition
573 becomes sdb2, it will still boot. For embedded systems where you just want to
574 boot the first disk, you have that option.
576 The last thing you will see on the console is mention of plymouth (which
577 displays the Ubuntu start-up screen) and a lot of 'Starting' messages:
579 * Starting Mount filesystems on boot [ OK ]
581 After a pause you should see a login screen on your display and you are done.
583 If you want to put this in a script you can use something like this:
585 setenv bootargs root=UUID=b2aaf743-0418-4d90-94cc-3e6108d7d968 ro
586 setenv boot zboot 03000000 0 04000000 \${filesize}
587 setenv bootcmd "ext2load scsi 0:2 03000000 /boot/vmlinuz-3.13.0-58-generic; ext2load scsi 0:2 04000000 /boot/initrd.img-3.13.0-58-generic; run boot"
590 The \ is to tell the shell not to evaluate ${filesize} as part of the setenv
593 You will also need to add this to your board configuration file, e.g.
594 include/configs/minnowmax.h:
596 #define CONFIG_BOOTDELAY 2
598 Now when you reset your board it wait a few seconds (in case you want to
599 interrupt) and then should boot straight into Ubuntu.
601 You can also bake this behaviour into your build by hard-coding the
602 environment variables if you add this to minnowmax.h:
604 #undef CONFIG_BOOTARGS
605 #undef CONFIG_BOOTCOMMAND
607 #define CONFIG_BOOTARGS \
609 #define CONFIG_BOOTCOMMAND \
610 "ext2load scsi 0:2 03000000 /boot/vmlinuz-3.13.0-58-generic; " \
611 "ext2load scsi 0:2 04000000 /boot/initrd.img-3.13.0-58-generic; " \
614 #undef CONFIG_EXTRA_ENV_SETTINGS
615 #define CONFIG_EXTRA_ENV_SETTINGS "boot=zboot 03000000 0 04000000 ${filesize}"
620 These notes are for those who want to port U-Boot to a new x86 platform.
622 Since x86 CPUs boot from SPI flash, a SPI flash emulator is a good investment.
623 The Dediprog em100 can be used on Linux. The em100 tool is available here:
625 http://review.coreboot.org/p/em100.git
627 On Minnowboard Max the following command line can be used:
629 sudo em100 -s -p LOW -d u-boot.rom -c W25Q64DW -r
631 A suitable clip for connecting over the SPI flash chip is here:
633 http://www.dediprog.com/pd/programmer-accessories/EM-TC-8
635 This allows you to override the SPI flash contents for development purposes.
636 Typically you can write to the em100 in around 1200ms, considerably faster
637 than programming the real flash device each time. The only important
638 limitation of the em100 is that it only supports SPI bus speeds up to 20MHz.
639 This means that images must be set to boot with that speed. This is an
640 Intel-specific feature - e.g. tools/ifttool has an option to set the SPI
641 speed in the SPI descriptor region.
643 If your chip/board uses an Intel Firmware Support Package (FSP) it is fairly
644 easy to fit it in. You can follow the Minnowboard Max implementation, for
645 example. Hopefully you will just need to create new files similar to those
646 in arch/x86/cpu/baytrail which provide Bay Trail support.
648 If you are not using an FSP you have more freedom and more responsibility.
649 The ivybridge support works this way, although it still uses a ROM for
650 graphics and still has binary blobs containing Intel code. You should aim to
651 support all important peripherals on your platform including video and storage.
652 Use the device tree for configuration where possible.
654 For the microcode you can create a suitable device tree file using the
657 ./tools/microcode-tool -d microcode.dat -m <model> create
659 or if you only have header files and not the full Intel microcode.dat database:
661 ./tools/microcode-tool -H BAY_TRAIL_FSP_KIT/Microcode/M0130673322.h \
662 -H BAY_TRAIL_FSP_KIT/Microcode/M0130679901.h \
665 These are written to arch/x86/dts/microcode/ by default.
667 Note that it is possible to just add the micrcode for your CPU if you know its
668 model. U-Boot prints this information when it starts
670 CPU: x86_64, vendor Intel, device 30673h
672 so here we can use the M0130673322 file.
674 If you platform can display POST codes on two little 7-segment displays on
675 the board, then you can use post_code() calls from C or assembler to monitor
676 boot progress. This can be good for debugging.
678 If not, you can try to get serial working as early as possible. The early
679 debug serial port may be useful here. See setup_early_uart() for an example.
681 During the U-Boot porting, one of the important steps is to write correct PIRQ
682 routing information in the board device tree. Without it, device drivers in the
683 Linux kernel won't function correctly due to interrupt is not working. Please
684 refer to U-Boot doc [14] for the device tree bindings of Intel interrupt router.
685 Here we have more details on the intel,pirq-routing property below.
687 intel,pirq-routing = <
688 PCI_BDF(0, 2, 0) INTA PIRQA
692 As you see each entry has 3 cells. For the first one, we need describe all pci
693 devices mounted on the board. For SoC devices, normally there is a chapter on
694 the chipset datasheet which lists all the available PCI devices. For example on
695 Bay Trail, this is chapter 4.3 (PCI configuration space). For the second one, we
696 can get the interrupt pin either from datasheet or hardware via U-Boot shell.
697 The reliable source is the hardware as sometimes chipset datasheet is not 100%
698 up-to-date. Type 'pci header' plus the device's pci bus/device/function number
699 from U-Boot shell below.
705 interrupt line = 0x09
709 It shows this PCI device is using INTD pin as it reports 4 in the interrupt pin
710 register. Repeat this until you get interrupt pins for all the devices. The last
711 cell is the PIRQ line which a particular interrupt pin is mapped to. On Intel
712 chipset, the power-up default mapping is INTA/B/C/D maps to PIRQA/B/C/D. This
713 can be changed by registers in LPC bridge. So far Intel FSP does not touch those
714 registers so we can write down the PIRQ according to the default mapping rule.
716 Once we get the PIRQ routing information in the device tree, the interrupt
717 allocation and assignment will be done by U-Boot automatically. Now you can
718 enable CONFIG_GENERATE_PIRQ_TABLE for testing Linux kernel using i8259 PIC and
719 CONFIG_GENERATE_MP_TABLE for testing Linux kernel using local APIC and I/O APIC.
721 This script might be useful. If you feed it the output of 'pci long' from
722 U-Boot then it will generate a device tree fragment with the interrupt
723 configuration for each device (note it needs gawk 4.0.0):
725 $ cat console_output |awk '/PCI/ {device=$4} /interrupt line/ {line=$4} \
726 /interrupt pin/ {pin = $4; if (pin != "0x00" && pin != "0xff") \
727 {patsplit(device, bdf, "[0-9a-f]+"); \
728 printf "PCI_BDF(%d, %d, %d) INT%c PIRQ%c\n", strtonum("0x" bdf[1]), \
729 strtonum("0x" bdf[2]), bdf[3], strtonum(pin) + 64, 64 + strtonum(pin)}}'
732 PCI_BDF(0, 2, 0) INTA PIRQA
733 PCI_BDF(0, 3, 0) INTA PIRQA
739 - Chrome OS verified boot
740 - SMI and ACPI support, to provide platform info and facilities to Linux
744 [1] http://www.coreboot.org
745 [2] http://www.qemu.org
746 [3] http://www.coreboot.org/~stepan/pci8086,0166.rom
747 [4] http://www.intel.com/content/www/us/en/embedded/design-tools/evaluation-platforms/atom-e660-eg20t-development-kit.html
748 [5] http://www.intel.com/fsp
749 [6] http://www.intel.com/content/www/us/en/secure/intelligent-systems/privileged/e6xx-35-b1-cmc22211.html
750 [7] http://www.ami.com/products/bios-uefi-tools-and-utilities/bios-uefi-utilities/
751 [8] http://en.wikipedia.org/wiki/Microcode
752 [9] http://simplefirmware.org
753 [10] http://www.intel.com/design/archives/processors/pro/docs/242016.htm
754 [11] https://en.wikipedia.org/wiki/GUID_Partition_Table
755 [12] http://events.linuxfoundation.org/sites/events/files/slides/chromeos_and_diy_vboot_0.pdf
756 [13] http://events.linuxfoundation.org/sites/events/files/slides/elce-2014.pdf
757 [14] doc/device-tree-bindings/misc/intel,irq-router.txt