1 U-Boot for UniPhier SoC family
2 ==============================
8 The UniPhir platform is well tested with Linaro toolchanis.
9 You can download pre-built toolchains from:
11 http://www.linaro.org/downloads/
18 $ make uniphier_sld3_defconfig
19 $ make CROSS_COMPILE=arm-linux-gnueabihf-
22 $ make uniphier_ld4_sld8_defconfig
23 $ make CROSS_COMPILE=arm-linux-gnueabihf-
26 $ make uniphier_ld4_sld8_defconfig
27 $ make CROSS_COMPILE=arm-linux-gnueabihf- DEVICE_TREE=uniphier-sld8-ref
30 $ make uniphier_pro4_defconfig
31 $ make CROSS_COMPILE=arm-linux-gnueabihf-
34 $ make uniphier_pro4_defconfig
35 $ make CROSS_COMPILE=arm-linux-gnueabihf- DEVICE_TREE=uniphier-pro4-ace
38 $ make uniphier_pro4_defconfig
39 $ make CROSS_COMPILE=arm-linux-gnueabihf- DEVICE_TREE=uniphier-pro4-sanji
42 $ make uniphier_pxs2_ld6b_defconfig
43 $ make CROSS_COMPILE=arm-linux-gnueabihf- DEVICE_TREE=uniphier-pro5-4kbox
46 $ make uniphier_pxs2_ld6b_defconfig
47 $ make CROSS_COMPILE=arm-linux-gnueabihf- DEVICE_TREE=uniphier-pxs2-gentil
50 $ make uniphier_pxs2_ld6b_defconfig
51 $ make CROSS_COMPILE=arm-linux-gnueabihf-
54 $ make uniphier_pxs2_ld6b_defconfig
55 $ make CROSS_COMPILE=arm-linux-gnueabihf- DEVICE_TREE=uniphier-ld6b-ref
58 $ make uniphier_ld11_defconfig
59 $ make CROSS_COMPILE=aarch64-linux-gnu-
62 $ make uniphier_ld20_defconfig
63 $ make CROSS_COMPILE=aarch64-linux-gnu-
65 You may wish to change the "CROSS_COMPILE=..." to use your favorite compiler.
68 Burn U-Boot images to NAND
69 --------------------------
71 Write the following to the NAND device:
73 - spl/u-boot-spl.bin at the offset address 0x00000000
74 - u-boot.bin at the offset address 0x00010000
78 - u-boot-with-spl.bin at the offset address 0x00000000
80 If a TFTP server is available, the images can be easily updated.
81 Just copy the u-boot-spl.bin and u-boot.bin to the TFTP public directory,
82 and then run the following command at the U-Boot command line:
87 Burn U-Boot images to eMMC
88 --------------------------
90 Write the following to the Boot partition 1 of the eMMC device:
92 - spl/u-boot-spl.bin at the offset address 0x00000000
93 - u-boot.bin at the offset address 0x00010000
97 - u-boot-with-spl.bin at the offset address 0x00000000
99 If a TFTP server is available, the images can be easily updated.
100 Just copy the u-boot-spl.bin and u-boot.bin to the TFTP public directory,
101 and then run the following command at the U-Boot command line:
106 UniPhier specific commands
107 --------------------------
109 - pinmon (enabled by CONFIG_CMD_PINMON)
110 shows the boot mode pins that has been latched at the power-on reset
112 - ddrphy (enabled by CONFIG_CMD_DDRPHY_DUMP)
113 shows the DDR PHY parameters set by the PHY training
115 - ddrmphy (enabled by CONFIG_CMD_DDRMPHY_DUMP)
116 shows the DDR Multi PHY parameters set by the PHY training
128 - LAN (on-board SMSC9118)
130 - EEPROM (connected to the on-board I2C bus)
131 - Support card (SRAM, NOR flash, some peripherals)
137 The recommended bit switch settings are as follows:
139 SW2 OFF(1)/ON(0) Description
140 ------------------------------------------
143 bit 3 <---- SoC Bus Width 16/32
144 bit 4 <---- SERIAL_SEL[0]
145 bit 5 ----> SERIAL_SEL[1]
146 bit 6 ----> BOOTSWAP_EN
148 bit 8 <---- SOC_SERIAL_DISABLE
150 SW8 OFF(1)/ON(0) Description
151 ------------------------------------------
152 bit 1 <---- CS1_SPLIT
154 bit 3 <---- CASE10_ON
155 bit 4 Don't Care Reserve
156 bit 5 Don't Care Reserve
157 bit 6 Don't Care Reserve
159 bit 8 ----> FLASHBUS32_16
161 The BKSZ[1:0] specifies the address range of memory slot and peripherals
164 BKSZ Description RAM slot Peripherals
165 --------------------------------------------------------------------
166 0b00 15MB RAM / 1MB Peri 00000000-00efffff 00f00000-00ffffff
167 0b01 31MB RAM / 1MB Peri 00000000-01efffff 01f00000-01ffffff
168 0b10 64MB RAM / 1MB Peri 00000000-03efffff 03f00000-03ffffff
169 0b11 127MB RAM / 1MB Peri 00000000-07efffff 07f00000-07ffffff
171 Set BSKZ[1:0] to 0b01 for U-Boot.
172 This mode is the most handy because EA[24] is always supported by the save pin
173 mode of the system bus. On the other hand, EA[25] is not supported for some
174 newer SoCs. Even if it is, EA[25] is not connected on most of the boards.
177 Masahiro Yamada <yamada.masahiro@socionext.com>