1 # SPDX-License-Identifier: GPL-2.0+
3 # Copyright (C) 2015 Google. Inc
4 # Written by Simon Glass <sjg@chromium.org>
9 A wide range of Rockchip SoCs are supported in mainline U-Boot
17 - Firefly RK3288 board or something else with a supported RockChip SoC
18 - Power connection to 5V using the supplied micro-USB power cable
19 - Separate USB serial cable attached to your computer and the Firefly
20 (connect to the micro-USB connector below the logo)
22 - openssl (sudo apt-get install openssl)
23 - Serial UART connection [4]
24 - Suitable ARM cross compiler, e.g.:
25 sudo apt-get install gcc-4.7-arm-linux-gnueabi
31 At present 12 RK3288 boards are supported:
33 - EVB RK3288 - use evb-rk3288 configuration
34 - Fennec RK3288 - use fennec-rk3288 configuration
35 - Firefly RK3288 - use firefly-rk3288 configuration
36 - Hisense Chromebook - use chromebook_jerry configuration
37 - Asus C100P Chromebook - use chromebook_minnie configuration
38 - Asus Chromebit - use chromebook_mickey configuration
39 - MiQi RK3288 - use miqi-rk3288 configuration
40 - phyCORE-RK3288 RDK - use phycore-rk3288 configuration
41 - PopMetal RK3288 - use popmetal-rk3288 configuration
42 - Radxa Rock 2 - use rock2 configuration
43 - Tinker RK3288 - use tinker-rk3288 configuration
44 - Vyasa RK3288 - use vyasa-rk3288 configuration
46 Two RK3036 boards are supported:
48 - EVB RK3036 - use evb-rk3036 configuration
49 - Kylin - use kylin_rk3036 configuration
51 One RK3328 board is supported:
55 Size RK3399 boards are supported (aarch64):
57 - EBV RK3399 - use evb_rk3399 configuration
58 - Firefly RK3399 - use the firefly_rk3399 configuration
59 - Puma - use puma_rk3399 configuration
60 - Ficus - use ficus-rk3399 configuration
61 - Rock960 (Vamrs) - use rock960-rk3399 configuration
62 - Bob - use chromebook_bob configuration
64 Four RK3368 boards are supported:
66 - Sheep - use sheep-rk3368 configuration
67 - Lion - use lion-rk3368 configuration
68 - Geekbox - use geekbox configuration
69 - EVB PX5 - use evb-px5 configuration
71 One RK3128 board is supported:
73 - EVB RK3128 - use evb-rk3128 configuration
75 One RK3229 board is supported:
77 - EVB RK3229 - use evb-rk3229 configuration
79 Two RV1108 boards are supported:
81 - EVB RV1108 - use evb-rv1108 configuration
82 - Elgin R1 - use elgin-rv1108 configuration
84 One RV3188 baord is supported:
86 - Raxda Rock - use rock configuration
91 1. To build RK3288 board:
93 CROSS_COMPILE=arm-linux-gnueabi- make O=firefly firefly-rk3288_defconfig all
95 (or you can use another cross compiler if you prefer)
97 2. To build RK3399 board:
99 Option 1: Package the image with Rockchip miniloader:
103 => cd /path/to/u-boot
104 => make nanopi-neo4-rk3399_defconfig
110 => git clone https://github.com/rockchip-linux/rkbin.git
115 => ./tools/trust_merger RKTRUST/RK3399TRUST.ini
120 => ./tools/loaderimage --pack --uboot /path/to/u-boot/u-boot-dtb.bin uboot.img
122 (Get trust.img and uboot.img)
124 Option 2: Package the image with SPL:
126 - We need the Python elftools.elf.elffile library for make_fit_atf.py to work
128 => sudo apt-get install python-pyelftools
130 - Export cross compiler path for aarch64
136 => git clone git://git.theobroma-systems.com/arm-trusted-firmware.git
137 => cd arm-trusted-firmware
138 => make CROSS_COMPILE=aarch64-linux-gnu- PLAT=rk3399 bl31
140 (copy bl31.bin into U-Boot root dir)
141 => cp build/rk3399/release/bl31/bl31.bin /path/to/u-boot/bl31-rk3399.bin
143 For rest of rk3399 boards.
145 => git clone https://github.com/ARM-software/arm-trusted-firmware.git
146 => cd arm-trusted-firmware
148 (export cross compiler path for Cortex-M0 MCU likely arm-none-eabi-)
150 => make CROSS_COMPILE=aarch64-linux-gnu- PLAT=rk3399
152 (copy bl31.elf into U-Boot root dir)
153 => cp build/rk3399/release/bl31/bl31.elf /path/to/u-boot
155 - Compile PMU M0 firmware
157 This is optional for most of the rk3399 boards and required only for Puma board.
159 => git clone git://git.theobroma-systems.com/rk3399-cortex-m0.git
160 => cd rk3399-cortex-m0
162 (export cross compiler path for Cortex-M0 PMU)
163 => make CROSS_COMPILE=arm-cortex_m0-eabi-
165 (copy rk3399m0.bin into U-Boot root dir)
166 => cp rk3399m0.bin /path/to/u-boot
170 => cd /path/to/u-boot
171 => make orangepi-rk3399_defconfig
175 (Get spl/u-boot-spl-dtb.bin, u-boot.itb images and some boards would get
176 spl/u-boot-spl.bin since it doesn't enable CONFIG_SPL_OF_CONTROL)
178 Writing to the board with USB
179 =============================
181 For USB to work you must get your board into ROM boot mode, either by erasing
182 your MMC or (perhaps) holding the recovery button when you boot the board.
183 To erase your MMC, you can boot into Linux and type (as root)
185 dd if=/dev/zero of=/dev/mmcblk0 bs=1M
187 Connect your board's OTG port to your computer.
189 To create a suitable image and write it to the board:
191 ./firefly-rk3288/tools/mkimage -n rk3288 -T rkimage -d \
192 ./firefly-rk3288/spl/u-boot-spl-dtb.bin out && \
193 cat out | openssl rc4 -K 7c4e0304550509072d2c7b38170d1711 | rkflashtool l
195 If all goes well you should something like:
197 U-Boot SPL 2015.07-rc1-00383-ge345740-dirty (Jun 03 2015 - 10:06:49)
198 Card did not respond to voltage select!
199 spl: mmc init failed with error: -17
200 ### ERROR ### Please RESET the board ###
202 You will need to reset the board before each time you try. Yes, that's all
203 it does so far. If support for the Rockchip USB protocol or DFU were added
204 in SPL then we could in principle load U-Boot and boot to a prompt from USB
205 as several other platforms do. However it does not seem to be possible to
206 use the existing boot ROM code from SPL.
209 Booting from an SD card
210 =======================
212 To write an image that boots from an SD card (assumed to be /dev/sdc):
214 ./firefly-rk3288/tools/mkimage -n rk3288 -T rksd -d \
215 firefly-rk3288/spl/u-boot-spl-dtb.bin out && \
216 sudo dd if=out of=/dev/sdc seek=64 && \
217 sudo dd if=firefly-rk3288/u-boot-dtb.img of=/dev/sdc seek=16384
219 This puts the Rockchip header and SPL image first and then places the U-Boot
220 image at block 16384 (i.e. 8MB from the start of the SD card). This
221 corresponds with this setting in U-Boot:
223 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x4000
225 Put this SD (or micro-SD) card into your board and reset it. You should see
228 U-Boot 2016.01-rc2-00309-ge5bad3b-dirty (Jan 02 2016 - 23:41:59 -0700)
230 Model: Radxa Rock 2 Square
232 MMC: dwmmc@ff0f0000: 0, dwmmc@ff0c0000: 1
233 *** Warning - bad CRC, using default environment
236 Out: vop@ff940000.vidconsole
238 Net: Net Initialization Skipped
240 Hit any key to stop autoboot: 0
243 The rockchip bootrom can load and boot an initial spl, then continue to
244 load a second-stage bootloader (ie. U-Boot) as soon as the control is returned
245 to the bootrom. Both the RK3288 and the RK3036 use this special boot sequence.
246 The configuration option enabling this is:
248 CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
250 You can create the image via the following operations:
252 ./firefly-rk3288/tools/mkimage -n rk3288 -T rksd -d \
253 firefly-rk3288/spl/u-boot-spl-dtb.bin out && \
254 cat firefly-rk3288/u-boot-dtb.bin >> out && \
255 sudo dd if=out of=/dev/sdc seek=64
257 If you have an HDMI cable attached you should see a video console.
259 For evb_rk3036 board:
260 ./evb-rk3036/tools/mkimage -n rk3036 -T rksd -d evb-rk3036/spl/u-boot-spl.bin out && \
261 cat evb-rk3036/u-boot-dtb.bin >> out && \
262 sudo dd if=out of=/dev/sdc seek=64
264 Note: rk3036 SDMMC and debug uart use the same iomux, so if you boot from SD, the
265 debug uart must be disabled
268 Booting from an SD card on RK3288 with TPL
269 ==========================================
271 Since the size of SPL can't be exceeded 0x8000 bytes in RK3288, it is not possible add
272 new SPL features like Falcon mode or etc.
274 So introduce TPL so-that adding new features to SPL is possible because now TPL should
275 run minimal with code like DDR, clock etc and rest of new features in SPL.
277 As of now TPL is added on Vyasa-RK3288 board.
279 To write an image that boots from an SD card (assumed to be /dev/mmcblk0):
281 ./tools/mkimage -n rk3288 -T rksd -d ./tpl/u-boot-tpl.bin out &&
282 cat ./spl/u-boot-spl-dtb.bin >> out &&
283 sudo dd if=out of=/dev/mmcblk0 seek=64 &&
284 sudo dd if=u-boot-dtb.img of=/dev/mmcblk0 seek=16384
286 Booting from an SD card on RK3188
287 =================================
289 For rk3188 boards the general storage onto the card stays the same as
290 described above, but the image creation needs a bit more care.
292 The bootrom of rk3188 expects to find a small 1kb loader which returns
293 control to the bootrom, after which it will load the real loader, which
294 can then be up to 29kb in size and does the regular ddr init. This is
295 handled by a single image (built as the SPL stage) that tests whether
296 it is handled for the first or second time via code executed from the
299 Additionally the rk3188 requires everything the bootrom loads to be
300 rc4-encrypted. Except for the very first stage the bootrom always reads
301 and decodes 2kb pages, so files should be sized accordingly.
303 # copy tpl, pad to 1020 bytes and append spl
304 tools/mkimage -n rk3188 -T rksd -d spl/u-boot-spl.bin out
306 # truncate, encode and append u-boot.bin
307 truncate -s %2048 u-boot.bin
308 cat u-boot.bin | split -b 512 --filter='openssl rc4 -K 7C4E0304550509072D2C7B38170D1711' >> out
310 Booting from an SD card on RK3399
311 =================================
313 To write an image that boots from an SD card (assumed to be /dev/sdc):
315 Option 1: Package the image with Rockchip miniloader:
317 - Create idbloader.img
319 => cd /path/to/u-boot
320 => ./tools/mkimage -n rk3399 -T rksd -d /path/to/rkbin/bin/rk33/rk3399_ddr_800MHz_v1.20.bin idbloader.img
321 => cat /path/to/rkbin/bin/rk33/rk3399_miniloader_v1.19.bin >> idbloader.img
323 - Write idbloader.img at 64 sector
325 => sudo dd if=idbloader.img of=/dev/sdc seek=64
327 - Write trust.img at 24576
329 => sudo dd if=trust.img of=/dev/sdc seek=24576
331 - Write uboot.img at 16384 sector
333 => sudo dd if=uboot.img of=/dev/sdc seek=16384
336 Put this SD (or micro-SD) card into your board and reset it. You should see
339 DDR Version 1.20 20190314
341 Channel 0: DDR3, 933MHz
342 Bus Width=32 Col=10 Bank=8 Row=15 CS=1 Die Bus-Width=16 Size=1024MB
344 ch 0 ddrconfig = 0x101, ddrsize = 0x20
345 pmugrf_os_reg[2] = 0x10006281, stride = 0x17
347 Boot1: 2019-03-14, version: 1.19
350 mmc: ERROR: SDHCI ERR:cmd:0x102,stat:0x18000
351 mmc: ERROR: Card did not respond to voltage select!
353 mmc: ERROR: SDHCI ERR:cmd:0x102,stat:0x18000
354 mmc: ERROR: Card did not respond to voltage select!
356 mmc: ERROR: SDHCI ERR:cmd:0x102,stat:0x18000
357 mmc: ERROR: Card did not respond to voltage select!
363 FwPartOffset=2000 , 0
364 StorageInit ok = 45266
366 SecureInit read PBA: 0x4
367 SecureInit read PBA: 0x404
368 SecureInit read PBA: 0x804
369 SecureInit read PBA: 0xc04
370 SecureInit read PBA: 0x1004
371 SecureInit read PBA: 0x1404
372 SecureInit read PBA: 0x1804
373 SecureInit read PBA: 0x1c04
374 SecureInit ret = 0, SecureMode = 0
375 atags_set_bootdev: ret:(0)
376 GPT 0x3380ec0 signature is wrong
378 GPT 0x3380ec0 signature is wrong
380 LoadTrust Addr:0x4000
382 Load uboot, ReadLba = 2000
383 hdr 0000000003380880 + 0x0:0x88,0x41,0x3e,0x97,0xe6,0x61,0x54,0x23,0xe9,0x5a,0xd1,0x2b,0xdc,0x2f,0xf9,0x35,
385 Load OK, addr=0x200000, size=0x9c9c0
387 NOTICE: BL31: v1.3(debug):370ab80
388 NOTICE: BL31: Built : 09:23:41, Mar 4 2019
389 NOTICE: BL31: Rockchip release version: v1.1
390 INFO: GICv3 with legacy support detected. ARM GICV3 driver initialized in EL3
391 INFO: Using opteed sec cpu_context!
392 INFO: boot cpu mask: 0
393 INFO: plat_rockchip_pmu_init(1181): pd status 3e
394 INFO: BL31: Initializing runtime services
395 INFO: BL31: Initializing BL32
396 INF [0x0] TEE-CORE:init_primary_helper:337: Initializing (1.1.0-195-g8f090d20 #6 Fri Dec 7 06:11:20 UTC 2018 aarch64)
398 INF [0x0] TEE-CORE:init_primary_helper:338: Release version: 1.2
400 INF [0x0] TEE-CORE:init_teecore:83: teecore inits done
401 INFO: BL31: Preparing for EL3 exit to normal world
402 INFO: Entry point address = 0x200000
406 U-Boot 2019.04-rc4-00136-gfd121f9641-dirty (Apr 16 2019 - 14:02:47 +0530)
408 Model: FriendlyARM NanoPi NEO4
410 MMC: dwmmc@fe310000: 2, dwmmc@fe320000: 1, sdhci@fe330000: 0
411 Loading Environment from MMC... *** Warning - bad CRC, using default environment
416 Model: FriendlyARM NanoPi NEO4
417 Net: eth0: ethernet@fe300000
418 Hit any key to stop autoboot: 0
421 Option 2: Package the image with SPL:
423 - Prefix rk3399 header to SPL image
425 => cd /path/to/u-boot
426 => ./tools/mkimage -n rk3399 -T rksd -d spl/u-boot-spl-dtb.bin out
428 - Write prefixed SPL at 64th sector
430 => sudo dd if=out of=/dev/sdc seek=64
432 - Write U-Boot proper at 16384 sector
434 => sudo dd if=u-boot.itb of=/dev/sdc seek=16384
437 Put this SD (or micro-SD) card into your board and reset it. You should see
440 U-Boot SPL board init
441 Trying to boot from MMC1
444 U-Boot 2019.01-00004-g14db5ee998 (Mar 11 2019 - 13:18:41 +0530)
446 Model: Orange Pi RK3399 Board
448 MMC: dwmmc@fe310000: 2, dwmmc@fe320000: 1, sdhci@fe330000: 0
449 Loading Environment from MMC... OK
453 Model: Orange Pi RK3399 Board
454 Net: eth0: ethernet@fe300000
455 Hit any key to stop autoboot: 0
458 Using fastboot on rk3288
459 ========================
460 - Write GPT partition layout to mmc device which fastboot want to use it to
463 => gpt write mmc 1 $partitions
465 - Invoke fastboot command to prepare
469 - Start fastboot request on PC
471 fastboot -i 0x2207 flash loader evb-rk3288/spl/u-boot-spl-dtb.bin
473 You should see something like:
476 WARNING: unknown variable: partition-type:loader
477 Starting download of 357796 bytes
479 downloading of 357796 bytes finished
481 ........ wrote 357888 bytes to 'loader'
486 To write an image that boots from SPI flash (e.g. for the Haier Chromebook or
489 ./chromebook_jerry/tools/mkimage -n rk3288 -T rkspi \
490 -d chromebook_jerry/spl/u-boot-spl-dtb.bin spl.bin && \
491 dd if=spl.bin of=spl-out.bin bs=128K conv=sync && \
492 cat spl-out.bin chromebook_jerry/u-boot-dtb.img >out.bin && \
493 dd if=out.bin of=out.bin.pad bs=4M conv=sync
495 This converts the SPL image to the required SPI format by adding the Rockchip
496 header and skipping every second 2KB block. Then the U-Boot image is written at
497 offset 128KB and the whole image is padded to 4MB which is the SPI flash size.
498 The position of U-Boot is controlled with this setting in U-Boot:
500 #define CONFIG_SYS_SPI_U_BOOT_OFFS (128 << 10)
502 If you have a Dediprog em100pro connected then you can write the image with:
504 sudo em100 -s -c GD25LQ32 -d out.bin.pad -r
506 When booting you should see something like:
508 U-Boot SPL 2015.07-rc2-00215-g9a58220-dirty (Jun 23 2015 - 12:11:32)
511 U-Boot 2015.07-rc2-00215-g9a58220-dirty (Jun 23 2015 - 12:11:32 -0600)
516 Using default environment
526 Immediate priorities are:
530 - Run CPU at full speed (code exists but we only see ~60 DMIPS maximum)
532 - Boot U-Boot proper over USB OTG (at present only SPL works)
538 There are plenty of patches in the links below to help with this work.
540 [1] https://github.com/rkchrome/uboot.git
541 [2] https://github.com/linux-rockchip/u-boot-rockchip.git branch u-boot-rk3288
542 [3] https://github.com/linux-rockchip/rkflashtool.git
543 [4] http://wiki.t-firefly.com/index.php/Firefly-RK3288/Serial_debug/en
548 rkimage.c produces an SPL image suitable for sending directly to the boot ROM
549 over USB OTG. This is a very simple format - just the string RK32 (as 4 bytes)
550 followed by u-boot-spl-dtb.bin.
552 The boot ROM loads image to 0xff704000 which is in the internal SRAM. The SRAM
553 starts at 0xff700000 and extends to 0xff718000 where we put the stack.
558 rksd.c produces an image consisting of 32KB of empty space, a header and
559 u-boot-spl-dtb.bin. The header is defined by 'struct header0_info' although
560 most of the fields are unused by U-Boot. We just need to specify the
561 signature, a flag and the block offset and size of the SPL image.
563 The header occupies a single block but we pad it out to 4 blocks. The header
564 is encoding using RC4 with the key 7c4e0304550509072d2c7b38170d1711. The SPL
565 image can be encoded too but we don't do that.
567 The maximum size of u-boot-spl-dtb.bin which the boot ROM will read is 32KB,
568 or 0x40 blocks. This is a severe and annoying limitation. There may be a way
569 around this limitation, since there is plenty of SRAM, but at present the
570 board refuses to boot if this limit is exceeded.
572 The image produced is padded up to a block boundary (512 bytes). It should be
573 written to the start of an SD card using dd.
575 Since this image is set to load U-Boot from the SD card at block offset,
576 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR, dd should be used to write
577 u-boot-dtb.img to the SD card at that offset. See above for instructions.
582 rkspi.c produces an image consisting of a header and u-boot-spl-dtb.bin. The
583 resulting image is then spread out so that only the first 2KB of each 4KB
584 sector is used. The header is the same as with rksd and the maximum size is
585 also 32KB (before spreading). The image should be written to the start of
588 See above for instructions on how to write a SPI image.
593 You can use this script to create #defines for SoC register access. See the
597 Device tree and driver model
598 ----------------------------
600 Where possible driver model is used to provide a structure to the
601 functionality. Device tree is used for configuration. However these have an
602 overhead and in SPL with a 32KB size limit some shortcuts have been taken.
603 In general all Rockchip drivers should use these features, with SPL-specific
604 modifications where required.
607 ----------------------------
609 Rockchip use a unified GPT partition layout in open source support.
610 With this GPT partition layout, uboot can be compatilbe with other components,
611 like miniloader, trusted-os, arm-trust-firmware.
613 There are some documents about partitions in the links below.
614 http://rockchip.wikidot.com/partitions
617 Jagan Teki <jagan@amarulasolutions.com>
619 Simon Glass <sjg@chromium.org>