1 # SPDX-License-Identifier: GPL-2.0+
3 # Copyright (C) 2015 Google. Inc
4 # Written by Simon Glass <sjg@chromium.org>
9 A wide range of Rockchip SoCs are supported in mainline U-Boot
13 This document is being moved to doc/board/rockchip, so information on it
14 might be incomplete or outdated.
21 - Firefly RK3288 board or something else with a supported RockChip SoC
22 - Power connection to 5V using the supplied micro-USB power cable
23 - Separate USB serial cable attached to your computer and the Firefly
24 (connect to the micro-USB connector below the logo)
26 - openssl (sudo apt-get install openssl)
27 - Serial UART connection [4]
28 - Suitable ARM cross compiler, e.g.:
29 sudo apt-get install gcc-4.7-arm-linux-gnueabi
34 1. To build RK3288 board:
36 CROSS_COMPILE=arm-linux-gnueabi- make O=firefly firefly-rk3288_defconfig all
38 (or you can use another cross compiler if you prefer)
40 2. To build RK3308 board:
42 => git clone https://github.com/rockchip-linux/rkbin.git
46 => export BL31=/path/to/rkbin/bin/rk33/rk3308_bl31_v2.22.elf
47 => make roc-cc-rk3308_defconfig
48 => make CROSS_COMPILE=aarch64-linux-gnu- all
49 => ./tools/mkimage -n rk3308 -T rksd -d /path/to/rkbin/bin/rk33/rk3308_ddr_589MHz_uart2_m0_v1.26.bin idbloader.img
50 => cat spl/u-boot-spl.bin >> idbloader.img
52 3. To build RK3399 board:
54 Option 1: Package the image with Rockchip miniloader:
59 => make nanopi-neo4-rk3399_defconfig
64 => git clone https://github.com/rockchip-linux/rkbin.git
69 => ./tools/trust_merger RKTRUST/RK3399TRUST.ini
74 => ./tools/loaderimage --pack --uboot /path/to/u-boot/u-boot-dtb.bin uboot.img
76 (Get trust.img and uboot.img)
78 Option 2: Package the image with SPL:
80 - Export cross compiler path for aarch64
86 => git clone git://git.theobroma-systems.com/arm-trusted-firmware.git
87 => cd arm-trusted-firmware
88 => make CROSS_COMPILE=aarch64-linux-gnu- PLAT=rk3399 bl31
91 => export BL31=/path/to/arm-trusted-firmware/build/rk3399/release/bl31/bl31.bin
93 For rest of rk3399 boards.
95 => git clone https://github.com/ARM-software/arm-trusted-firmware.git
96 => cd arm-trusted-firmware
98 (export cross compiler path for Cortex-M0 MCU likely arm-none-eabi-)
100 => make CROSS_COMPILE=aarch64-linux-gnu- PLAT=rk3399
103 => export BL31=/path/to/arm-trusted-firmware/build/rk3399/release/bl31/bl31.elf
105 - Compile PMU M0 firmware
107 This is optional for most of the rk3399 boards and required only for Puma board.
109 => git clone git://git.theobroma-systems.com/rk3399-cortex-m0.git
110 => cd rk3399-cortex-m0
112 (export cross compiler path for Cortex-M0 PMU)
113 => make CROSS_COMPILE=arm-cortex_m0-eabi-
115 (export rk3399m0.bin)
116 => export PMUM0=/path/to/rk3399-cortex-m0/rk3399m0.bin
120 => cd /path/to/u-boot
121 => make orangepi-rk3399_defconfig
124 (Get spl/u-boot-spl-dtb.bin, u-boot.itb images and some boards would get
125 spl/u-boot-spl.bin since it doesn't enable CONFIG_SPL_OF_CONTROL
127 If TPL enabled on the target, get tpl/u-boot-tpl-dtb.bin or tpl/u-boot-tpl.bin
128 if CONFIG_TPL_OF_CONTROL not enabled)
130 Writing to the board with USB
131 =============================
133 For USB to work you must get your board into ROM boot mode, either by erasing
134 your MMC or (perhaps) holding the recovery button when you boot the board.
135 To erase your MMC, you can boot into Linux and type (as root)
137 dd if=/dev/zero of=/dev/mmcblk0 bs=1M
139 Connect your board's OTG port to your computer.
141 To create a suitable image and write it to the board:
143 ./firefly-rk3288/tools/mkimage -n rk3288 -T rkimage -d \
144 ./firefly-rk3288/spl/u-boot-spl-dtb.bin out && \
145 cat out | openssl rc4 -K 7c4e0304550509072d2c7b38170d1711 | rkflashtool l
147 If all goes well you should something like:
149 U-Boot SPL 2015.07-rc1-00383-ge345740-dirty (Jun 03 2015 - 10:06:49)
150 Card did not respond to voltage select!
151 spl: mmc init failed with error: -17
152 ### ERROR ### Please RESET the board ###
154 You will need to reset the board before each time you try. Yes, that's all
155 it does so far. If support for the Rockchip USB protocol or DFU were added
156 in SPL then we could in principle load U-Boot and boot to a prompt from USB
157 as several other platforms do. However it does not seem to be possible to
158 use the existing boot ROM code from SPL.
161 Writing to the eMMC with USB on ROC-RK3308-CC
162 =============================================
163 For USB to work you must get your board into Bootrom mode,
164 either by erasing the eMMC or short circuit the GND and D0
167 Connect the board to your computer via tyepc.
168 => rkdeveloptool db rk3308_loader_v1.26.117.bin
169 => rkdeveloptool wl 0x40 idbloader.img
170 => rkdeveloptool wl 0x4000 u-boot.itb
173 Then you will see the boot log from Debug UART at baud rate 1500000:
175 REGFB: 0x00000032, 0x00000032
179 Col=10 Bank=8 Row=14 Size=256MB
181 Returning to boot ROM...
183 U-Boot SPL 2020.01-rc1-00225-g34b681327f (Nov 14 2019 - 10:58:04 +0800)
184 Trying to boot from MMC1
185 INFO: Preloader serial: 2
186 NOTICE: BL31: v1.3(release):30f1405
187 NOTICE: BL31: Built : 17:08:28, Sep 23 2019
188 INFO: Lastlog: last=0x100000, realtime=0x102000, size=0x2000
189 INFO: ARM GICv2 driver initialized
190 INFO: Using opteed sec cpu_context!
191 INFO: boot cpu mask: 1
192 INFO: plat_rockchip_pmu_init: pd status 0xe b
193 INFO: BL31: Initializing runtime services
194 WARNING: No OPTEE provided by BL2 boot loader, Booting device without OPTEE initialization. SMC`s destined for OPTEE will rK
195 ERROR: Error initializing runtime service opteed_fast
196 INFO: BL31: Preparing for EL3 exit to normal world
197 INFO: Entry point address = 0x600000
201 U-Boot 2020.01-rc1-00225-g34b681327f (Nov 14 2019 - 10:58:47 +0800)
203 Model: Firefly ROC-RK3308-CC board
205 MMC: dwmmc@ff480000: 0, dwmmc@ff490000: 1
206 rockchip_dnl_key_pressed read adc key val failed
207 Net: No ethernet found.
208 Hit any key to stop autoboot: 0
209 Card did not respond to voltage select!
210 switch to partitions #0, OK
211 mmc1(part 0) is current device
213 Found /extlinux/extlinux.conf
214 Retrieving file: /extlinux/extlinux.conf
215 151 bytes read in 3 ms (48.8 KiB/s)
217 Retrieving file: /Image
218 14737920 bytes read in 377 ms (37.3 MiB/s)
219 append: earlycon=uart8250,mmio32,0xff0c0000 console=ttyS2,1500000n8
220 Retrieving file: /rk3308-roc-cc.dtb
221 28954 bytes read in 4 ms (6.9 MiB/s)
222 Flattened Device Tree blob at 01f00000
223 Booting using the fdt blob at 0x1f00000
224 ## Loading Device Tree to 000000000df3a000, end 000000000df44119 ... OK
227 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd042]
228 [ 0.000000] Linux version 5.4.0-rc1-00040-g4dc2d508fa47-dirty (andy@B150) (gcc version 6.3.1 20170404 (Linaro GCC 6.3-209
229 [ 0.000000] Machine model: Firefly ROC-RK3308-CC board
230 [ 0.000000] earlycon: uart8250 at MMIO32 0x00000000ff0c0000 (options '')
231 [ 0.000000] printk: bootconsole [uart8250] enabled
233 Booting from an SD card
234 =======================
236 To write an image that boots from an SD card (assumed to be /dev/sdc):
238 ./firefly-rk3288/tools/mkimage -n rk3288 -T rksd -d \
239 firefly-rk3288/spl/u-boot-spl-dtb.bin out && \
240 sudo dd if=out of=/dev/sdc seek=64 && \
241 sudo dd if=firefly-rk3288/u-boot-dtb.img of=/dev/sdc seek=16384
243 This puts the Rockchip header and SPL image first and then places the U-Boot
244 image at block 16384 (i.e. 8MB from the start of the SD card). This
245 corresponds with this setting in U-Boot:
247 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x4000
249 Put this SD (or micro-SD) card into your board and reset it. You should see
252 U-Boot 2016.01-rc2-00309-ge5bad3b-dirty (Jan 02 2016 - 23:41:59 -0700)
254 Model: Radxa Rock 2 Square
256 MMC: dwmmc@ff0f0000: 0, dwmmc@ff0c0000: 1
257 *** Warning - bad CRC, using default environment
260 Out: vop@ff940000.vidconsole
262 Net: Net Initialization Skipped
264 Hit any key to stop autoboot: 0
267 The rockchip bootrom can load and boot an initial spl, then continue to
268 load a second-stage bootloader (ie. U-Boot) as soon as the control is returned
269 to the bootrom. Both the RK3288 and the RK3036 use this special boot sequence.
270 The configuration option enabling this is:
272 CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
274 You can create the image via the following operations:
276 ./firefly-rk3288/tools/mkimage -n rk3288 -T rksd -d \
277 firefly-rk3288/spl/u-boot-spl-dtb.bin out && \
278 cat firefly-rk3288/u-boot-dtb.bin >> out && \
279 sudo dd if=out of=/dev/sdc seek=64
282 ./firefly-rk3288/tools/mkimage -n rk3288 -T rksd -d \
283 firefly-rk3288/spl/u-boot-spl-dtb.bin:firefly-rk3288/u-boot-dtb.bin \
285 sudo dd if=out of=/dev/sdc seek=64
287 If you have an HDMI cable attached you should see a video console.
289 For evb_rk3036 board:
290 ./evb-rk3036/tools/mkimage -n rk3036 -T rksd -d evb-rk3036/spl/u-boot-spl.bin out && \
291 cat evb-rk3036/u-boot-dtb.bin >> out && \
292 sudo dd if=out of=/dev/sdc seek=64
295 ./evb-rk3036/tools/mkimage -n rk3036 -T rksd -d \
296 evb-rk3036/spl/u-boot-spl.bin:evb-rk3036/u-boot-dtb.bin out && \
297 sudo dd if=out of=/dev/sdc seek=64
299 Note: rk3036 SDMMC and debug uart use the same iomux, so if you boot from SD, the
300 debug uart must be disabled
303 Booting from an SD card on RK3288 with TPL
304 ==========================================
306 Since the size of SPL can't be exceeded 0x8000 bytes in RK3288, it is not possible add
307 new SPL features like Falcon mode or etc.
309 So introduce TPL so-that adding new features to SPL is possible because now TPL should
310 run minimal with code like DDR, clock etc and rest of new features in SPL.
312 As of now TPL is added on Vyasa-RK3288 board.
314 To write an image that boots from an SD card (assumed to be /dev/mmcblk0):
316 sudo dd if=idbloader.img of=/dev/mmcblk0 seek=64 &&
317 sudo dd if=u-boot-dtb.img of=/dev/mmcblk0 seek=16384
319 Booting from an SD card on RK3188
320 =================================
322 For rk3188 boards the general storage onto the card stays the same as
323 described above, but the image creation needs a bit more care.
325 The bootrom of rk3188 expects to find a small 1kb loader which returns
326 control to the bootrom, after which it will load the real loader, which
327 can then be up to 29kb in size and does the regular ddr init. This is
328 handled by a single image (built as the SPL stage) that tests whether
329 it is handled for the first or second time via code executed from the
332 Additionally the rk3188 requires everything the bootrom loads to be
333 rc4-encrypted. Except for the very first stage the bootrom always reads
334 and decodes 2kb pages, so files should be sized accordingly.
336 # copy tpl, pad to 1020 bytes and append spl
337 tools/mkimage -n rk3188 -T rksd -d spl/u-boot-spl.bin out
339 # truncate, encode and append u-boot.bin
340 truncate -s %2048 u-boot.bin
341 cat u-boot.bin | split -b 512 --filter='openssl rc4 -K 7C4E0304550509072D2C7B38170D1711' >> out
343 Booting from an SD card on Pine64 Rock64 (RK3328)
344 =================================================
346 For Rock64 rk3328 board the following three parts are required:
347 TPL, SPL, and the u-boot image tree blob.
349 - Write TPL/SPL image at 64 sector
351 => sudo dd if=idbloader.img of=/dev/mmcblk0 seek=64
353 - Write u-boot image tree blob at 16384 sector
355 => sudo dd if=u-boot.itb of=/dev/mmcblk0 seek=16384
357 Booting from an SD card on RK3399
358 =================================
360 To write an image that boots from an SD card (assumed to be /dev/sdc):
362 Option 1: Package the image with Rockchip miniloader:
364 - Create idbloader.img
366 => cd /path/to/u-boot
367 => ./tools/mkimage -n rk3399 -T rksd -d /path/to/rkbin/bin/rk33/rk3399_ddr_800MHz_v1.20.bin idbloader.img
368 => cat /path/to/rkbin/bin/rk33/rk3399_miniloader_v1.19.bin >> idbloader.img
370 - Write idbloader.img at 64 sector
372 => sudo dd if=idbloader.img of=/dev/sdc seek=64
374 - Write trust.img at 24576
376 => sudo dd if=trust.img of=/dev/sdc seek=24576
378 - Write uboot.img at 16384 sector
380 => sudo dd if=uboot.img of=/dev/sdc seek=16384
383 Put this SD (or micro-SD) card into your board and reset it. You should see
386 DDR Version 1.20 20190314
388 Channel 0: DDR3, 933MHz
389 Bus Width=32 Col=10 Bank=8 Row=15 CS=1 Die Bus-Width=16 Size=1024MB
391 ch 0 ddrconfig = 0x101, ddrsize = 0x20
392 pmugrf_os_reg[2] = 0x10006281, stride = 0x17
394 Boot1: 2019-03-14, version: 1.19
397 mmc: ERROR: SDHCI ERR:cmd:0x102,stat:0x18000
398 mmc: ERROR: Card did not respond to voltage select!
400 mmc: ERROR: SDHCI ERR:cmd:0x102,stat:0x18000
401 mmc: ERROR: Card did not respond to voltage select!
403 mmc: ERROR: SDHCI ERR:cmd:0x102,stat:0x18000
404 mmc: ERROR: Card did not respond to voltage select!
410 FwPartOffset=2000 , 0
411 StorageInit ok = 45266
413 SecureInit read PBA: 0x4
414 SecureInit read PBA: 0x404
415 SecureInit read PBA: 0x804
416 SecureInit read PBA: 0xc04
417 SecureInit read PBA: 0x1004
418 SecureInit read PBA: 0x1404
419 SecureInit read PBA: 0x1804
420 SecureInit read PBA: 0x1c04
421 SecureInit ret = 0, SecureMode = 0
422 atags_set_bootdev: ret:(0)
423 GPT 0x3380ec0 signature is wrong
425 GPT 0x3380ec0 signature is wrong
427 LoadTrust Addr:0x4000
429 Load uboot, ReadLba = 2000
430 hdr 0000000003380880 + 0x0:0x88,0x41,0x3e,0x97,0xe6,0x61,0x54,0x23,0xe9,0x5a,0xd1,0x2b,0xdc,0x2f,0xf9,0x35,
432 Load OK, addr=0x200000, size=0x9c9c0
434 NOTICE: BL31: v1.3(debug):370ab80
435 NOTICE: BL31: Built : 09:23:41, Mar 4 2019
436 NOTICE: BL31: Rockchip release version: v1.1
437 INFO: GICv3 with legacy support detected. ARM GICV3 driver initialized in EL3
438 INFO: Using opteed sec cpu_context!
439 INFO: boot cpu mask: 0
440 INFO: plat_rockchip_pmu_init(1181): pd status 3e
441 INFO: BL31: Initializing runtime services
442 INFO: BL31: Initializing BL32
443 INF [0x0] TEE-CORE:init_primary_helper:337: Initializing (1.1.0-195-g8f090d20 #6 Fri Dec 7 06:11:20 UTC 2018 aarch64)
445 INF [0x0] TEE-CORE:init_primary_helper:338: Release version: 1.2
447 INF [0x0] TEE-CORE:init_teecore:83: teecore inits done
448 INFO: BL31: Preparing for EL3 exit to normal world
449 INFO: Entry point address = 0x200000
453 U-Boot 2019.04-rc4-00136-gfd121f9641-dirty (Apr 16 2019 - 14:02:47 +0530)
455 Model: FriendlyARM NanoPi NEO4
457 MMC: dwmmc@fe310000: 2, dwmmc@fe320000: 1, sdhci@fe330000: 0
458 Loading Environment from MMC... *** Warning - bad CRC, using default environment
463 Model: FriendlyARM NanoPi NEO4
464 Net: eth0: ethernet@fe300000
465 Hit any key to stop autoboot: 0
468 Option 2: Package the image with SPL:
470 - Prefix rk3399 header to SPL image
472 => cd /path/to/u-boot
473 => ./tools/mkimage -n rk3399 -T rksd -d spl/u-boot-spl-dtb.bin out
475 - Write prefixed SPL at 64th sector
477 => sudo dd if=out of=/dev/sdc seek=64
479 - Write U-Boot proper at 16384 sector
481 => sudo dd if=u-boot.itb of=/dev/sdc seek=16384
484 Put this SD (or micro-SD) card into your board and reset it. You should see
487 U-Boot SPL board init
488 Trying to boot from MMC1
491 U-Boot 2019.01-00004-g14db5ee998 (Mar 11 2019 - 13:18:41 +0530)
493 Model: Orange Pi RK3399 Board
495 MMC: dwmmc@fe310000: 2, dwmmc@fe320000: 1, sdhci@fe330000: 0
496 Loading Environment from MMC... OK
500 Model: Orange Pi RK3399 Board
501 Net: eth0: ethernet@fe300000
502 Hit any key to stop autoboot: 0
505 Option 3: Package the image with TPL:
507 - Write tpl+spl at 64th sector
509 => sudo dd if=idbloader.img of=/dev/sdc seek=64
511 - Write U-Boot proper at 16384 sector
513 => sudo dd if=u-boot.itb of=/dev/sdc seek=16384
516 Put this SD (or micro-SD) card into your board and reset it. You should see
519 U-Boot TPL board init
520 Trying to boot from BOOTROM
521 Returning to boot ROM...
523 U-Boot SPL board init
524 Trying to boot from MMC1
527 U-Boot 2019.07-rc1-00241-g5b3244767a (May 08 2019 - 10:51:06 +0530)
529 Model: Orange Pi RK3399 Board
531 MMC: dwmmc@fe310000: 2, dwmmc@fe320000: 1, sdhci@fe330000: 0
532 Loading Environment from MMC... OK
536 Model: Orange Pi RK3399 Board
537 Net: eth0: ethernet@fe300000
538 Hit any key to stop autoboot: 0
541 Using fastboot on rk3288
542 ========================
543 - Write GPT partition layout to mmc device which fastboot want to use it to
546 => gpt write mmc 1 $partitions
548 - Invoke fastboot command to prepare
552 - Start fastboot request on PC
554 fastboot -i 0x2207 flash loader evb-rk3288/spl/u-boot-spl-dtb.bin
556 You should see something like:
559 WARNING: unknown variable: partition-type:loader
560 Starting download of 357796 bytes
562 downloading of 357796 bytes finished
564 ........ wrote 357888 bytes to 'loader'
569 To write an image that boots from SPI flash (e.g. for the Haier Chromebook or
572 ./chromebook_jerry/tools/mkimage -n rk3288 -T rkspi \
573 -d chromebook_jerry/spl/u-boot-spl-dtb.bin spl.bin && \
574 dd if=spl.bin of=spl-out.bin bs=128K conv=sync && \
575 cat spl-out.bin chromebook_jerry/u-boot-dtb.img >out.bin && \
576 dd if=out.bin of=out.bin.pad bs=4M conv=sync
578 This converts the SPL image to the required SPI format by adding the Rockchip
579 header and skipping every second 2KB block. Then the U-Boot image is written at
580 offset 128KB and the whole image is padded to 4MB which is the SPI flash size.
581 The position of U-Boot is controlled with this setting in U-Boot:
583 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
585 If you have a Dediprog em100pro connected then you can write the image with:
587 sudo em100 -s -c GD25LQ32 -d out.bin.pad -r
589 When booting you should see something like:
591 U-Boot SPL 2015.07-rc2-00215-g9a58220-dirty (Jun 23 2015 - 12:11:32)
594 U-Boot 2015.07-rc2-00215-g9a58220-dirty (Jun 23 2015 - 12:11:32 -0600)
599 Using default environment
609 Immediate priorities are:
613 - Run CPU at full speed (code exists but we only see ~60 DMIPS maximum)
615 - Boot U-Boot proper over USB OTG (at present only SPL works)
621 There are plenty of patches in the links below to help with this work.
623 [1] https://github.com/rkchrome/uboot.git
624 [2] https://github.com/linux-rockchip/u-boot-rockchip.git branch u-boot-rk3288
625 [3] https://github.com/linux-rockchip/rkflashtool.git
626 [4] http://wiki.t-firefly.com/index.php/Firefly-RK3288/Serial_debug/en
631 rkimage.c produces an SPL image suitable for sending directly to the boot ROM
632 over USB OTG. This is a very simple format - just the string RK32 (as 4 bytes)
633 followed by u-boot-spl-dtb.bin.
635 The boot ROM loads image to 0xff704000 which is in the internal SRAM. The SRAM
636 starts at 0xff700000 and extends to 0xff718000 where we put the stack.
641 rksd.c produces an image consisting of 32KB of empty space, a header and
642 u-boot-spl-dtb.bin. The header is defined by 'struct header0_info' although
643 most of the fields are unused by U-Boot. We just need to specify the
644 signature, a flag and the block offset and size of the SPL image.
646 The header occupies a single block but we pad it out to 4 blocks. The header
647 is encoding using RC4 with the key 7c4e0304550509072d2c7b38170d1711. The SPL
648 image can be encoded too but we don't do that.
650 The maximum size of u-boot-spl-dtb.bin which the boot ROM will read is 32KB,
651 or 0x40 blocks. This is a severe and annoying limitation. There may be a way
652 around this limitation, since there is plenty of SRAM, but at present the
653 board refuses to boot if this limit is exceeded.
655 The image produced is padded up to a block boundary (512 bytes). It should be
656 written to the start of an SD card using dd.
658 Since this image is set to load U-Boot from the SD card at block offset,
659 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR, dd should be used to write
660 u-boot-dtb.img to the SD card at that offset. See above for instructions.
665 rkspi.c produces an image consisting of a header and u-boot-spl-dtb.bin. The
666 resulting image is then spread out so that only the first 2KB of each 4KB
667 sector is used. The header is the same as with rksd and the maximum size is
668 also 32KB (before spreading). The image should be written to the start of
671 See above for instructions on how to write a SPI image.
676 You can use this script to create #defines for SoC register access. See the
680 Device tree and driver model
681 ----------------------------
683 Where possible driver model is used to provide a structure to the
684 functionality. Device tree is used for configuration. However these have an
685 overhead and in SPL with a 32KB size limit some shortcuts have been taken.
686 In general all Rockchip drivers should use these features, with SPL-specific
687 modifications where required.
690 ----------------------------
692 Rockchip use a unified GPT partition layout in open source support.
693 With this GPT partition layout, uboot can be compatilbe with other components,
694 like miniloader, trusted-os, arm-trust-firmware.
696 There are some documents about partitions in the links below.
697 http://rockchip.wikidot.com/partitions
700 Jagan Teki <jagan@amarulasolutions.com>
702 Simon Glass <sjg@chromium.org>