3 The P2041 Processor combines four Power Architecture processor cores
4 with high-performance datapath acceleration architecture(DPAA), CoreNet
5 fabric infrastructure, as well as network and peripheral bus interfaces
6 required for networking, telecom/datacom, wireless infrastructure, and
7 military/aerospace applications.
9 P2041RDB board is a quad core platform supporting the P2041 processor
19 => tftp 1000000 u-boot.bin
21 => erase eff80000 efffffff
22 => cp.b 1000000 eff80000 80000
25 => tftp 1000000 rcw.bin
27 => erase e8000000 e801ffff
28 => cp.b 1000000 e8000000 50
30 4. Program FMAN Firmware ucode
31 => tftp 1000000 ucode.bin
33 => erase ef000000 ef0fffff
34 => cp.b 1000000 ef000000 2000
38 Note: 1 stands for 'on', 0 stands for 'off'
43 make P2041RDB_SDCARD_config
47 Use PE tool to produce a image used to be programed to
48 SDCard which contains RCW and U-Boot image.
50 3. Program the PBL image to SDCard
51 => tftp 1000000 pbl_sd.bin
53 => mmc write 1000000 8 441
55 4. Program FMAN Firmware ucode
56 => tftp 1000000 ucode.bin
57 => mmc write 1000000 46a 10
61 Note: 1 stands for 'on', 0 stands for 'off'
66 make P2041RDB_SPIFLASH_config
70 Use PE tool to produce a image used to be programed to
71 SPI flash which contains RCW and U-Boot image.
73 3. Program the PBL image to SPI flash
74 => tftp 1000000 pbl_spi.bin
77 => sf write 1000000 0 $filesize
79 4. Program FMAN Firmware ucode
80 => tftp 1000000 ucode.bin
81 => sf erase 110000 10000
82 => sf write 1000000 110000 $filesize
86 Note: 1 stands for 'on', 0 stands for 'off'
90 The CPLD is used to control the power sequence and some serdes lane
93 cpld reset - hard reset to default bank
94 cpld reset altbank - reset to alternate bank
95 cpld lane_mux <lane> <mux_value> - set multiplexed lane pin
96 lane 6: 0 -> slot1 (Default)
98 lane a: 0 -> slot2 (Default)
100 lane c: 0 -> slot2 (Default)
102 lane d: 0 -> slot2 (Default)
105 Using the Device Tree Source File
106 =================================
107 To create the DTB (Device Tree Binary) image file, use a command
109 dtc -O dtb -b 0 -p 1024 p2041rdb.dts > p2041rdb.dtb
111 Or use the following command:
112 {linux-2.6}/make p2041rdb.dtb ARCH=powerpc
114 then the dtb file will be generated under the following directory:
115 {linux-2.6}/arch/powerpc/boot/p2041rdb.dtb
119 Place a linux uImage in the TFTP disk area.
121 tftp 2000000 rootfs.ext2.gz.uboot
122 tftp 3000000 p2041rdb.dtb
123 bootm 1000000 2000000 3000000