4 The overall usage pattern for ECC diagnostic commands is the following:
6 * (injecting errors is initially disabled)
8 * define inject mask (which tells the DDR controller what type of errors
9 we'll be injecting: single/multiple bit etc.)
11 * enable injecting errors - from now on the controller injects errors as
12 indicated in the inject mask
14 IMPORTANT NOTICE: enabling injecting multiple-bit errors is potentially
15 dangerous as such errors are NOT corrected by the controller. Therefore caution
16 should be taken when enabling the injection of multiple-bit errors: it is only
17 safe when used on a carefully selected memory area and used under control of
18 the 'ecc test' command (see example 'Injecting Multiple-Bit Errors' below). In
19 particular, when you simply set the multiple-bit errors in inject mask and
20 enable injection, U-Boot is very likely to hang quickly as the errors will be
21 injected when it accesses its code, data etc.
24 Use cases for DDR 'ecc' command:
25 ================================
27 Before executing particular tests reset target board or clear status registers:
30 => ecc errdetectclr all
34 Injecting Single-Bit Errors
35 ---------------------------
37 1. Set 1 bit in Data Path Error Inject Mask
41 2. Run test over some memory region
49 Memory Data Path Error Injection Mask High/Low: 00000001 00000000
51 Memory Single-Bit Error Management (0..255):
52 Single-Bit Error Threshold: 255
53 Single Bit Error Counter: 16
56 Multiple Memory Errors: 0
61 16 errors were generated, Single-Bit Error flag was not set as Single Bit Error
62 Counter did not reach Single-Bit Error Threshold.
64 4. Make sure used memory region got re-initialized with 0xcafecafe pattern
67 00200000: cafecafe cafecafe cafecafe cafecafe ................
68 00200010: cafecafe cafecafe cafecafe cafecafe ................
69 00200020: cafecafe cafecafe cafecafe cafecafe ................
70 00200030: cafecafe cafecafe cafecafe cafecafe ................
71 00200040: cafecafe cafecafe cafecafe cafecafe ................
72 00200050: cafecafe cafecafe cafecafe cafecafe ................
73 00200060: cafecafe cafecafe cafecafe cafecafe ................
74 00200070: cafecafe cafecafe cafecafe cafecafe ................
75 00200080: deadbeef deadbeef deadbeef deadbeef ................
76 00200090: deadbeef deadbeef deadbeef deadbeef ................
79 Injecting Multiple-Bit Errors
80 -----------------------------
82 1. Set more than 1 bit in Data Path Error Inject Mask
86 2. Run test over some memory region
94 Memory Data Path Error Injection Mask High/Low: 00000005 00000000
97 Multiple Memory Errors: 1
102 Observe that both Multiple Memory Errors and Multiple-Bit Error flags are set.
104 4. Make sure used memory region got re-initialized with 0xcafecafe pattern
107 00200000: cafecafe cafecafe cafecafe cafecafe ................
108 00200010: cafecafe cafecafe cafecafe cafecafe ................
109 00200020: cafecafe cafecafe cafecafe cafecafe ................
110 00200030: cafecafe cafecafe cafecafe cafecafe ................
111 00200040: cafecafe cafecafe cafecafe cafecafe ................
112 00200050: cafecafe cafecafe cafecafe cafecafe ................
113 00200060: cafecafe cafecafe cafecafe cafecafe ................
114 00200070: cafecafe cafecafe cafecafe cafecafe ................
115 00200080: deadbeef deadbeef deadbeef deadbeef ................
116 00200090: deadbeef deadbeef deadbeef deadbeef ................
119 Test Single-Bit Error Counter and Threshold
120 -------------------------------------------
122 1. Set 1 bit in Data Path Error Inject Mask
124 => ecc injectdatahi 1
126 2. Enable error injection
130 3. Let u-boot run for a with Single-Bit error injection enabled
132 4. Disable error injection
141 Memory Single-Bit Error Management (0..255):
142 Single-Bit Error Threshold: 255
143 Single Bit Error Counter: 60
146 Multiple Memory Errors: 1
147 Multiple-Bit Error: 0
151 Observe that Single-Bit Error is 'on' which means that Single-Bit Error Counter
152 reached Single-Bit Error Threshold. Multiple Memory Errors bit is also 'on', that
153 is Counter reached Threshold more than one time (it wraps back after reaching