1 /* disasm.c where all the _work_ gets done in the Netwide Disassembler
3 * The Netwide Assembler is copyright (C) 1996 Simon Tatham and
4 * Julian Hall. All rights reserved. The software is
5 * redistributable under the licence given in the file "Licence"
6 * distributed in the NASM archive.
8 * initial version 27/iii/95 by Simon Tatham
26 * Flags that go into the `segment' field of `insn' structures
29 #define SEG_RELATIVE 1
36 #define SEG_SIGNED 128
45 uint8_t osize; /* Operand size */
46 uint8_t asize; /* Address size */
47 uint8_t osp; /* Operand size prefix present */
48 uint8_t asp; /* Address size prefix present */
49 uint8_t rep; /* Rep prefix present */
50 uint8_t seg; /* Segment override prefix present */
51 uint8_t lock; /* Lock prefix present */
52 uint8_t rex; /* Rex prefix present */
55 #define getu8(x) (*(uint8_t *)(x))
56 #if defined(__i386__) || defined(__x86_64__)
57 /* Littleendian CPU which can handle unaligned references */
58 #define getu16(x) (*(uint16_t *)(x))
59 #define getu32(x) (*(uint32_t *)(x))
60 #define getu64(x) (*(uint64_t *)(x))
62 static uint16_t getu16(uint8_t *data)
64 return (uint16_t)data[0] + ((uint16_t)data[1] << 8);
66 static uint32_t getu32(uint8_t *data)
68 return (uint32_t)getu16(data) + ((uint32_t)getu16(data+2) << 16);
70 static uint64_t getu64(uint8_t *data)
72 return (uint64_t)getu32(data) + ((uint64_t)getu32(data+4) << 32);
76 #define gets8(x) ((int8_t)getu8(x))
77 #define gets16(x) ((int16_t)getu16(x))
78 #define gets32(x) ((int32_t)getu32(x))
79 #define gets64(x) ((int64_t)getu64(x))
81 /* Important: regval must already have been adjusted for rex extensions */
82 static enum reg_enum whichreg(int32_t regflags, int regval, int rex)
84 if (!(regflags & (REGISTER|REGMEM)))
85 return 0; /* Registers not permissible?! */
89 if (!(REG_AL & ~regflags))
91 if (!(REG_AX & ~regflags))
93 if (!(REG_EAX & ~regflags))
95 if (!(REG_RAX & ~regflags))
97 if (!(REG_DL & ~regflags))
99 if (!(REG_DX & ~regflags))
101 if (!(REG_EDX & ~regflags))
103 if (!(REG_RDX & ~regflags))
105 if (!(REG_CL & ~regflags))
107 if (!(REG_CX & ~regflags))
109 if (!(REG_ECX & ~regflags))
111 if (!(REG_RCX & ~regflags))
113 if (!(FPU0 & ~regflags))
115 if (!(REG_CS & ~regflags))
116 return (regval == 1) ? R_CS : 0;
117 if (!(REG_DESS & ~regflags))
118 return (regval == 0 || regval == 2
119 || regval == 3 ? rd_sreg[regval] : 0);
120 if (!(REG_FSGS & ~regflags))
121 return (regval == 4 || regval == 5 ? rd_sreg[regval] : 0);
122 if (!(REG_SEG67 & ~regflags))
123 return (regval == 6 || regval == 7 ? rd_sreg[regval] : 0);
125 /* All the entries below look up regval in an 16-entry array */
126 if (regval < 0 || regval > 15)
129 if (!(REG8 & ~regflags)) {
131 return rd_reg8_rex[regval];
133 return rd_reg8[regval];
135 if (!(REG16 & ~regflags))
136 return rd_reg16[regval];
137 if (!(REG32 & ~regflags))
138 return rd_reg32[regval];
139 if (!(REG64 & ~regflags))
140 return rd_reg64[regval];
141 if (!(REG_SREG & ~regflags))
142 return rd_sreg[regval & 7]; /* Ignore REX */
143 if (!(REG_CREG & ~regflags))
144 return rd_creg[regval];
145 if (!(REG_DREG & ~regflags))
146 return rd_dreg[regval];
147 if (!(REG_TREG & ~regflags)) {
149 return 0; /* TR registers are ill-defined with rex */
150 return rd_treg[regval];
152 if (!(FPUREG & ~regflags))
153 return rd_fpureg[regval & 7]; /* Ignore REX */
154 if (!(MMXREG & ~regflags))
155 return rd_mmxreg[regval & 7]; /* Ignore REX */
156 if (!(XMMREG & ~regflags))
157 return rd_xmmreg[regval];
162 static const char *whichcond(int condval)
164 static int conds[] = {
165 C_O, C_NO, C_C, C_NC, C_Z, C_NZ, C_NA, C_A,
166 C_S, C_NS, C_PE, C_PO, C_L, C_NL, C_NG, C_G
168 return conditions[conds[condval]];
172 * Process a DREX suffix
174 static uint8_t *do_drex(uint8_t *data, insn *ins)
176 uint8_t drex = *data++;
177 operand *dst = &ins->oprs[ins->drexdst];
179 if ((drex & 8) != ((ins->rex & REX_OC) ? 8 : 0))
180 return NULL; /* OC0 mismatch */
181 ins->rex = (ins->rex & ~7) | (drex & 7);
183 dst->segment = SEG_RMREG;
184 dst->basereg = drex >> 4;
190 * Process an effective address (ModRM) specification.
192 static uint8_t *do_ea(uint8_t *data, int modrm, int asize,
193 int segsize, operand * op, insn *ins)
195 int mod, rm, scale, index, base;
199 mod = (modrm >> 6) & 03;
202 if (mod != 3 && rm == 4 && asize != 16)
205 if (ins->rex & REX_D) {
206 data = do_drex(data, ins);
212 if (mod == 3) { /* pure register version */
213 op->basereg = rm+(rex & REX_B ? 8 : 0);
214 op->segment |= SEG_RMREG;
223 * <mod> specifies the displacement size (none, byte or
224 * word), and <rm> specifies the register combination.
225 * Exception: mod=0,rm=6 does not specify [BP] as one might
226 * expect, but instead specifies [disp16].
228 op->indexreg = op->basereg = -1;
229 op->scale = 1; /* always, in 16 bits */
260 if (rm == 6 && mod == 0) { /* special case */
264 mod = 2; /* fake disp16 */
268 op->segment |= SEG_NODISP;
271 op->segment |= SEG_DISP8;
272 op->offset = (int8_t)*data++;
275 op->segment |= SEG_DISP16;
276 op->offset = *data++;
277 op->offset |= ((unsigned)*data++) << 8;
283 * Once again, <mod> specifies displacement size (this time
284 * none, byte or *dword*), while <rm> specifies the base
285 * register. Again, [EBP] is missing, replaced by a pure
286 * disp32 (this time that's mod=0,rm=*5*) in 32-bit mode,
287 * and RIP-relative addressing in 64-bit mode.
290 * indicates not a single base register, but instead the
291 * presence of a SIB byte...
293 int a64 = asize == 64;
298 op->basereg = rd_reg64[rm | ((rex & REX_B) ? 8 : 0)];
300 op->basereg = rd_reg32[rm | ((rex & REX_B) ? 8 : 0)];
302 if (rm == 5 && mod == 0) {
304 op->eaflags |= EAF_REL;
305 op->segment |= SEG_RELATIVE;
306 mod = 2; /* fake disp32 */
310 op->addr_size = asize;
313 mod = 2; /* fake disp32 */
316 if (rm == 4) { /* process SIB */
317 scale = (sib >> 6) & 03;
318 index = (sib >> 3) & 07;
321 op->scale = 1 << scale;
324 op->indexreg = -1; /* ESP/RSP/R12 cannot be an index */
326 op->indexreg = rd_reg64[index | ((rex & REX_X) ? 8 : 0)];
328 op->indexreg = rd_reg64[index | ((rex & REX_X) ? 8 : 0)];
330 if (base == 5 && mod == 0) {
332 mod = 2; /* Fake disp32 */
334 op->basereg = rd_reg64[base | ((rex & REX_B) ? 8 : 0)];
336 op->basereg = rd_reg32[base | ((rex & REX_B) ? 8 : 0)];
344 op->segment |= SEG_NODISP;
347 op->segment |= SEG_DISP8;
348 op->offset = gets8(data);
352 op->segment |= SEG_DISP32;
353 op->offset = getu32(data);
362 * Determine whether the instruction template in t corresponds to the data
363 * stream in data. Return the number of bytes matched if so.
365 static int matches(const struct itemplate *t, uint8_t *data,
366 const struct prefix_info *prefix, int segsize, insn *ins)
368 uint8_t *r = (uint8_t *)(t->code);
369 uint8_t *origdata = data;
370 bool a_used = false, o_used = false;
371 enum prefixes drep = 0;
372 uint8_t lock = prefix->lock;
373 int osize = prefix->osize;
374 int asize = prefix->asize;
377 for (i = 0; i < MAX_OPERANDS; i++) {
378 ins->oprs[i].segment = ins->oprs[i].addr_size =
379 (segsize == 64 ? SEG_64BIT : segsize == 32 ? SEG_32BIT : 0);
382 ins->rex = prefix->rex;
384 if (t->flags & (segsize == 64 ? IF_NOLONG : IF_LONG))
387 if (prefix->rep == 0xF2)
389 else if (prefix->rep == 0xF3)
395 /* FIX: change this into a switch */
396 if (c >= 01 && c <= 03) {
400 } else if (c == 04) {
403 ins->oprs[0].basereg = 0;
406 ins->oprs[0].basereg = 2;
409 ins->oprs[0].basereg = 3;
414 } else if (c == 05) {
417 ins->oprs[0].basereg = 4;
420 ins->oprs[0].basereg = 5;
425 } else if (c == 06) {
428 ins->oprs[0].basereg = 0;
431 ins->oprs[0].basereg = 1;
434 ins->oprs[0].basereg = 2;
437 ins->oprs[0].basereg = 3;
442 } else if (c == 07) {
445 ins->oprs[0].basereg = 4;
448 ins->oprs[0].basereg = 5;
453 } else if (c >= 010 && c <= 013) {
454 int t = *r++, d = *data++;
455 if (d < t || d > t + 7)
458 ins->oprs[c - 010].basereg = (d-t)+
459 (ins->rex & REX_B ? 8 : 0);
460 ins->oprs[c - 010].segment |= SEG_RMREG;
462 } else if (c >= 014 && c <= 017) {
463 ins->oprs[c - 014].offset = (int8_t)*data++;
464 ins->oprs[c - 014].segment |= SEG_SIGNED;
465 } else if (c >= 020 && c <= 023) {
466 ins->oprs[c - 020].offset = *data++;
467 } else if (c >= 024 && c <= 027) {
468 ins->oprs[c - 024].offset = *data++;
469 } else if (c >= 030 && c <= 033) {
470 ins->oprs[c - 030].offset = getu16(data);
472 } else if (c >= 034 && c <= 037) {
474 ins->oprs[c - 034].offset = getu32(data);
477 ins->oprs[c - 034].offset = getu16(data);
480 if (segsize != asize)
481 ins->oprs[c - 034].addr_size = asize;
482 } else if (c >= 040 && c <= 043) {
483 ins->oprs[c - 040].offset = getu32(data);
485 } else if (c >= 044 && c <= 047) {
488 ins->oprs[c - 044].offset = getu16(data);
492 ins->oprs[c - 044].offset = getu32(data);
496 ins->oprs[c - 044].offset = getu64(data);
500 if (segsize != asize)
501 ins->oprs[c - 044].addr_size = asize;
502 } else if (c >= 050 && c <= 053) {
503 ins->oprs[c - 050].offset = gets8(data++);
504 ins->oprs[c - 050].segment |= SEG_RELATIVE;
505 } else if (c >= 054 && c <= 057) {
506 ins->oprs[c - 054].offset = getu64(data);
508 } else if (c >= 060 && c <= 063) {
509 ins->oprs[c - 060].offset = gets16(data);
511 ins->oprs[c - 060].segment |= SEG_RELATIVE;
512 ins->oprs[c - 060].segment &= ~SEG_32BIT;
513 } else if (c >= 064 && c <= 067) {
514 ins->oprs[c - 064].segment |= SEG_RELATIVE;
516 ins->oprs[c - 064].offset = getu16(data);
518 ins->oprs[c - 064].segment &= ~(SEG_32BIT|SEG_64BIT);
519 } else if (osize == 32) {
520 ins->oprs[c - 064].offset = getu32(data);
522 ins->oprs[c - 064].segment &= ~SEG_64BIT;
523 ins->oprs[c - 064].segment |= SEG_32BIT;
525 if (segsize != osize) {
526 ins->oprs[c - 064].type =
527 (ins->oprs[c - 064].type & ~SIZE_MASK)
528 | ((osize == 16) ? BITS16 : BITS32);
530 } else if (c >= 070 && c <= 073) {
531 ins->oprs[c - 070].offset = getu32(data);
533 ins->oprs[c - 070].segment |= SEG_32BIT | SEG_RELATIVE;
534 } else if (c >= 0100 && c < 0140) {
536 ins->oprs[c & 07].segment |= SEG_RMREG;
537 data = do_ea(data, modrm, asize, segsize,
538 &ins->oprs[(c >> 3) & 07], ins);
541 ins->oprs[c & 07].basereg = ((modrm >> 3)&7)+
542 (ins->rex & REX_R ? 8 : 0);
543 } else if (c >= 0140 && c <= 0143) {
544 ins->oprs[c - 0140].offset = getu16(data);
546 } else if (c >= 0150 && c <= 0153) {
547 ins->oprs[c - 0150].offset = getu32(data);
549 } else if (c >= 0160 && c <= 0167) {
550 ins->rex |= (c & 4) ? REX_D|REX_OC : REX_D;
551 ins->drexdst = c & 3;
552 } else if (c == 0170) {
555 } else if (c == 0171) {
556 data = do_drex(data, ins);
559 } else if (c >= 0200 && c <= 0277) {
561 if (((modrm >> 3) & 07) != (c & 07))
562 return false; /* spare field doesn't match up */
563 data = do_ea(data, modrm, asize, segsize,
564 &ins->oprs[(c >> 3) & 07], ins);
567 } else if (c == 0310) {
572 } else if (c == 0311) {
577 } else if (c == 0312) {
578 if (asize != segsize)
582 } else if (c == 0313) {
587 } else if (c == 0320) {
592 } else if (c == 0321) {
597 } else if (c == 0322) {
598 if (osize != (segsize == 16) ? 16 : 32)
602 } else if (c == 0323) {
603 ins->rex |= REX_W; /* 64-bit only instruction */
605 } else if (c == 0324) {
606 if (!(ins->rex & (REX_P|REX_W)) || osize != 64)
608 } else if (c == 0330) {
609 int t = *r++, d = *data++;
610 if (d < t || d > t + 15)
613 ins->condition = d - t;
614 } else if (c == 0331) {
617 } else if (c == 0332) {
618 if (prefix->rep != 0xF2)
620 } else if (c == 0333) {
621 if (prefix->rep != 0xF3)
624 } else if (c == 0334) {
629 } else if (c == 0335) {
632 } else if (c == 0364) {
635 } else if (c == 0365) {
638 } else if (c == 0366) {
642 } else if (c == 0367) {
649 /* REX cannot be combined with DREX */
650 if ((ins->rex & REX_D) && (prefix->rex))
654 * Check for unused rep or a/o prefixes.
656 for (i = 0; i < t->operands; i++) {
657 if (ins->oprs[i].segment != SEG_RMREG)
663 ins->prefixes[ins->nprefix++] = P_LOCK;
665 ins->prefixes[ins->nprefix++] = drep;
666 if (!a_used && asize != segsize)
667 ins->prefixes[ins->nprefix++] = asize == 16 ? P_A16 : P_A32;
668 if (!o_used && osize == ((segsize == 16) ? 32 : 16))
669 ins->prefixes[ins->nprefix++] = osize == 16 ? P_O16 : P_O32;
671 /* Fix: check for redundant REX prefixes */
673 return data - origdata;
676 int32_t disasm(uint8_t *data, char *output, int outbufsize, int segsize,
677 int32_t offset, int autosync, uint32_t prefer)
679 const struct itemplate * const *p, * const *best_p;
680 const struct disasm_index *ix;
682 int length, best_length = 0;
684 int i, slen, colon, n;
688 uint32_t goodness, best;
690 struct prefix_info prefix;
692 memset(&ins, 0, sizeof ins);
697 memset(&prefix, 0, sizeof prefix);
698 prefix.asize = segsize;
699 prefix.osize = (segsize == 64) ? 32 : segsize;
703 if (*data == 0xF3 || *data == 0xF2)
704 prefix.rep = *data++;
705 else if (*data == 0xF0)
706 prefix.lock = *data++;
707 else if (*data == 0x2E)
708 segover = "cs", prefix.seg = *data++;
709 else if (*data == 0x36)
710 segover = "ss", prefix.seg = *data++;
711 else if (*data == 0x3E)
712 segover = "ds", prefix.seg = *data++;
713 else if (*data == 0x26)
714 segover = "es", prefix.seg = *data++;
715 else if (*data == 0x64)
716 segover = "fs", prefix.seg = *data++;
717 else if (*data == 0x65)
718 segover = "gs", prefix.seg = *data++;
719 else if (*data == 0x66) {
720 prefix.osize = (segsize == 16) ? 32 : 16;
721 prefix.osp = *data++;
722 } else if (*data == 0x67) {
723 prefix.asize = (segsize == 32) ? 16 : 32;
724 prefix.asp = *data++;
725 } else if (segsize == 64 && (*data & 0xf0) == REX_P) {
726 prefix.rex = *data++;
727 if (prefix.rex & REX_W)
729 break; /* REX is always the last prefix */
735 best = -1; /* Worst possible */
741 while (ix->n == -1) {
742 ix = (const struct disasm_index *)ix->p + *dp++;
745 p = (const struct itemplate * const *)ix->p;
746 for (n = ix->n; n; n--, p++) {
747 if ((length = matches(*p, data, &prefix, segsize, &tmp_ins))) {
750 * Final check to make sure the types of r/m match up.
751 * XXX: Need to make sure this is actually correct.
753 for (i = 0; i < (*p)->operands; i++) {
754 if (!((*p)->opd[i] & SAME_AS) &&
756 /* If it's a mem-only EA but we have a register, die. */
757 ((tmp_ins.oprs[i].segment & SEG_RMREG) &&
758 !(MEMORY & ~(*p)->opd[i])) ||
759 /* If it's a reg-only EA but we have a memory ref, die. */
760 (!(tmp_ins.oprs[i].segment & SEG_RMREG) &&
761 !(REG_EA & ~(*p)->opd[i]) &&
762 !((*p)->opd[i] & REG_SMASK)) ||
763 /* Register type mismatch (eg FS vs REG_DESS): die. */
764 ((((*p)->opd[i] & (REGISTER | FPUREG)) ||
765 (tmp_ins.oprs[i].segment & SEG_RMREG)) &&
766 !whichreg((*p)->opd[i],
767 tmp_ins.oprs[i].basereg, tmp_ins.rex))
775 * Note: we always prefer instructions which incorporate
776 * prefixes in the instructions themselves. This is to allow
777 * e.g. PAUSE to be preferred to REP NOP, and deal with
778 * MMX/SSE instructions where prefixes are used to select
779 * between MMX and SSE register sets or outright opcode
783 goodness = ((*p)->flags & IF_PFMASK) ^ prefer;
784 if (tmp_ins.nprefix < best_pref ||
785 (tmp_ins.nprefix == best_pref && goodness < best)) {
786 /* This is the best one found so far */
789 best_pref = tmp_ins.nprefix;
790 best_length = length;
798 return 0; /* no instruction was matched */
800 /* Pick the best match */
802 length = best_length;
806 /* TODO: snprintf returns the value that the string would have if
807 * the buffer were long enough, and not the actual length of
808 * the returned string, so each instance of using the return
809 * value of snprintf should actually be checked to assure that
810 * the return value is "sane." Maybe a macro wrapper could
811 * be used for that purpose.
813 for (i = 0; i < ins.nprefix; i++)
814 switch (ins.prefixes[i]) {
816 slen += snprintf(output + slen, outbufsize - slen, "lock ");
819 slen += snprintf(output + slen, outbufsize - slen, "rep ");
822 slen += snprintf(output + slen, outbufsize - slen, "repe ");
825 slen += snprintf(output + slen, outbufsize - slen, "repne ");
828 slen += snprintf(output + slen, outbufsize - slen, "a16 ");
831 slen += snprintf(output + slen, outbufsize - slen, "a32 ");
834 slen += snprintf(output + slen, outbufsize - slen, "o16 ");
837 slen += snprintf(output + slen, outbufsize - slen, "o32 ");
843 for (i = 0; i < (int)elements(ico); i++)
844 if ((*p)->opcode == ico[i]) {
846 snprintf(output + slen, outbufsize - slen, "%s%s", icn[i],
847 whichcond(ins.condition));
850 if (i >= (int)elements(ico))
852 snprintf(output + slen, outbufsize - slen, "%s",
853 insn_names[(*p)->opcode]);
855 length += data - origdata; /* fix up for prefixes */
856 for (i = 0; i < (*p)->operands; i++) {
857 opflags_t t = (*p)->opd[i];
858 const operand *o = &ins.oprs[i];
862 o = &ins.oprs[t & ~SAME_AS];
863 t = (*p)->opd[t & ~SAME_AS];
866 output[slen++] = (colon ? ':' : i == 0 ? ' ' : ',');
869 if (o->segment & SEG_RELATIVE) {
870 offs += offset + length;
872 * sort out wraparound
874 if (!(o->segment & (SEG_32BIT|SEG_64BIT)))
877 * add sync marker, if autosync is on
888 if ((t & (REGISTER | FPUREG)) ||
889 (o->segment & SEG_RMREG)) {
891 reg = whichreg(t, o->basereg, ins.rex);
893 slen += snprintf(output + slen, outbufsize - slen, "to ");
894 slen += snprintf(output + slen, outbufsize - slen, "%s",
895 reg_names[reg - EXPR_REG_START]);
896 } else if (!(UNITY & ~t)) {
897 output[slen++] = '1';
898 } else if (t & IMMEDIATE) {
901 snprintf(output + slen, outbufsize - slen, "byte ");
902 if (o->segment & SEG_SIGNED) {
905 output[slen++] = '-';
907 output[slen++] = '+';
909 } else if (t & BITS16) {
911 snprintf(output + slen, outbufsize - slen, "word ");
912 } else if (t & BITS32) {
914 snprintf(output + slen, outbufsize - slen, "dword ");
915 } else if (t & BITS64) {
917 snprintf(output + slen, outbufsize - slen, "qword ");
918 } else if (t & NEAR) {
920 snprintf(output + slen, outbufsize - slen, "near ");
921 } else if (t & SHORT) {
923 snprintf(output + slen, outbufsize - slen, "short ");
926 snprintf(output + slen, outbufsize - slen, "0x%"PRIx64"",
928 } else if (!(MEM_OFFS & ~t)) {
930 snprintf(output + slen, outbufsize - slen, "[%s%s%s0x%"PRIx64"]",
931 (segover ? segover : ""),
932 (segover ? ":" : ""),
934 32 ? "dword " : o->addr_size ==
935 16 ? "word " : ""), offs);
937 } else if (!(REGMEM & ~t)) {
941 snprintf(output + slen, outbufsize - slen, "byte ");
944 snprintf(output + slen, outbufsize - slen, "word ");
947 snprintf(output + slen, outbufsize - slen, "dword ");
950 snprintf(output + slen, outbufsize - slen, "qword ");
953 snprintf(output + slen, outbufsize - slen, "tword ");
955 slen += snprintf(output + slen, outbufsize - slen, "far ");
958 snprintf(output + slen, outbufsize - slen, "near ");
959 output[slen++] = '[';
961 slen += snprintf(output + slen, outbufsize - slen, "%s",
962 (o->addr_size == 64 ? "qword " :
963 o->addr_size == 32 ? "dword " :
964 o->addr_size == 16 ? "word " :
966 if (o->eaflags & EAF_REL)
967 slen += snprintf(output + slen, outbufsize - slen, "rel ");
970 snprintf(output + slen, outbufsize - slen, "%s:",
974 if (o->basereg != -1) {
975 slen += snprintf(output + slen, outbufsize - slen, "%s",
976 reg_names[(o->basereg -
980 if (o->indexreg != -1) {
982 output[slen++] = '+';
983 slen += snprintf(output + slen, outbufsize - slen, "%s",
984 reg_names[(o->indexreg -
988 snprintf(output + slen, outbufsize - slen, "*%d",
992 if (o->segment & SEG_DISP8) {
994 int8_t offset = offs;
1000 snprintf(output + slen, outbufsize - slen, "%s0x%"PRIx8"",
1001 minus ? "-" : "+", offset);
1002 } else if (o->segment & SEG_DISP16) {
1004 int16_t offset = offs;
1010 snprintf(output + slen, outbufsize - slen, "%s0x%"PRIx16"",
1011 minus ? "-" : started ? "+" : "", offset);
1012 } else if (o->segment & SEG_DISP32) {
1014 int32_t offset = offs;
1019 prefix = started ? "+" : "";
1022 snprintf(output + slen, outbufsize - slen,
1023 "%s0x%"PRIx32"", prefix, offset);
1025 output[slen++] = ']';
1028 snprintf(output + slen, outbufsize - slen, "<operand%d>",
1032 output[slen] = '\0';
1033 if (segover) { /* unused segment override */
1035 int count = slen + 1;
1037 p[count + 3] = p[count];
1038 strncpy(output, segover, 2);
1044 int32_t eatbyte(uint8_t *data, char *output, int outbufsize)
1046 snprintf(output, outbufsize, "db 0x%02X", *data);