1 /* disasm.c where all the _work_ gets done in the Netwide Disassembler
3 * The Netwide Assembler is copyright (C) 1996 Simon Tatham and
4 * Julian Hall. All rights reserved. The software is
5 * redistributable under the licence given in the file "Licence"
6 * distributed in the NASM archive.
8 * initial version 27/iii/95 by Simon Tatham
23 * Flags that go into the `segment' field of `insn' structures
26 #define SEG_RELATIVE 1
33 #define SEG_SIGNED 128
38 #define getu8(x) (*(uint8_t *)(x))
39 #if defined(__i386__) || defined(__x86_64__)
40 /* Littleendian CPU which can handle unaligned references */
41 #define getu16(x) (*(uint16_t *)(x))
42 #define getu32(x) (*(uint32_t *)(x))
43 #define getu64(x) (*(uint64_t *)(x))
45 static uint16_t getu16(uint8_t *data)
47 return (uint16_t)data[0] + ((uint16_t)data[1] << 8);
49 static uint32_t getu32(uint8_t *data)
51 return (uint32_t)getu16(data) + ((uint32_t)getu16(data+2) << 16);
53 static uint64_t getu64(uint8_t *data)
55 return (uint64_t)getu32(data) + ((uint64_t)getu32(data+4) << 32);
59 #define gets8(x) ((int8_t)getu8(x))
60 #define gets16(x) ((int16_t)getu16(x))
61 #define gets32(x) ((int32_t)getu32(x))
62 #define gets64(x) ((int64_t)getu64(x))
64 /* Important: regval must already have been adjusted for rex extensions */
65 static int whichreg(int32_t regflags, int regval, int rex)
67 if (!(REG_AL & ~regflags))
69 if (!(REG_AX & ~regflags))
71 if (!(REG_EAX & ~regflags))
73 if (!(REG_RAX & ~regflags))
75 if (!(REG_DL & ~regflags))
77 if (!(REG_DX & ~regflags))
79 if (!(REG_EDX & ~regflags))
81 if (!(REG_RDX & ~regflags))
83 if (!(REG_CL & ~regflags))
85 if (!(REG_CX & ~regflags))
87 if (!(REG_ECX & ~regflags))
89 if (!(REG_RCX & ~regflags))
91 if (!(FPU0 & ~regflags))
93 if (!(REG_CS & ~regflags))
94 return (regval == 1) ? R_CS : 0;
95 if (!(REG_DESS & ~regflags))
96 return (regval == 0 || regval == 2
97 || regval == 3 ? rd_sreg[regval] : 0);
98 if (!(REG_FSGS & ~regflags))
99 return (regval == 4 || regval == 5 ? rd_sreg[regval] : 0);
100 if (!(REG_SEG67 & ~regflags))
101 return (regval == 6 || regval == 7 ? rd_sreg[regval] : 0);
103 /* All the entries below look up regval in an 16-entry array */
104 if (regval < 0 || regval > 15)
107 if (!((REGMEM | BITS8) & ~regflags)) {
109 return rd_reg8_rex[regval];
111 return rd_reg8[regval];
113 if (!((REGMEM | BITS16) & ~regflags))
114 return rd_reg16[regval];
115 if (!((REGMEM | BITS32) & ~regflags))
116 return rd_reg32[regval];
117 if (!((REGMEM | BITS64) & ~regflags))
118 return rd_reg64[regval];
119 if (!(REG_SREG & ~regflags))
120 return rd_sreg[regval & 7]; /* Ignore REX */
121 if (!(REG_CREG & ~regflags))
122 return rd_creg[regval];
123 if (!(REG_DREG & ~regflags))
124 return rd_dreg[regval];
125 if (!(REG_TREG & ~regflags)) {
127 return 0; /* TR registers are ill-defined with rex */
128 return rd_treg[regval];
130 if (!(FPUREG & ~regflags))
131 return rd_fpureg[regval & 7]; /* Ignore REX */
132 if (!(MMXREG & ~regflags))
133 return rd_mmxreg[regval & 7]; /* Ignore REX */
134 if (!(XMMREG & ~regflags))
135 return rd_xmmreg[regval];
140 static const char *whichcond(int condval)
142 static int conds[] = {
143 C_O, C_NO, C_C, C_NC, C_Z, C_NZ, C_NA, C_A,
144 C_S, C_NS, C_PE, C_PO, C_L, C_NL, C_NG, C_G
146 return conditions[conds[condval]];
150 * Process an effective address (ModRM) specification.
152 static uint8_t *do_ea(uint8_t *data, int modrm, int asize,
153 int segsize, operand * op, int rex)
155 int mod, rm, scale, index, base;
157 mod = (modrm >> 6) & 03;
160 if (mod == 3) { /* pure register version */
161 op->basereg = rm+(rex & REX_B ? 8 : 0);
162 op->segment |= SEG_RMREG;
171 * <mod> specifies the displacement size (none, byte or
172 * word), and <rm> specifies the register combination.
173 * Exception: mod=0,rm=6 does not specify [BP] as one might
174 * expect, but instead specifies [disp16].
176 op->indexreg = op->basereg = -1;
177 op->scale = 1; /* always, in 16 bits */
208 if (rm == 6 && mod == 0) { /* special case */
212 mod = 2; /* fake disp16 */
216 op->segment |= SEG_NODISP;
219 op->segment |= SEG_DISP8;
220 op->offset = (int8_t)*data++;
223 op->segment |= SEG_DISP16;
224 op->offset = *data++;
225 op->offset |= ((unsigned)*data++) << 8;
231 * Once again, <mod> specifies displacement size (this time
232 * none, byte or *dword*), while <rm> specifies the base
233 * register. Again, [EBP] is missing, replaced by a pure
234 * disp32 (this time that's mod=0,rm=*5*) in 32-bit mode,
235 * and RIP-relative addressing in 64-bit mode.
238 * indicates not a single base register, but instead the
239 * presence of a SIB byte...
241 int a64 = asize == 64;
246 op->basereg = rd_reg64[rm | ((rex & REX_B) ? 8 : 0)];
248 op->basereg = rd_reg32[rm | ((rex & REX_B) ? 8 : 0)];
250 if (rm == 5 && mod == 0) {
252 op->eaflags |= EAF_REL;
253 op->segment |= SEG_RELATIVE;
254 mod = 2; /* fake disp32 */
258 op->addr_size = asize;
261 mod = 2; /* fake disp32 */
264 if (rm == 4) { /* process SIB */
265 scale = (*data >> 6) & 03;
266 index = (*data >> 3) & 07;
270 op->scale = 1 << scale;
273 op->indexreg = -1; /* ESP/RSP/R12 cannot be an index */
275 op->indexreg = rd_reg64[index | ((rex & REX_X) ? 8 : 0)];
277 op->indexreg = rd_reg64[index | ((rex & REX_X) ? 8 : 0)];
279 if (base == 5 && mod == 0) {
281 mod = 2; /* Fake disp32 */
283 op->basereg = rd_reg64[base | ((rex & REX_B) ? 8 : 0)];
285 op->basereg = rd_reg32[base | ((rex & REX_B) ? 8 : 0)];
293 op->segment |= SEG_NODISP;
296 op->segment |= SEG_DISP8;
297 op->offset = gets8(data);
301 op->segment |= SEG_DISP32;
302 op->offset = getu32(data);
311 * Determine whether the instruction template in t corresponds to the data
312 * stream in data. Return the number of bytes matched if so.
314 static int matches(const struct itemplate *t, uint8_t *data, int asize,
315 int osize, int segsize, int rep, insn * ins,
316 int rex, int *rexout, int lock)
318 uint8_t *r = (uint8_t *)(t->code);
319 uint8_t *origdata = data;
320 int a_used = FALSE, o_used = FALSE;
325 if (t->flags & (segsize == 64 ? IF_NOLONG : IF_LONG))
330 else if (rep == 0xF3)
336 /* FIX: change this into a switch */
337 if (c >= 01 && c <= 03) {
341 } else if (c == 04) {
344 ins->oprs[0].basereg = 0;
347 ins->oprs[0].basereg = 2;
350 ins->oprs[0].basereg = 3;
355 } else if (c == 05) {
358 ins->oprs[0].basereg = 4;
361 ins->oprs[0].basereg = 5;
366 } else if (c == 06) {
369 ins->oprs[0].basereg = 0;
372 ins->oprs[0].basereg = 1;
375 ins->oprs[0].basereg = 2;
378 ins->oprs[0].basereg = 3;
383 } else if (c == 07) {
386 ins->oprs[0].basereg = 4;
389 ins->oprs[0].basereg = 5;
394 } else if (c >= 010 && c <= 012) {
395 int t = *r++, d = *data++;
396 if (d < t || d > t + 7)
399 ins->oprs[c - 010].basereg = (d-t)+(rex & REX_B ? 8 : 0);
400 ins->oprs[c - 010].segment |= SEG_RMREG;
402 } else if (c == 017) {
405 } else if (c >= 014 && c <= 016) {
406 ins->oprs[c - 014].offset = (int8_t)*data++;
407 ins->oprs[c - 014].segment |= SEG_SIGNED;
408 } else if (c >= 020 && c <= 022) {
409 ins->oprs[c - 020].offset = *data++;
410 } else if (c >= 024 && c <= 026) {
411 ins->oprs[c - 024].offset = *data++;
412 } else if (c >= 030 && c <= 032) {
413 ins->oprs[c - 030].offset = getu16(data);
415 } else if (c >= 034 && c <= 036) {
417 ins->oprs[c - 034].offset = getu32(data);
420 ins->oprs[c - 034].offset = getu16(data);
423 if (segsize != asize)
424 ins->oprs[c - 034].addr_size = asize;
425 } else if (c >= 040 && c <= 042) {
426 ins->oprs[c - 040].offset = getu32(data);
428 } else if (c >= 044 && c <= 046) {
431 ins->oprs[c - 044].offset = getu16(data);
435 ins->oprs[c - 044].offset = getu32(data);
439 ins->oprs[c - 044].offset = getu64(data);
443 if (segsize != asize)
444 ins->oprs[c - 044].addr_size = asize;
445 } else if (c >= 050 && c <= 052) {
446 ins->oprs[c - 050].offset = gets8(data++);
447 ins->oprs[c - 050].segment |= SEG_RELATIVE;
448 } else if (c >= 054 && c <= 056) {
449 ins->oprs[c - 054].offset = getu64(data);
451 } else if (c >= 060 && c <= 062) {
452 ins->oprs[c - 060].offset = gets16(data);
454 ins->oprs[c - 060].segment |= SEG_RELATIVE;
455 ins->oprs[c - 060].segment &= ~SEG_32BIT;
456 } else if (c >= 064 && c <= 066) {
458 ins->oprs[c - 064].offset = getu16(data);
460 ins->oprs[c - 064].segment &= ~(SEG_32BIT|SEG_64BIT);
461 } else if (osize == 32) {
462 ins->oprs[c - 064].offset = getu32(data);
464 ins->oprs[c - 064].segment &= ~SEG_64BIT;
465 ins->oprs[c - 064].segment |= SEG_32BIT;
467 if (segsize != osize) {
468 ins->oprs[c - 064].type =
469 (ins->oprs[c - 064].type & ~SIZE_MASK)
470 | ((osize == 16) ? BITS16 : BITS32);
472 } else if (c >= 070 && c <= 072) {
473 ins->oprs[c - 070].offset = getu32(data);
475 ins->oprs[c - 070].segment |= SEG_32BIT | SEG_RELATIVE;
476 } else if (c >= 0100 && c < 0130) {
478 ins->oprs[c & 07].basereg = ((modrm >> 3)&7)+(rex & REX_R ? 8 : 0);
479 ins->oprs[c & 07].segment |= SEG_RMREG;
480 data = do_ea(data, modrm, asize, segsize,
481 &ins->oprs[(c >> 3) & 07], rex);
482 } else if (c >= 0130 && c <= 0132) {
483 ins->oprs[c - 0130].offset = getu16(data);
485 } else if (c >= 0140 && c <= 0142) {
486 ins->oprs[c - 0140].offset = getu32(data);
488 } else if (c >= 0200 && c <= 0277) {
490 if (((modrm >> 3) & 07) != (c & 07))
491 return FALSE; /* spare field doesn't match up */
492 data = do_ea(data, modrm, asize, segsize,
493 &ins->oprs[(c >> 3) & 07], rex);
494 } else if (c >= 0300 && c <= 0302) {
496 } else if (c == 0310) {
501 } else if (c == 0311) {
506 } else if (c == 0312) {
507 if (asize != segsize)
511 } else if (c == 0313) {
516 } else if (c == 0320) {
521 } else if (c == 0321) {
526 } else if (c == 0322) {
527 if (osize != (segsize == 16) ? 16 : 32)
531 } else if (c == 0323) {
532 rex |= REX_W; /* 64-bit only instruction */
534 } else if (c == 0324) {
535 if (!(rex & (REX_P|REX_W)) || osize != 64)
537 } else if (c == 0330) {
538 int t = *r++, d = *data++;
539 if (d < t || d > t + 15)
542 ins->condition = d - t;
543 } else if (c == 0331) {
546 } else if (c == 0332) {
549 } else if (c == 0333) {
553 } else if (c == 0334) {
562 * Check for unused rep or a/o prefixes.
566 ins->prefixes[ins->nprefix++] = P_LOCK;
568 ins->prefixes[ins->nprefix++] = drep;
569 if (!a_used && asize != segsize)
570 ins->prefixes[ins->nprefix++] = asize == 16 ? P_A16 : P_A32;
571 if (!o_used && osize == ((segsize == 16) ? 32 : 16))
572 ins->prefixes[ins->nprefix++] = osize == 16 ? P_O16 : P_O32;
574 /* Fix: check for redundant REX prefixes */
577 return data - origdata;
580 int32_t disasm(uint8_t *data, char *output, int outbufsize, int segsize,
581 int32_t offset, int autosync, uint32_t prefer)
583 const struct itemplate * const *p, * const *best_p;
584 int length, best_length = 0;
586 int rep, lock, asize, osize, i, slen, colon, rex, rexout, best_rex;
590 uint32_t goodness, best;
592 memset(&ins, 0, sizeof ins);
598 osize = (segsize == 64) ? 32 : segsize;
604 if (*data == 0xF3 || *data == 0xF2)
606 else if (*data == 0xF0)
608 else if (*data == 0x2E)
609 segover = "cs", data++;
610 else if (*data == 0x36)
611 segover = "ss", data++;
612 else if (*data == 0x3E)
613 segover = "ds", data++;
614 else if (*data == 0x26)
615 segover = "es", data++;
616 else if (*data == 0x64)
617 segover = "fs", data++;
618 else if (*data == 0x65)
619 segover = "gs", data++;
620 else if (*data == 0x66) {
621 osize = (segsize == 16) ? 32 : 16;
623 } else if (*data == 0x67) {
624 asize = (segsize == 32) ? 16 : 32;
626 } else if (segsize == 64 && (*data & 0xf0) == REX_P) {
630 break; /* REX is always the last prefix */
636 tmp_ins.oprs[0].segment = tmp_ins.oprs[1].segment =
637 tmp_ins.oprs[2].segment =
638 tmp_ins.oprs[0].addr_size = tmp_ins.oprs[1].addr_size =
639 tmp_ins.oprs[2].addr_size = (segsize == 64 ? SEG_64BIT :
640 segsize == 32 ? SEG_32BIT : 0);
641 tmp_ins.condition = -1;
642 best = -1; /* Worst possible */
645 for (p = itable[*data]; *p; p++) {
646 if ((length = matches(*p, data, asize, osize, segsize, rep,
647 &tmp_ins, rex, &rexout, lock))) {
650 * Final check to make sure the types of r/m match up.
651 * XXX: Need to make sure this is actually correct.
653 for (i = 0; i < (*p)->operands; i++) {
655 /* If it's a mem-only EA but we have a register, die. */
656 ((tmp_ins.oprs[i].segment & SEG_RMREG) &&
657 !(MEMORY & ~(*p)->opd[i])) ||
658 /* If it's a reg-only EA but we have a memory ref, die. */
659 (!(tmp_ins.oprs[i].segment & SEG_RMREG) &&
660 !(REG_EA & ~(*p)->opd[i]) &&
661 !((*p)->opd[i] & REG_SMASK)) ||
662 /* Register type mismatch (eg FS vs REG_DESS): die. */
663 ((((*p)->opd[i] & (REGISTER | FPUREG)) ||
664 (tmp_ins.oprs[i].segment & SEG_RMREG)) &&
665 !whichreg((*p)->opd[i],
666 tmp_ins.oprs[i].basereg, rexout))) {
673 goodness = ((*p)->flags & IF_PFMASK) ^ prefer;
674 if (goodness < best) {
675 /* This is the best one found so far */
678 best_length = length;
687 return 0; /* no instruction was matched */
689 /* Pick the best match */
691 length = best_length;
693 if (best_rex & REX_W)
698 /* TODO: snprintf returns the value that the string would have if
699 * the buffer were long enough, and not the actual length of
700 * the returned string, so each instance of using the return
701 * value of snprintf should actually be checked to assure that
702 * the return value is "sane." Maybe a macro wrapper could
703 * be used for that purpose.
705 for (i = 0; i < ins.nprefix; i++)
706 switch (ins.prefixes[i]) {
708 slen += snprintf(output + slen, outbufsize - slen, "lock ");
711 slen += snprintf(output + slen, outbufsize - slen, "rep ");
714 slen += snprintf(output + slen, outbufsize - slen, "repe ");
717 slen += snprintf(output + slen, outbufsize - slen, "repne ");
720 slen += snprintf(output + slen, outbufsize - slen, "a16 ");
723 slen += snprintf(output + slen, outbufsize - slen, "a32 ");
726 slen += snprintf(output + slen, outbufsize - slen, "o16 ");
729 slen += snprintf(output + slen, outbufsize - slen, "o32 ");
733 for (i = 0; i < elements(ico); i++)
734 if ((*p)->opcode == ico[i]) {
736 snprintf(output + slen, outbufsize - slen, "%s%s", icn[i],
737 whichcond(ins.condition));
740 if (i >= elements(ico))
742 snprintf(output + slen, outbufsize - slen, "%s",
743 insn_names[(*p)->opcode]);
745 length += data - origdata; /* fix up for prefixes */
746 for (i = 0; i < (*p)->operands; i++) {
747 output[slen++] = (colon ? ':' : i == 0 ? ' ' : ',');
749 if (ins.oprs[i].segment & SEG_RELATIVE) {
750 ins.oprs[i].offset += offset + length;
752 * sort out wraparound
754 if (!(ins.oprs[i].segment & (SEG_32BIT|SEG_64BIT)))
755 ins.oprs[i].offset &= 0xffff;
757 * add sync marker, if autosync is on
760 add_sync(ins.oprs[i].offset, 0L);
763 if ((*p)->opd[i] & COLON)
768 if (((*p)->opd[i] & (REGISTER | FPUREG)) ||
769 (ins.oprs[i].segment & SEG_RMREG)) {
770 ins.oprs[i].basereg = whichreg((*p)->opd[i],
771 ins.oprs[i].basereg, rex);
772 if ((*p)->opd[i] & TO)
773 slen += snprintf(output + slen, outbufsize - slen, "to ");
774 slen += snprintf(output + slen, outbufsize - slen, "%s",
775 reg_names[ins.oprs[i].basereg -
777 } else if (!(UNITY & ~(*p)->opd[i])) {
778 output[slen++] = '1';
779 } else if ((*p)->opd[i] & IMMEDIATE) {
780 if ((*p)->opd[i] & BITS8) {
782 snprintf(output + slen, outbufsize - slen, "byte ");
783 if (ins.oprs[i].segment & SEG_SIGNED) {
784 if (ins.oprs[i].offset < 0) {
785 ins.oprs[i].offset *= -1;
786 output[slen++] = '-';
788 output[slen++] = '+';
790 } else if ((*p)->opd[i] & BITS16) {
792 snprintf(output + slen, outbufsize - slen, "word ");
793 } else if ((*p)->opd[i] & BITS32) {
795 snprintf(output + slen, outbufsize - slen, "dword ");
796 } else if ((*p)->opd[i] & BITS64) {
798 snprintf(output + slen, outbufsize - slen, "qword ");
799 } else if ((*p)->opd[i] & NEAR) {
801 snprintf(output + slen, outbufsize - slen, "near ");
802 } else if ((*p)->opd[i] & SHORT) {
804 snprintf(output + slen, outbufsize - slen, "short ");
807 snprintf(output + slen, outbufsize - slen, "0x%"PRIx64"",
809 } else if (!(MEM_OFFS & ~(*p)->opd[i])) {
811 snprintf(output + slen, outbufsize - slen, "[%s%s%s0x%"PRIx64"]",
812 ((const char*)segover ? (const char*)segover : ""), /* placate type mistmatch warning */
813 ((const char*)segover ? ":" : ""), /* by using (const char*) instead of uint8_t* */
814 (ins.oprs[i].addr_size ==
815 32 ? "dword " : ins.oprs[i].addr_size ==
816 16 ? "word " : ""), ins.oprs[i].offset);
818 } else if (!(REGMEM & ~(*p)->opd[i])) {
820 if ((*p)->opd[i] & BITS8)
822 snprintf(output + slen, outbufsize - slen, "byte ");
823 if ((*p)->opd[i] & BITS16)
825 snprintf(output + slen, outbufsize - slen, "word ");
826 if ((*p)->opd[i] & BITS32)
828 snprintf(output + slen, outbufsize - slen, "dword ");
829 if ((*p)->opd[i] & BITS64)
831 snprintf(output + slen, outbufsize - slen, "qword ");
832 if ((*p)->opd[i] & BITS80)
834 snprintf(output + slen, outbufsize - slen, "tword ");
835 if ((*p)->opd[i] & FAR)
836 slen += snprintf(output + slen, outbufsize - slen, "far ");
837 if ((*p)->opd[i] & NEAR)
839 snprintf(output + slen, outbufsize - slen, "near ");
840 output[slen++] = '[';
841 if (ins.oprs[i].addr_size)
842 slen += snprintf(output + slen, outbufsize - slen, "%s",
843 (ins.oprs[i].addr_size == 64 ? "qword " :
844 ins.oprs[i].addr_size == 32 ? "dword " :
845 ins.oprs[i].addr_size == 16 ? "word " :
847 if (ins.oprs[i].eaflags & EAF_REL)
848 slen += snprintf(output + slen, outbufsize - slen, "rel ");
851 snprintf(output + slen, outbufsize - slen, "%s:",
855 if (ins.oprs[i].basereg != -1) {
856 slen += snprintf(output + slen, outbufsize - slen, "%s",
857 reg_names[(ins.oprs[i].basereg -
861 if (ins.oprs[i].indexreg != -1) {
863 output[slen++] = '+';
864 slen += snprintf(output + slen, outbufsize - slen, "%s",
865 reg_names[(ins.oprs[i].indexreg -
867 if (ins.oprs[i].scale > 1)
869 snprintf(output + slen, outbufsize - slen, "*%d",
873 if (ins.oprs[i].segment & SEG_DISP8) {
875 int8_t offset = ins.oprs[i].offset;
881 snprintf(output + slen, outbufsize - slen, "%s0x%"PRIx8"",
882 minus ? "-" : "+", offset);
883 } else if (ins.oprs[i].segment & SEG_DISP16) {
885 int16_t offset = ins.oprs[i].offset;
891 snprintf(output + slen, outbufsize - slen, "%s0x%"PRIx16"",
892 minus ? "-" : started ? "+" : "", offset);
893 } else if (ins.oprs[i].segment & SEG_DISP32) {
895 int32_t offset = ins.oprs[i].offset;
900 prefix = started ? "+" : "";
903 snprintf(output + slen, outbufsize - slen,
904 "%s0x%"PRIx32"", prefix, offset);
906 output[slen++] = ']';
909 snprintf(output + slen, outbufsize - slen, "<operand%d>",
914 if (segover) { /* unused segment override */
916 int count = slen + 1;
918 p[count + 3] = p[count];
919 strncpy(output, segover, 2);
925 int32_t eatbyte(uint8_t *data, char *output, int outbufsize)
927 snprintf(output, outbufsize, "db 0x%02X", *data);