1 /* disasm.c where all the _work_ gets done in the Netwide Disassembler
3 * The Netwide Assembler is copyright (C) 1996 Simon Tatham and
4 * Julian Hall. All rights reserved. The software is
5 * redistributable under the licence given in the file "Licence"
6 * distributed in the NASM archive.
8 * initial version 27/iii/95 by Simon Tatham
26 * Flags that go into the `segment' field of `insn' structures
29 #define SEG_RELATIVE 1
36 #define SEG_SIGNED 128
45 uint8_t osize; /* Operand size */
46 uint8_t asize; /* Address size */
47 uint8_t osp; /* Operand size prefix present */
48 uint8_t asp; /* Address size prefix present */
49 uint8_t rep; /* Rep prefix present */
50 uint8_t seg; /* Segment override prefix present */
51 uint8_t lock; /* Lock prefix present */
52 uint8_t rex; /* Rex prefix present */
55 #define getu8(x) (*(uint8_t *)(x))
56 #if defined(__i386__) || defined(__x86_64__)
57 /* Littleendian CPU which can handle unaligned references */
58 #define getu16(x) (*(uint16_t *)(x))
59 #define getu32(x) (*(uint32_t *)(x))
60 #define getu64(x) (*(uint64_t *)(x))
62 static uint16_t getu16(uint8_t *data)
64 return (uint16_t)data[0] + ((uint16_t)data[1] << 8);
66 static uint32_t getu32(uint8_t *data)
68 return (uint32_t)getu16(data) + ((uint32_t)getu16(data+2) << 16);
70 static uint64_t getu64(uint8_t *data)
72 return (uint64_t)getu32(data) + ((uint64_t)getu32(data+4) << 32);
76 #define gets8(x) ((int8_t)getu8(x))
77 #define gets16(x) ((int16_t)getu16(x))
78 #define gets32(x) ((int32_t)getu32(x))
79 #define gets64(x) ((int64_t)getu64(x))
81 /* Important: regval must already have been adjusted for rex extensions */
82 static enum reg_enum whichreg(int32_t regflags, int regval, int rex)
84 if (!(regflags & (REGISTER|REGMEM)))
85 return 0; /* Registers not permissible?! */
89 if (!(REG_AL & ~regflags))
91 if (!(REG_AX & ~regflags))
93 if (!(REG_EAX & ~regflags))
95 if (!(REG_RAX & ~regflags))
97 if (!(REG_DL & ~regflags))
99 if (!(REG_DX & ~regflags))
101 if (!(REG_EDX & ~regflags))
103 if (!(REG_RDX & ~regflags))
105 if (!(REG_CL & ~regflags))
107 if (!(REG_CX & ~regflags))
109 if (!(REG_ECX & ~regflags))
111 if (!(REG_RCX & ~regflags))
113 if (!(FPU0 & ~regflags))
115 if (!(REG_CS & ~regflags))
116 return (regval == 1) ? R_CS : 0;
117 if (!(REG_DESS & ~regflags))
118 return (regval == 0 || regval == 2
119 || regval == 3 ? rd_sreg[regval] : 0);
120 if (!(REG_FSGS & ~regflags))
121 return (regval == 4 || regval == 5 ? rd_sreg[regval] : 0);
122 if (!(REG_SEG67 & ~regflags))
123 return (regval == 6 || regval == 7 ? rd_sreg[regval] : 0);
125 /* All the entries below look up regval in an 16-entry array */
126 if (regval < 0 || regval > 15)
129 if (!(REG8 & ~regflags)) {
131 return rd_reg8_rex[regval];
133 return rd_reg8[regval];
135 if (!(REG16 & ~regflags))
136 return rd_reg16[regval];
137 if (!(REG32 & ~regflags))
138 return rd_reg32[regval];
139 if (!(REG64 & ~regflags))
140 return rd_reg64[regval];
141 if (!(REG_SREG & ~regflags))
142 return rd_sreg[regval & 7]; /* Ignore REX */
143 if (!(REG_CREG & ~regflags))
144 return rd_creg[regval];
145 if (!(REG_DREG & ~regflags))
146 return rd_dreg[regval];
147 if (!(REG_TREG & ~regflags)) {
149 return 0; /* TR registers are ill-defined with rex */
150 return rd_treg[regval];
152 if (!(FPUREG & ~regflags))
153 return rd_fpureg[regval & 7]; /* Ignore REX */
154 if (!(MMXREG & ~regflags))
155 return rd_mmxreg[regval & 7]; /* Ignore REX */
156 if (!(XMMREG & ~regflags))
157 return rd_xmmreg[regval];
162 static const char *whichcond(int condval)
164 static int conds[] = {
165 C_O, C_NO, C_C, C_NC, C_Z, C_NZ, C_NA, C_A,
166 C_S, C_NS, C_PE, C_PO, C_L, C_NL, C_NG, C_G
168 return conditions[conds[condval]];
172 * Process a DREX suffix
174 static uint8_t *do_drex(uint8_t *data, insn *ins)
176 uint8_t drex = *data++;
177 operand *dst = &ins->oprs[ins->drexdst];
179 if ((drex & 8) != ((ins->rex & REX_OC) ? 8 : 0))
180 return NULL; /* OC0 mismatch */
181 ins->rex = (ins->rex & ~7) | (drex & 7);
183 dst->segment = SEG_RMREG;
184 dst->basereg = drex >> 4;
190 * Process an effective address (ModRM) specification.
192 static uint8_t *do_ea(uint8_t *data, int modrm, int asize,
193 int segsize, operand * op, insn *ins)
195 int mod, rm, scale, index, base;
199 mod = (modrm >> 6) & 03;
202 if (mod != 3 && rm == 4 && asize != 16)
205 if (ins->rex & REX_D) {
206 data = do_drex(data, ins);
212 if (mod == 3) { /* pure register version */
213 op->basereg = rm+(rex & REX_B ? 8 : 0);
214 op->segment |= SEG_RMREG;
223 * <mod> specifies the displacement size (none, byte or
224 * word), and <rm> specifies the register combination.
225 * Exception: mod=0,rm=6 does not specify [BP] as one might
226 * expect, but instead specifies [disp16].
228 op->indexreg = op->basereg = -1;
229 op->scale = 1; /* always, in 16 bits */
260 if (rm == 6 && mod == 0) { /* special case */
264 mod = 2; /* fake disp16 */
268 op->segment |= SEG_NODISP;
271 op->segment |= SEG_DISP8;
272 op->offset = (int8_t)*data++;
275 op->segment |= SEG_DISP16;
276 op->offset = *data++;
277 op->offset |= ((unsigned)*data++) << 8;
283 * Once again, <mod> specifies displacement size (this time
284 * none, byte or *dword*), while <rm> specifies the base
285 * register. Again, [EBP] is missing, replaced by a pure
286 * disp32 (this time that's mod=0,rm=*5*) in 32-bit mode,
287 * and RIP-relative addressing in 64-bit mode.
290 * indicates not a single base register, but instead the
291 * presence of a SIB byte...
293 int a64 = asize == 64;
298 op->basereg = rd_reg64[rm | ((rex & REX_B) ? 8 : 0)];
300 op->basereg = rd_reg32[rm | ((rex & REX_B) ? 8 : 0)];
302 if (rm == 5 && mod == 0) {
304 op->eaflags |= EAF_REL;
305 op->segment |= SEG_RELATIVE;
306 mod = 2; /* fake disp32 */
310 op->disp_size = asize;
313 mod = 2; /* fake disp32 */
316 if (rm == 4) { /* process SIB */
317 scale = (sib >> 6) & 03;
318 index = (sib >> 3) & 07;
321 op->scale = 1 << scale;
324 op->indexreg = -1; /* ESP/RSP/R12 cannot be an index */
326 op->indexreg = rd_reg64[index | ((rex & REX_X) ? 8 : 0)];
328 op->indexreg = rd_reg64[index | ((rex & REX_X) ? 8 : 0)];
330 if (base == 5 && mod == 0) {
332 mod = 2; /* Fake disp32 */
334 op->basereg = rd_reg64[base | ((rex & REX_B) ? 8 : 0)];
336 op->basereg = rd_reg32[base | ((rex & REX_B) ? 8 : 0)];
344 op->segment |= SEG_NODISP;
347 op->segment |= SEG_DISP8;
348 op->offset = gets8(data);
352 op->segment |= SEG_DISP32;
353 op->offset = getu32(data);
362 * Determine whether the instruction template in t corresponds to the data
363 * stream in data. Return the number of bytes matched if so.
365 #define case4(x) case (x): case (x)+1: case (x)+2: case (x)+3
367 static int matches(const struct itemplate *t, uint8_t *data,
368 const struct prefix_info *prefix, int segsize, insn *ins)
370 uint8_t *r = (uint8_t *)(t->code);
371 uint8_t *origdata = data;
372 bool a_used = false, o_used = false;
373 enum prefixes drep = 0;
374 uint8_t lock = prefix->lock;
375 int osize = prefix->osize;
376 int asize = prefix->asize;
379 for (i = 0; i < MAX_OPERANDS; i++) {
380 ins->oprs[i].segment = ins->oprs[i].disp_size =
381 (segsize == 64 ? SEG_64BIT : segsize == 32 ? SEG_32BIT : 0);
384 ins->rex = prefix->rex;
385 memset(ins->prefixes, 0, sizeof ins->prefixes);
387 if (t->flags & (segsize == 64 ? IF_NOLONG : IF_LONG))
390 if (prefix->rep == 0xF2)
392 else if (prefix->rep == 0xF3)
395 while ((c = *r++) != 0) {
408 ins->oprs[0].basereg = 0;
411 ins->oprs[0].basereg = 2;
414 ins->oprs[0].basereg = 3;
424 ins->oprs[0].basereg = 4;
427 ins->oprs[0].basereg = 5;
437 ins->oprs[0].basereg = 0;
440 ins->oprs[0].basereg = 1;
443 ins->oprs[0].basereg = 2;
446 ins->oprs[0].basereg = 3;
456 ins->oprs[0].basereg = 4;
459 ins->oprs[0].basereg = 5;
468 int t = *r++, d = *data++;
469 if (d < t || d > t + 7)
472 ins->oprs[c - 010].basereg = (d-t)+
473 (ins->rex & REX_B ? 8 : 0);
474 ins->oprs[c - 010].segment |= SEG_RMREG;
480 ins->oprs[c - 014].offset = (int8_t)*data++;
481 ins->oprs[c - 014].segment |= SEG_SIGNED;
485 ins->oprs[c - 020].offset = *data++;
489 ins->oprs[c - 024].offset = *data++;
493 ins->oprs[c - 030].offset = getu16(data);
499 ins->oprs[c - 034].offset = getu32(data);
502 ins->oprs[c - 034].offset = getu16(data);
505 if (segsize != asize)
506 ins->oprs[c - 034].disp_size = asize;
510 ins->oprs[c - 040].offset = getu32(data);
517 ins->oprs[c - 044].offset = getu16(data);
520 ins->oprs[c - 044].disp_size = 16;
523 ins->oprs[c - 044].offset = getu32(data);
526 ins->oprs[c - 044].disp_size = 32;
529 ins->oprs[c - 044].offset = getu64(data);
530 ins->oprs[c - 044].disp_size = 64;
537 ins->oprs[c - 050].offset = gets8(data++);
538 ins->oprs[c - 050].segment |= SEG_RELATIVE;
542 ins->oprs[c - 054].offset = getu64(data);
547 ins->oprs[c - 060].offset = gets16(data);
549 ins->oprs[c - 060].segment |= SEG_RELATIVE;
550 ins->oprs[c - 060].segment &= ~SEG_32BIT;
554 ins->oprs[c - 064].segment |= SEG_RELATIVE;
556 ins->oprs[c - 064].offset = getu16(data);
558 ins->oprs[c - 064].segment &= ~(SEG_32BIT|SEG_64BIT);
559 } else if (osize == 32) {
560 ins->oprs[c - 064].offset = getu32(data);
562 ins->oprs[c - 064].segment &= ~SEG_64BIT;
563 ins->oprs[c - 064].segment |= SEG_32BIT;
565 if (segsize != osize) {
566 ins->oprs[c - 064].type =
567 (ins->oprs[c - 064].type & ~SIZE_MASK)
568 | ((osize == 16) ? BITS16 : BITS32);
573 ins->oprs[c - 070].offset = getu32(data);
575 ins->oprs[c - 070].segment |= SEG_32BIT | SEG_RELATIVE;
584 ins->oprs[c & 07].segment |= SEG_RMREG;
585 data = do_ea(data, modrm, asize, segsize,
586 &ins->oprs[(c >> 3) & 07], ins);
589 ins->oprs[c & 07].basereg = ((modrm >> 3)&7)+
590 (ins->rex & REX_R ? 8 : 0);
595 ins->oprs[c - 0140].offset = getu16(data);
600 ins->oprs[c - 0150].offset = getu32(data);
606 ins->drexdst = c & 3;
610 ins->rex |= REX_D|REX_OC;
611 ins->drexdst = c & 3;
620 data = do_drex(data, ins);
635 if (((modrm >> 3) & 07) != (c & 07))
636 return false; /* spare field doesn't match up */
637 data = do_ea(data, modrm, asize, segsize,
638 &ins->oprs[(c >> 3) & 07], ins);
659 if (asize != segsize)
673 if (prefix->rex & REX_B)
678 if (prefix->rex & REX_X)
683 if (prefix->rex & REX_R)
688 if (prefix->rex & REX_W)
707 if (osize != (segsize == 16) ? 16 : 32)
714 ins->rex |= REX_W; /* 64-bit only instruction */
720 if (!(ins->rex & (REX_P|REX_W)) || osize != 64)
727 int t = *r++, d = *data++;
728 if (d < t || d > t + 15)
731 ins->condition = d - t;
741 if (prefix->rep != 0xF2)
746 if (prefix->rep != 0xF3)
789 return false; /* Unknown code */
793 /* REX cannot be combined with DREX */
794 if ((ins->rex & REX_D) && (prefix->rex))
798 * Check for unused rep or a/o prefixes.
800 for (i = 0; i < t->operands; i++) {
801 if (ins->oprs[i].segment != SEG_RMREG)
806 if (ins->prefixes[PPS_LREP])
808 ins->prefixes[PPS_LREP] = P_LOCK;
811 if (ins->prefixes[PPS_LREP])
813 ins->prefixes[PPS_LREP] = drep;
816 if (osize != ((segsize == 16) ? 16 : 32)) {
817 enum prefixes pfx = 0;
831 if (ins->prefixes[PPS_OSIZE])
833 ins->prefixes[PPS_OSIZE] = pfx;
836 if (!a_used && asize != segsize) {
837 if (ins->prefixes[PPS_ASIZE])
839 ins->prefixes[PPS_ASIZE] = asize == 16 ? P_A16 : P_A32;
842 /* Fix: check for redundant REX prefixes */
844 return data - origdata;
847 int32_t disasm(uint8_t *data, char *output, int outbufsize, int segsize,
848 int32_t offset, int autosync, uint32_t prefer)
850 const struct itemplate * const *p, * const *best_p;
851 const struct disasm_index *ix;
853 int length, best_length = 0;
855 int i, slen, colon, n;
859 uint32_t goodness, best;
861 struct prefix_info prefix;
864 memset(&ins, 0, sizeof ins);
869 memset(&prefix, 0, sizeof prefix);
870 prefix.asize = segsize;
871 prefix.osize = (segsize == 64) ? 32 : segsize;
875 for (end_prefix = false; !end_prefix; ) {
879 prefix.rep = *data++;
882 prefix.lock = *data++;
885 segover = "cs", prefix.seg = *data++;
888 segover = "ss", prefix.seg = *data++;
891 segover = "ds", prefix.seg = *data++;
894 segover = "es", prefix.seg = *data++;
897 segover = "fs", prefix.seg = *data++;
900 segover = "gs", prefix.seg = *data++;
903 prefix.osize = (segsize == 16) ? 32 : 16;
904 prefix.osp = *data++;
907 prefix.asize = (segsize == 32) ? 16 : 32;
908 prefix.asp = *data++;
911 if (segsize == 64 && (*data & 0xf0) == REX_P) {
912 prefix.rex = *data++;
913 if (prefix.rex & REX_W)
922 best = -1; /* Worst possible */
928 while (ix->n == -1) {
929 ix = (const struct disasm_index *)ix->p + *dp++;
932 p = (const struct itemplate * const *)ix->p;
933 for (n = ix->n; n; n--, p++) {
934 if ((length = matches(*p, data, &prefix, segsize, &tmp_ins))) {
937 * Final check to make sure the types of r/m match up.
938 * XXX: Need to make sure this is actually correct.
940 for (i = 0; i < (*p)->operands; i++) {
941 if (!((*p)->opd[i] & SAME_AS) &&
943 /* If it's a mem-only EA but we have a
945 ((tmp_ins.oprs[i].segment & SEG_RMREG) &&
946 !(MEMORY & ~(*p)->opd[i])) ||
947 /* If it's a reg-only EA but we have a memory
949 (!(tmp_ins.oprs[i].segment & SEG_RMREG) &&
950 !(REG_EA & ~(*p)->opd[i]) &&
951 !((*p)->opd[i] & REG_SMASK)) ||
952 /* Register type mismatch (eg FS vs REG_DESS):
954 ((((*p)->opd[i] & (REGISTER | FPUREG)) ||
955 (tmp_ins.oprs[i].segment & SEG_RMREG)) &&
956 !whichreg((*p)->opd[i],
957 tmp_ins.oprs[i].basereg, tmp_ins.rex))
965 * Note: we always prefer instructions which incorporate
966 * prefixes in the instructions themselves. This is to allow
967 * e.g. PAUSE to be preferred to REP NOP, and deal with
968 * MMX/SSE instructions where prefixes are used to select
969 * between MMX and SSE register sets or outright opcode
974 goodness = ((*p)->flags & IF_PFMASK) ^ prefer;
976 for (i = 0; i < MAXPREFIX; i++)
977 if (tmp_ins.prefixes[i])
979 if (nprefix < best_pref ||
980 (nprefix == best_pref && goodness < best)) {
981 /* This is the best one found so far */
985 best_length = length;
993 return 0; /* no instruction was matched */
995 /* Pick the best match */
997 length = best_length;
1001 /* TODO: snprintf returns the value that the string would have if
1002 * the buffer were long enough, and not the actual length of
1003 * the returned string, so each instance of using the return
1004 * value of snprintf should actually be checked to assure that
1005 * the return value is "sane." Maybe a macro wrapper could
1006 * be used for that purpose.
1008 for (i = 0; i < MAXPREFIX; i++)
1009 switch (ins.prefixes[i]) {
1011 slen += snprintf(output + slen, outbufsize - slen, "lock ");
1014 slen += snprintf(output + slen, outbufsize - slen, "rep ");
1017 slen += snprintf(output + slen, outbufsize - slen, "repe ");
1020 slen += snprintf(output + slen, outbufsize - slen, "repne ");
1023 slen += snprintf(output + slen, outbufsize - slen, "a16 ");
1026 slen += snprintf(output + slen, outbufsize - slen, "a32 ");
1029 slen += snprintf(output + slen, outbufsize - slen, "a64 ");
1032 slen += snprintf(output + slen, outbufsize - slen, "o16 ");
1035 slen += snprintf(output + slen, outbufsize - slen, "o32 ");
1038 slen += snprintf(output + slen, outbufsize - slen, "o64 ");
1044 for (i = 0; i < (int)elements(ico); i++)
1045 if ((*p)->opcode == ico[i]) {
1047 snprintf(output + slen, outbufsize - slen, "%s%s", icn[i],
1048 whichcond(ins.condition));
1051 if (i >= (int)elements(ico))
1053 snprintf(output + slen, outbufsize - slen, "%s",
1054 insn_names[(*p)->opcode]);
1056 length += data - origdata; /* fix up for prefixes */
1057 for (i = 0; i < (*p)->operands; i++) {
1058 opflags_t t = (*p)->opd[i];
1059 const operand *o = &ins.oprs[i];
1063 o = &ins.oprs[t & ~SAME_AS];
1064 t = (*p)->opd[t & ~SAME_AS];
1067 output[slen++] = (colon ? ':' : i == 0 ? ' ' : ',');
1070 if (o->segment & SEG_RELATIVE) {
1071 offs += offset + length;
1073 * sort out wraparound
1075 if (!(o->segment & (SEG_32BIT|SEG_64BIT)))
1078 * add sync marker, if autosync is on
1089 if ((t & (REGISTER | FPUREG)) ||
1090 (o->segment & SEG_RMREG)) {
1092 reg = whichreg(t, o->basereg, ins.rex);
1094 slen += snprintf(output + slen, outbufsize - slen, "to ");
1095 slen += snprintf(output + slen, outbufsize - slen, "%s",
1096 reg_names[reg - EXPR_REG_START]);
1097 } else if (!(UNITY & ~t)) {
1098 output[slen++] = '1';
1099 } else if (t & IMMEDIATE) {
1102 snprintf(output + slen, outbufsize - slen, "byte ");
1103 if (o->segment & SEG_SIGNED) {
1106 output[slen++] = '-';
1108 output[slen++] = '+';
1110 } else if (t & BITS16) {
1112 snprintf(output + slen, outbufsize - slen, "word ");
1113 } else if (t & BITS32) {
1115 snprintf(output + slen, outbufsize - slen, "dword ");
1116 } else if (t & BITS64) {
1118 snprintf(output + slen, outbufsize - slen, "qword ");
1119 } else if (t & NEAR) {
1121 snprintf(output + slen, outbufsize - slen, "near ");
1122 } else if (t & SHORT) {
1124 snprintf(output + slen, outbufsize - slen, "short ");
1127 snprintf(output + slen, outbufsize - slen, "0x%"PRIx64"",
1129 } else if (!(MEM_OFFS & ~t)) {
1131 snprintf(output + slen, outbufsize - slen,
1132 "[%s%s%s0x%"PRIx64"]",
1133 (segover ? segover : ""),
1134 (segover ? ":" : ""),
1135 (o->disp_size == 64 ? "qword " :
1136 o->disp_size == 32 ? "dword " :
1137 o->disp_size == 16 ? "word " : ""), offs);
1139 } else if (!(REGMEM & ~t)) {
1140 int started = false;
1143 snprintf(output + slen, outbufsize - slen, "byte ");
1146 snprintf(output + slen, outbufsize - slen, "word ");
1149 snprintf(output + slen, outbufsize - slen, "dword ");
1152 snprintf(output + slen, outbufsize - slen, "qword ");
1155 snprintf(output + slen, outbufsize - slen, "tword ");
1158 snprintf(output + slen, outbufsize - slen, "oword ");
1160 slen += snprintf(output + slen, outbufsize - slen, "far ");
1163 snprintf(output + slen, outbufsize - slen, "near ");
1164 output[slen++] = '[';
1166 slen += snprintf(output + slen, outbufsize - slen, "%s",
1167 (o->disp_size == 64 ? "qword " :
1168 o->disp_size == 32 ? "dword " :
1169 o->disp_size == 16 ? "word " :
1171 if (o->eaflags & EAF_REL)
1172 slen += snprintf(output + slen, outbufsize - slen, "rel ");
1175 snprintf(output + slen, outbufsize - slen, "%s:",
1179 if (o->basereg != -1) {
1180 slen += snprintf(output + slen, outbufsize - slen, "%s",
1181 reg_names[(o->basereg -
1185 if (o->indexreg != -1) {
1187 output[slen++] = '+';
1188 slen += snprintf(output + slen, outbufsize - slen, "%s",
1189 reg_names[(o->indexreg -
1193 snprintf(output + slen, outbufsize - slen, "*%d",
1199 if (o->segment & SEG_DISP8) {
1201 uint8_t offset = offs;
1202 if ((int8_t)offset < 0) {
1209 snprintf(output + slen, outbufsize - slen, "%s0x%"PRIx8"",
1211 } else if (o->segment & SEG_DISP16) {
1213 uint16_t offset = offs;
1214 if ((int16_t)offset < 0 && started) {
1218 prefix = started ? "+" : "";
1221 snprintf(output + slen, outbufsize - slen,
1222 "%s0x%"PRIx16"", prefix, offset);
1223 } else if (o->segment & SEG_DISP32) {
1224 if (prefix.asize == 64) {
1226 uint64_t offset = (int64_t)(int32_t)offs;
1227 if ((int32_t)offs < 0 && started) {
1231 prefix = started ? "+" : "";
1234 snprintf(output + slen, outbufsize - slen,
1235 "%s0x%"PRIx64"", prefix, offset);
1238 uint32_t offset = offs;
1239 if ((int32_t) offset < 0 && started) {
1243 prefix = started ? "+" : "";
1246 snprintf(output + slen, outbufsize - slen,
1247 "%s0x%"PRIx32"", prefix, offset);
1250 output[slen++] = ']';
1253 snprintf(output + slen, outbufsize - slen, "<operand%d>",
1257 output[slen] = '\0';
1258 if (segover) { /* unused segment override */
1260 int count = slen + 1;
1262 p[count + 3] = p[count];
1263 strncpy(output, segover, 2);
1269 int32_t eatbyte(uint8_t *data, char *output, int outbufsize)
1271 snprintf(output, outbufsize, "db 0x%02X", *data);