1 /* disasm.c where all the _work_ gets done in the Netwide Disassembler
3 * The Netwide Assembler is copyright (C) 1996 Simon Tatham and
4 * Julian Hall. All rights reserved. The software is
5 * redistributable under the licence given in the file "Licence"
6 * distributed in the NASM archive.
8 * initial version 27/iii/95 by Simon Tatham
24 * Flags that go into the `segment' field of `insn' structures
27 #define SEG_RELATIVE 1
34 #define SEG_SIGNED 128
43 uint8_t osize; /* Operand size */
44 uint8_t asize; /* Address size */
45 uint8_t osp; /* Operand size prefix present */
46 uint8_t asp; /* Address size prefix present */
47 uint8_t rep; /* Rep prefix present */
48 uint8_t seg; /* Segment override prefix present */
49 uint8_t lock; /* Lock prefix present */
50 uint8_t rex; /* Rex prefix present */
53 #define getu8(x) (*(uint8_t *)(x))
54 #if defined(__i386__) || defined(__x86_64__)
55 /* Littleendian CPU which can handle unaligned references */
56 #define getu16(x) (*(uint16_t *)(x))
57 #define getu32(x) (*(uint32_t *)(x))
58 #define getu64(x) (*(uint64_t *)(x))
60 static uint16_t getu16(uint8_t *data)
62 return (uint16_t)data[0] + ((uint16_t)data[1] << 8);
64 static uint32_t getu32(uint8_t *data)
66 return (uint32_t)getu16(data) + ((uint32_t)getu16(data+2) << 16);
68 static uint64_t getu64(uint8_t *data)
70 return (uint64_t)getu32(data) + ((uint64_t)getu32(data+4) << 32);
74 #define gets8(x) ((int8_t)getu8(x))
75 #define gets16(x) ((int16_t)getu16(x))
76 #define gets32(x) ((int32_t)getu32(x))
77 #define gets64(x) ((int64_t)getu64(x))
79 /* Important: regval must already have been adjusted for rex extensions */
80 static enum reg_enum whichreg(int32_t regflags, int regval, int rex)
82 if (!(regflags & (REGISTER|REGMEM)))
83 return 0; /* Registers not permissible?! */
87 if (!(REG_AL & ~regflags))
89 if (!(REG_AX & ~regflags))
91 if (!(REG_EAX & ~regflags))
93 if (!(REG_RAX & ~regflags))
95 if (!(REG_DL & ~regflags))
97 if (!(REG_DX & ~regflags))
99 if (!(REG_EDX & ~regflags))
101 if (!(REG_RDX & ~regflags))
103 if (!(REG_CL & ~regflags))
105 if (!(REG_CX & ~regflags))
107 if (!(REG_ECX & ~regflags))
109 if (!(REG_RCX & ~regflags))
111 if (!(FPU0 & ~regflags))
113 if (!(REG_CS & ~regflags))
114 return (regval == 1) ? R_CS : 0;
115 if (!(REG_DESS & ~regflags))
116 return (regval == 0 || regval == 2
117 || regval == 3 ? rd_sreg[regval] : 0);
118 if (!(REG_FSGS & ~regflags))
119 return (regval == 4 || regval == 5 ? rd_sreg[regval] : 0);
120 if (!(REG_SEG67 & ~regflags))
121 return (regval == 6 || regval == 7 ? rd_sreg[regval] : 0);
123 /* All the entries below look up regval in an 16-entry array */
124 if (regval < 0 || regval > 15)
127 if (!(REG8 & ~regflags)) {
129 return rd_reg8_rex[regval];
131 return rd_reg8[regval];
133 if (!(REG16 & ~regflags))
134 return rd_reg16[regval];
135 if (!(REG32 & ~regflags))
136 return rd_reg32[regval];
137 if (!(REG64 & ~regflags))
138 return rd_reg64[regval];
139 if (!(REG_SREG & ~regflags))
140 return rd_sreg[regval & 7]; /* Ignore REX */
141 if (!(REG_CREG & ~regflags))
142 return rd_creg[regval];
143 if (!(REG_DREG & ~regflags))
144 return rd_dreg[regval];
145 if (!(REG_TREG & ~regflags)) {
147 return 0; /* TR registers are ill-defined with rex */
148 return rd_treg[regval];
150 if (!(FPUREG & ~regflags))
151 return rd_fpureg[regval & 7]; /* Ignore REX */
152 if (!(MMXREG & ~regflags))
153 return rd_mmxreg[regval & 7]; /* Ignore REX */
154 if (!(XMMREG & ~regflags))
155 return rd_xmmreg[regval];
160 static const char *whichcond(int condval)
162 static int conds[] = {
163 C_O, C_NO, C_C, C_NC, C_Z, C_NZ, C_NA, C_A,
164 C_S, C_NS, C_PE, C_PO, C_L, C_NL, C_NG, C_G
166 return conditions[conds[condval]];
170 * Process a DREX suffix
172 static uint8_t *do_drex(uint8_t *data, insn *ins)
174 uint8_t drex = *data++;
175 operand *dst = &ins->oprs[ins->drexdst];
177 if ((drex & 8) != ((ins->rex & REX_OC) ? 8 : 0))
178 return NULL; /* OC0 mismatch */
179 ins->rex = (ins->rex & ~7) | (drex & 7);
181 dst->segment = SEG_RMREG;
182 dst->basereg = drex >> 4;
188 * Process an effective address (ModRM) specification.
190 static uint8_t *do_ea(uint8_t *data, int modrm, int asize,
191 int segsize, operand * op, insn *ins)
193 int mod, rm, scale, index, base;
197 mod = (modrm >> 6) & 03;
200 if (mod != 3 && rm == 4 && asize != 16)
203 if (ins->rex & REX_D) {
204 data = do_drex(data, ins);
210 if (mod == 3) { /* pure register version */
211 op->basereg = rm+(rex & REX_B ? 8 : 0);
212 op->segment |= SEG_RMREG;
221 * <mod> specifies the displacement size (none, byte or
222 * word), and <rm> specifies the register combination.
223 * Exception: mod=0,rm=6 does not specify [BP] as one might
224 * expect, but instead specifies [disp16].
226 op->indexreg = op->basereg = -1;
227 op->scale = 1; /* always, in 16 bits */
258 if (rm == 6 && mod == 0) { /* special case */
262 mod = 2; /* fake disp16 */
266 op->segment |= SEG_NODISP;
269 op->segment |= SEG_DISP8;
270 op->offset = (int8_t)*data++;
273 op->segment |= SEG_DISP16;
274 op->offset = *data++;
275 op->offset |= ((unsigned)*data++) << 8;
281 * Once again, <mod> specifies displacement size (this time
282 * none, byte or *dword*), while <rm> specifies the base
283 * register. Again, [EBP] is missing, replaced by a pure
284 * disp32 (this time that's mod=0,rm=*5*) in 32-bit mode,
285 * and RIP-relative addressing in 64-bit mode.
288 * indicates not a single base register, but instead the
289 * presence of a SIB byte...
291 int a64 = asize == 64;
296 op->basereg = rd_reg64[rm | ((rex & REX_B) ? 8 : 0)];
298 op->basereg = rd_reg32[rm | ((rex & REX_B) ? 8 : 0)];
300 if (rm == 5 && mod == 0) {
302 op->eaflags |= EAF_REL;
303 op->segment |= SEG_RELATIVE;
304 mod = 2; /* fake disp32 */
308 op->addr_size = asize;
311 mod = 2; /* fake disp32 */
314 if (rm == 4) { /* process SIB */
315 scale = (sib >> 6) & 03;
316 index = (sib >> 3) & 07;
319 op->scale = 1 << scale;
322 op->indexreg = -1; /* ESP/RSP/R12 cannot be an index */
324 op->indexreg = rd_reg64[index | ((rex & REX_X) ? 8 : 0)];
326 op->indexreg = rd_reg64[index | ((rex & REX_X) ? 8 : 0)];
328 if (base == 5 && mod == 0) {
330 mod = 2; /* Fake disp32 */
332 op->basereg = rd_reg64[base | ((rex & REX_B) ? 8 : 0)];
334 op->basereg = rd_reg32[base | ((rex & REX_B) ? 8 : 0)];
342 op->segment |= SEG_NODISP;
345 op->segment |= SEG_DISP8;
346 op->offset = gets8(data);
350 op->segment |= SEG_DISP32;
351 op->offset = getu32(data);
360 * Determine whether the instruction template in t corresponds to the data
361 * stream in data. Return the number of bytes matched if so.
363 static int matches(const struct itemplate *t, uint8_t *data,
364 const struct prefix_info *prefix, int segsize, insn *ins)
366 uint8_t *r = (uint8_t *)(t->code);
367 uint8_t *origdata = data;
368 int a_used = FALSE, o_used = FALSE;
369 enum prefixes drep = 0;
370 uint8_t lock = prefix->lock;
371 int osize = prefix->osize;
372 int asize = prefix->asize;
375 for (i = 0; i < MAX_OPERANDS; i++) {
376 ins->oprs[i].segment = ins->oprs[i].addr_size =
377 (segsize == 64 ? SEG_64BIT : segsize == 32 ? SEG_32BIT : 0);
380 ins->rex = prefix->rex;
382 if (t->flags & (segsize == 64 ? IF_NOLONG : IF_LONG))
385 if (prefix->rep == 0xF2)
387 else if (prefix->rep == 0xF3)
393 /* FIX: change this into a switch */
394 if (c >= 01 && c <= 03) {
398 } else if (c == 04) {
401 ins->oprs[0].basereg = 0;
404 ins->oprs[0].basereg = 2;
407 ins->oprs[0].basereg = 3;
412 } else if (c == 05) {
415 ins->oprs[0].basereg = 4;
418 ins->oprs[0].basereg = 5;
423 } else if (c == 06) {
426 ins->oprs[0].basereg = 0;
429 ins->oprs[0].basereg = 1;
432 ins->oprs[0].basereg = 2;
435 ins->oprs[0].basereg = 3;
440 } else if (c == 07) {
443 ins->oprs[0].basereg = 4;
446 ins->oprs[0].basereg = 5;
451 } else if (c >= 010 && c <= 013) {
452 int t = *r++, d = *data++;
453 if (d < t || d > t + 7)
456 ins->oprs[c - 010].basereg = (d-t)+
457 (ins->rex & REX_B ? 8 : 0);
458 ins->oprs[c - 010].segment |= SEG_RMREG;
460 } else if (c >= 014 && c <= 017) {
461 ins->oprs[c - 014].offset = (int8_t)*data++;
462 ins->oprs[c - 014].segment |= SEG_SIGNED;
463 } else if (c >= 020 && c <= 023) {
464 ins->oprs[c - 020].offset = *data++;
465 } else if (c >= 024 && c <= 027) {
466 ins->oprs[c - 024].offset = *data++;
467 } else if (c >= 030 && c <= 033) {
468 ins->oprs[c - 030].offset = getu16(data);
470 } else if (c >= 034 && c <= 037) {
472 ins->oprs[c - 034].offset = getu32(data);
475 ins->oprs[c - 034].offset = getu16(data);
478 if (segsize != asize)
479 ins->oprs[c - 034].addr_size = asize;
480 } else if (c >= 040 && c <= 043) {
481 ins->oprs[c - 040].offset = getu32(data);
483 } else if (c >= 044 && c <= 047) {
486 ins->oprs[c - 044].offset = getu16(data);
490 ins->oprs[c - 044].offset = getu32(data);
494 ins->oprs[c - 044].offset = getu64(data);
498 if (segsize != asize)
499 ins->oprs[c - 044].addr_size = asize;
500 } else if (c >= 050 && c <= 053) {
501 ins->oprs[c - 050].offset = gets8(data++);
502 ins->oprs[c - 050].segment |= SEG_RELATIVE;
503 } else if (c >= 054 && c <= 057) {
504 ins->oprs[c - 054].offset = getu64(data);
506 } else if (c >= 060 && c <= 063) {
507 ins->oprs[c - 060].offset = gets16(data);
509 ins->oprs[c - 060].segment |= SEG_RELATIVE;
510 ins->oprs[c - 060].segment &= ~SEG_32BIT;
511 } else if (c >= 064 && c <= 067) {
513 ins->oprs[c - 064].offset = getu16(data);
515 ins->oprs[c - 064].segment &= ~(SEG_32BIT|SEG_64BIT);
516 } else if (osize == 32) {
517 ins->oprs[c - 064].offset = getu32(data);
519 ins->oprs[c - 064].segment &= ~SEG_64BIT;
520 ins->oprs[c - 064].segment |= SEG_32BIT;
522 if (segsize != osize) {
523 ins->oprs[c - 064].type =
524 (ins->oprs[c - 064].type & ~SIZE_MASK)
525 | ((osize == 16) ? BITS16 : BITS32);
527 } else if (c >= 070 && c <= 073) {
528 ins->oprs[c - 070].offset = getu32(data);
530 ins->oprs[c - 070].segment |= SEG_32BIT | SEG_RELATIVE;
531 } else if (c >= 0100 && c < 0140) {
533 ins->oprs[c & 07].segment |= SEG_RMREG;
534 data = do_ea(data, modrm, asize, segsize,
535 &ins->oprs[(c >> 3) & 07], ins);
538 ins->oprs[c & 07].basereg = ((modrm >> 3)&7)+
539 (ins->rex & REX_R ? 8 : 0);
540 } else if (c >= 0140 && c <= 0143) {
541 ins->oprs[c - 0140].offset = getu16(data);
543 } else if (c >= 0150 && c <= 0153) {
544 ins->oprs[c - 0150].offset = getu32(data);
546 } else if (c >= 0160 && c <= 0167) {
547 ins->rex |= (c & 4) ? REX_D|REX_OC : REX_D;
548 ins->drexdst = c & 3;
549 } else if (c == 0170) {
552 } else if (c == 0171) {
553 data = do_drex(data, ins);
556 } else if (c >= 0200 && c <= 0277) {
558 if (((modrm >> 3) & 07) != (c & 07))
559 return FALSE; /* spare field doesn't match up */
560 data = do_ea(data, modrm, asize, segsize,
561 &ins->oprs[(c >> 3) & 07], ins);
564 } else if (c >= 0300 && c <= 0303) {
566 } else if (c == 0310) {
571 } else if (c == 0311) {
576 } else if (c == 0312) {
577 if (asize != segsize)
581 } else if (c == 0313) {
586 } else if (c == 0320) {
591 } else if (c == 0321) {
596 } else if (c == 0322) {
597 if (osize != (segsize == 16) ? 16 : 32)
601 } else if (c == 0323) {
602 ins->rex |= REX_W; /* 64-bit only instruction */
604 } else if (c == 0324) {
605 if (!(ins->rex & (REX_P|REX_W)) || osize != 64)
607 } else if (c == 0330) {
608 int t = *r++, d = *data++;
609 if (d < t || d > t + 15)
612 ins->condition = d - t;
613 } else if (c == 0331) {
616 } else if (c == 0332) {
617 if (prefix->rep != 0xF2)
619 } else if (c == 0333) {
620 if (prefix->rep != 0xF3)
623 } else if (c == 0334) {
628 } else if (c == 0335) {
631 } else if (c == 0364) {
634 } else if (c == 0365) {
637 } else if (c == 0366) {
641 } else if (c == 0367) {
648 /* REX cannot be combined with DREX */
649 if ((ins->rex & REX_D) && (prefix->rex))
653 * Check for unused rep or a/o prefixes.
657 ins->prefixes[ins->nprefix++] = P_LOCK;
659 ins->prefixes[ins->nprefix++] = drep;
660 if (!a_used && asize != segsize)
661 ins->prefixes[ins->nprefix++] = asize == 16 ? P_A16 : P_A32;
662 if (!o_used && osize == ((segsize == 16) ? 32 : 16))
663 ins->prefixes[ins->nprefix++] = osize == 16 ? P_O16 : P_O32;
665 /* Fix: check for redundant REX prefixes */
667 return data - origdata;
670 int32_t disasm(uint8_t *data, char *output, int outbufsize, int segsize,
671 int32_t offset, int autosync, uint32_t prefer)
673 const struct itemplate * const *p, * const *best_p;
674 const struct disasm_index *ix;
676 int length, best_length = 0;
678 int i, slen, colon, n;
682 uint32_t goodness, best;
684 struct prefix_info prefix;
686 memset(&ins, 0, sizeof ins);
691 memset(&prefix, 0, sizeof prefix);
692 prefix.asize = segsize;
693 prefix.osize = (segsize == 64) ? 32 : segsize;
697 if (*data == 0xF3 || *data == 0xF2)
698 prefix.rep = *data++;
699 else if (*data == 0xF0)
700 prefix.lock = *data++;
701 else if (*data == 0x2E)
702 segover = "cs", prefix.seg = *data++;
703 else if (*data == 0x36)
704 segover = "ss", prefix.seg = *data++;
705 else if (*data == 0x3E)
706 segover = "ds", prefix.seg = *data++;
707 else if (*data == 0x26)
708 segover = "es", prefix.seg = *data++;
709 else if (*data == 0x64)
710 segover = "fs", prefix.seg = *data++;
711 else if (*data == 0x65)
712 segover = "gs", prefix.seg = *data++;
713 else if (*data == 0x66) {
714 prefix.osize = (segsize == 16) ? 32 : 16;
715 prefix.osp = *data++;
716 } else if (*data == 0x67) {
717 prefix.asize = (segsize == 32) ? 16 : 32;
718 prefix.asp = *data++;
719 } else if (segsize == 64 && (*data & 0xf0) == REX_P) {
720 prefix.rex = *data++;
721 if (prefix.rex & REX_W)
723 break; /* REX is always the last prefix */
729 best = -1; /* Worst possible */
735 while (ix->n == (size_t)-1) {
736 ix = (const struct disasm_index *)ix->p + *dp++;
739 p = (const struct itemplate * const *)ix->p;
740 for (n = ix->n; n; n--, p++) {
741 if ((length = matches(*p, data, &prefix, segsize, &tmp_ins))) {
744 * Final check to make sure the types of r/m match up.
745 * XXX: Need to make sure this is actually correct.
747 for (i = 0; i < (*p)->operands; i++) {
748 if (!((*p)->opd[i] & SAME_AS) &&
750 /* If it's a mem-only EA but we have a register, die. */
751 ((tmp_ins.oprs[i].segment & SEG_RMREG) &&
752 !(MEMORY & ~(*p)->opd[i])) ||
753 /* If it's a reg-only EA but we have a memory ref, die. */
754 (!(tmp_ins.oprs[i].segment & SEG_RMREG) &&
755 !(REG_EA & ~(*p)->opd[i]) &&
756 !((*p)->opd[i] & REG_SMASK)) ||
757 /* Register type mismatch (eg FS vs REG_DESS): die. */
758 ((((*p)->opd[i] & (REGISTER | FPUREG)) ||
759 (tmp_ins.oprs[i].segment & SEG_RMREG)) &&
760 !whichreg((*p)->opd[i],
761 tmp_ins.oprs[i].basereg, tmp_ins.rex))
769 * Note: we always prefer instructions which incorporate
770 * prefixes in the instructions themselves. This is to allow
771 * e.g. PAUSE to be preferred to REP NOP, and deal with
772 * MMX/SSE instructions where prefixes are used to select
773 * between MMX and SSE register sets or outright opcode
777 goodness = ((*p)->flags & IF_PFMASK) ^ prefer;
778 if (tmp_ins.nprefix < best_pref ||
779 (tmp_ins.nprefix == best_pref && goodness < best)) {
780 /* This is the best one found so far */
783 best_pref = tmp_ins.nprefix;
784 best_length = length;
792 return 0; /* no instruction was matched */
794 /* Pick the best match */
796 length = best_length;
800 /* TODO: snprintf returns the value that the string would have if
801 * the buffer were long enough, and not the actual length of
802 * the returned string, so each instance of using the return
803 * value of snprintf should actually be checked to assure that
804 * the return value is "sane." Maybe a macro wrapper could
805 * be used for that purpose.
807 for (i = 0; i < ins.nprefix; i++)
808 switch (ins.prefixes[i]) {
810 slen += snprintf(output + slen, outbufsize - slen, "lock ");
813 slen += snprintf(output + slen, outbufsize - slen, "rep ");
816 slen += snprintf(output + slen, outbufsize - slen, "repe ");
819 slen += snprintf(output + slen, outbufsize - slen, "repne ");
822 slen += snprintf(output + slen, outbufsize - slen, "a16 ");
825 slen += snprintf(output + slen, outbufsize - slen, "a32 ");
828 slen += snprintf(output + slen, outbufsize - slen, "o16 ");
831 slen += snprintf(output + slen, outbufsize - slen, "o32 ");
837 for (i = 0; i < (int)elements(ico); i++)
838 if ((*p)->opcode == ico[i]) {
840 snprintf(output + slen, outbufsize - slen, "%s%s", icn[i],
841 whichcond(ins.condition));
844 if (i >= (int)elements(ico))
846 snprintf(output + slen, outbufsize - slen, "%s",
847 insn_names[(*p)->opcode]);
849 length += data - origdata; /* fix up for prefixes */
850 for (i = 0; i < (*p)->operands; i++) {
851 opflags_t t = (*p)->opd[i];
852 const operand *o = &ins.oprs[i];
856 o = &ins.oprs[t & ~SAME_AS];
857 t = (*p)->opd[t & ~SAME_AS];
860 output[slen++] = (colon ? ':' : i == 0 ? ' ' : ',');
863 if (o->segment & SEG_RELATIVE) {
864 offs += offset + length;
866 * sort out wraparound
868 if (!(o->segment & (SEG_32BIT|SEG_64BIT)))
871 * add sync marker, if autosync is on
882 if ((t & (REGISTER | FPUREG)) ||
883 (o->segment & SEG_RMREG)) {
885 reg = whichreg(t, o->basereg, ins.rex);
887 slen += snprintf(output + slen, outbufsize - slen, "to ");
888 slen += snprintf(output + slen, outbufsize - slen, "%s",
889 reg_names[reg - EXPR_REG_START]);
890 } else if (!(UNITY & ~t)) {
891 output[slen++] = '1';
892 } else if (t & IMMEDIATE) {
895 snprintf(output + slen, outbufsize - slen, "byte ");
896 if (o->segment & SEG_SIGNED) {
899 output[slen++] = '-';
901 output[slen++] = '+';
903 } else if (t & BITS16) {
905 snprintf(output + slen, outbufsize - slen, "word ");
906 } else if (t & BITS32) {
908 snprintf(output + slen, outbufsize - slen, "dword ");
909 } else if (t & BITS64) {
911 snprintf(output + slen, outbufsize - slen, "qword ");
912 } else if (t & NEAR) {
914 snprintf(output + slen, outbufsize - slen, "near ");
915 } else if (t & SHORT) {
917 snprintf(output + slen, outbufsize - slen, "short ");
920 snprintf(output + slen, outbufsize - slen, "0x%"PRIx64"",
922 } else if (!(MEM_OFFS & ~t)) {
924 snprintf(output + slen, outbufsize - slen, "[%s%s%s0x%"PRIx64"]",
925 (segover ? segover : ""),
926 (segover ? ":" : ""),
928 32 ? "dword " : o->addr_size ==
929 16 ? "word " : ""), offs);
931 } else if (!(REGMEM & ~t)) {
935 snprintf(output + slen, outbufsize - slen, "byte ");
938 snprintf(output + slen, outbufsize - slen, "word ");
941 snprintf(output + slen, outbufsize - slen, "dword ");
944 snprintf(output + slen, outbufsize - slen, "qword ");
947 snprintf(output + slen, outbufsize - slen, "tword ");
949 slen += snprintf(output + slen, outbufsize - slen, "far ");
952 snprintf(output + slen, outbufsize - slen, "near ");
953 output[slen++] = '[';
955 slen += snprintf(output + slen, outbufsize - slen, "%s",
956 (o->addr_size == 64 ? "qword " :
957 o->addr_size == 32 ? "dword " :
958 o->addr_size == 16 ? "word " :
960 if (o->eaflags & EAF_REL)
961 slen += snprintf(output + slen, outbufsize - slen, "rel ");
964 snprintf(output + slen, outbufsize - slen, "%s:",
968 if (o->basereg != -1) {
969 slen += snprintf(output + slen, outbufsize - slen, "%s",
970 reg_names[(o->basereg -
974 if (o->indexreg != -1) {
976 output[slen++] = '+';
977 slen += snprintf(output + slen, outbufsize - slen, "%s",
978 reg_names[(o->indexreg -
982 snprintf(output + slen, outbufsize - slen, "*%d",
986 if (o->segment & SEG_DISP8) {
988 int8_t offset = offs;
994 snprintf(output + slen, outbufsize - slen, "%s0x%"PRIx8"",
995 minus ? "-" : "+", offset);
996 } else if (o->segment & SEG_DISP16) {
998 int16_t offset = offs;
1004 snprintf(output + slen, outbufsize - slen, "%s0x%"PRIx16"",
1005 minus ? "-" : started ? "+" : "", offset);
1006 } else if (o->segment & SEG_DISP32) {
1008 int32_t offset = offs;
1013 prefix = started ? "+" : "";
1016 snprintf(output + slen, outbufsize - slen,
1017 "%s0x%"PRIx32"", prefix, offset);
1019 output[slen++] = ']';
1022 snprintf(output + slen, outbufsize - slen, "<operand%d>",
1026 output[slen] = '\0';
1027 if (segover) { /* unused segment override */
1029 int count = slen + 1;
1031 p[count + 3] = p[count];
1032 strncpy(output, segover, 2);
1038 int32_t eatbyte(uint8_t *data, char *output, int outbufsize)
1040 snprintf(output, outbufsize, "db 0x%02X", *data);