1 /* disasm.c where all the _work_ gets done in the Netwide Disassembler
3 * The Netwide Assembler is copyright (C) 1996 Simon Tatham and
4 * Julian Hall. All rights reserved. The software is
5 * redistributable under the license given in the file "LICENSE"
6 * distributed in the NASM archive.
8 * initial version 27/iii/95 by Simon Tatham
26 * Flags that go into the `segment' field of `insn' structures
29 #define SEG_RELATIVE 1
36 #define SEG_SIGNED 128
45 uint8_t osize; /* Operand size */
46 uint8_t asize; /* Address size */
47 uint8_t osp; /* Operand size prefix present */
48 uint8_t asp; /* Address size prefix present */
49 uint8_t rep; /* Rep prefix present */
50 uint8_t seg; /* Segment override prefix present */
51 uint8_t lock; /* Lock prefix present */
52 uint8_t vex[3]; /* VEX prefix present */
53 uint8_t vex_m; /* VEX.M field */
55 uint8_t vex_lp; /* VEX.LP fields */
56 uint32_t rex; /* REX prefix present */
59 #define getu8(x) (*(uint8_t *)(x))
61 /* Littleendian CPU which can handle unaligned references */
62 #define getu16(x) (*(uint16_t *)(x))
63 #define getu32(x) (*(uint32_t *)(x))
64 #define getu64(x) (*(uint64_t *)(x))
66 static uint16_t getu16(uint8_t *data)
68 return (uint16_t)data[0] + ((uint16_t)data[1] << 8);
70 static uint32_t getu32(uint8_t *data)
72 return (uint32_t)getu16(data) + ((uint32_t)getu16(data+2) << 16);
74 static uint64_t getu64(uint8_t *data)
76 return (uint64_t)getu32(data) + ((uint64_t)getu32(data+4) << 32);
80 #define gets8(x) ((int8_t)getu8(x))
81 #define gets16(x) ((int16_t)getu16(x))
82 #define gets32(x) ((int32_t)getu32(x))
83 #define gets64(x) ((int64_t)getu64(x))
85 /* Important: regval must already have been adjusted for rex extensions */
86 static enum reg_enum whichreg(int32_t regflags, int regval, int rex)
88 if (!(regflags & (REGISTER|REGMEM)))
89 return 0; /* Registers not permissible?! */
93 if (!(REG_AL & ~regflags))
95 if (!(REG_AX & ~regflags))
97 if (!(REG_EAX & ~regflags))
99 if (!(REG_RAX & ~regflags))
101 if (!(REG_DL & ~regflags))
103 if (!(REG_DX & ~regflags))
105 if (!(REG_EDX & ~regflags))
107 if (!(REG_RDX & ~regflags))
109 if (!(REG_CL & ~regflags))
111 if (!(REG_CX & ~regflags))
113 if (!(REG_ECX & ~regflags))
115 if (!(REG_RCX & ~regflags))
117 if (!(FPU0 & ~regflags))
119 if (!(REG_CS & ~regflags))
120 return (regval == 1) ? R_CS : 0;
121 if (!(REG_DESS & ~regflags))
122 return (regval == 0 || regval == 2
123 || regval == 3 ? rd_sreg[regval] : 0);
124 if (!(REG_FSGS & ~regflags))
125 return (regval == 4 || regval == 5 ? rd_sreg[regval] : 0);
126 if (!(REG_SEG67 & ~regflags))
127 return (regval == 6 || regval == 7 ? rd_sreg[regval] : 0);
129 /* All the entries below look up regval in an 16-entry array */
130 if (regval < 0 || regval > 15)
133 if (!(REG8 & ~regflags)) {
135 return rd_reg8_rex[regval];
137 return rd_reg8[regval];
139 if (!(REG16 & ~regflags))
140 return rd_reg16[regval];
141 if (!(REG32 & ~regflags))
142 return rd_reg32[regval];
143 if (!(REG64 & ~regflags))
144 return rd_reg64[regval];
145 if (!(REG_SREG & ~regflags))
146 return rd_sreg[regval & 7]; /* Ignore REX */
147 if (!(REG_CREG & ~regflags))
148 return rd_creg[regval];
149 if (!(REG_DREG & ~regflags))
150 return rd_dreg[regval];
151 if (!(REG_TREG & ~regflags)) {
153 return 0; /* TR registers are ill-defined with rex */
154 return rd_treg[regval];
156 if (!(FPUREG & ~regflags))
157 return rd_fpureg[regval & 7]; /* Ignore REX */
158 if (!(MMXREG & ~regflags))
159 return rd_mmxreg[regval & 7]; /* Ignore REX */
160 if (!(XMMREG & ~regflags))
161 return rd_xmmreg[regval];
162 if (!(YMMREG & ~regflags))
163 return rd_ymmreg[regval];
168 static const char *whichcond(int condval)
170 static int conds[] = {
171 C_O, C_NO, C_C, C_NC, C_Z, C_NZ, C_NA, C_A,
172 C_S, C_NS, C_PE, C_PO, C_L, C_NL, C_NG, C_G
174 return conditions[conds[condval]];
178 * Process a DREX suffix
180 static uint8_t *do_drex(uint8_t *data, insn *ins)
182 uint8_t drex = *data++;
183 operand *dst = &ins->oprs[ins->drexdst];
185 if ((drex & 8) != ((ins->rex & REX_OC) ? 8 : 0))
186 return NULL; /* OC0 mismatch */
187 ins->rex = (ins->rex & ~7) | (drex & 7);
189 dst->segment = SEG_RMREG;
190 dst->basereg = drex >> 4;
196 * Process an effective address (ModRM) specification.
198 static uint8_t *do_ea(uint8_t *data, int modrm, int asize,
199 int segsize, operand * op, insn *ins)
201 int mod, rm, scale, index, base;
205 mod = (modrm >> 6) & 03;
208 if (mod != 3 && rm == 4 && asize != 16)
211 if (ins->rex & REX_D) {
212 data = do_drex(data, ins);
218 if (mod == 3) { /* pure register version */
219 op->basereg = rm+(rex & REX_B ? 8 : 0);
220 op->segment |= SEG_RMREG;
229 * <mod> specifies the displacement size (none, byte or
230 * word), and <rm> specifies the register combination.
231 * Exception: mod=0,rm=6 does not specify [BP] as one might
232 * expect, but instead specifies [disp16].
234 op->indexreg = op->basereg = -1;
235 op->scale = 1; /* always, in 16 bits */
266 if (rm == 6 && mod == 0) { /* special case */
270 mod = 2; /* fake disp16 */
274 op->segment |= SEG_NODISP;
277 op->segment |= SEG_DISP8;
278 op->offset = (int8_t)*data++;
281 op->segment |= SEG_DISP16;
282 op->offset = *data++;
283 op->offset |= ((unsigned)*data++) << 8;
289 * Once again, <mod> specifies displacement size (this time
290 * none, byte or *dword*), while <rm> specifies the base
291 * register. Again, [EBP] is missing, replaced by a pure
292 * disp32 (this time that's mod=0,rm=*5*) in 32-bit mode,
293 * and RIP-relative addressing in 64-bit mode.
296 * indicates not a single base register, but instead the
297 * presence of a SIB byte...
299 int a64 = asize == 64;
304 op->basereg = rd_reg64[rm | ((rex & REX_B) ? 8 : 0)];
306 op->basereg = rd_reg32[rm | ((rex & REX_B) ? 8 : 0)];
308 if (rm == 5 && mod == 0) {
310 op->eaflags |= EAF_REL;
311 op->segment |= SEG_RELATIVE;
312 mod = 2; /* fake disp32 */
316 op->disp_size = asize;
319 mod = 2; /* fake disp32 */
322 if (rm == 4) { /* process SIB */
323 scale = (sib >> 6) & 03;
324 index = (sib >> 3) & 07;
327 op->scale = 1 << scale;
330 op->indexreg = -1; /* ESP/RSP/R12 cannot be an index */
332 op->indexreg = rd_reg64[index | ((rex & REX_X) ? 8 : 0)];
334 op->indexreg = rd_reg32[index | ((rex & REX_X) ? 8 : 0)];
336 if (base == 5 && mod == 0) {
338 mod = 2; /* Fake disp32 */
340 op->basereg = rd_reg64[base | ((rex & REX_B) ? 8 : 0)];
342 op->basereg = rd_reg32[base | ((rex & REX_B) ? 8 : 0)];
350 op->segment |= SEG_NODISP;
353 op->segment |= SEG_DISP8;
354 op->offset = gets8(data);
358 op->segment |= SEG_DISP32;
359 op->offset = gets32(data);
368 * Determine whether the instruction template in t corresponds to the data
369 * stream in data. Return the number of bytes matched if so.
371 #define case4(x) case (x): case (x)+1: case (x)+2: case (x)+3
373 static int matches(const struct itemplate *t, uint8_t *data,
374 const struct prefix_info *prefix, int segsize, insn *ins)
376 uint8_t *r = (uint8_t *)(t->code);
377 uint8_t *origdata = data;
378 bool a_used = false, o_used = false;
379 enum prefixes drep = 0;
380 uint8_t lock = prefix->lock;
381 int osize = prefix->osize;
382 int asize = prefix->asize;
385 int s_field_for = -1; /* No 144/154 series code encountered */
387 for (i = 0; i < MAX_OPERANDS; i++) {
388 ins->oprs[i].segment = ins->oprs[i].disp_size =
389 (segsize == 64 ? SEG_64BIT : segsize == 32 ? SEG_32BIT : 0);
392 ins->rex = prefix->rex;
393 memset(ins->prefixes, 0, sizeof ins->prefixes);
395 if (t->flags & (segsize == 64 ? IF_NOLONG : IF_LONG))
398 if (prefix->rep == 0xF2)
400 else if (prefix->rep == 0xF3)
403 while ((c = *r++) != 0) {
404 opx = &ins->oprs[c & 3];
418 ins->oprs[0].basereg = 0;
421 ins->oprs[0].basereg = 2;
424 ins->oprs[0].basereg = 3;
434 ins->oprs[0].basereg = 4;
437 ins->oprs[0].basereg = 5;
447 ins->oprs[0].basereg = 0;
450 ins->oprs[0].basereg = 1;
453 ins->oprs[0].basereg = 2;
456 ins->oprs[0].basereg = 3;
466 ins->oprs[0].basereg = 4;
469 ins->oprs[0].basereg = 5;
478 int t = *r++, d = *data++;
479 if (d < t || d > t + 7)
482 opx->basereg = (d-t)+
483 (ins->rex & REX_B ? 8 : 0);
484 opx->segment |= SEG_RMREG;
490 opx->offset = (int8_t)*data++;
491 opx->segment |= SEG_SIGNED;
495 opx->offset = *data++;
499 opx->offset = *data++;
503 opx->offset = getu16(data);
509 opx->offset = getu32(data);
512 opx->offset = getu16(data);
515 if (segsize != asize)
516 opx->disp_size = asize;
520 opx->offset = getu32(data);
527 opx->offset = getu16(data);
533 opx->offset = getu32(data);
539 opx->offset = getu64(data);
547 opx->offset = gets8(data++);
548 opx->segment |= SEG_RELATIVE;
552 opx->offset = getu64(data);
557 opx->offset = gets16(data);
559 opx->segment |= SEG_RELATIVE;
560 opx->segment &= ~SEG_32BIT;
564 opx->segment |= SEG_RELATIVE;
566 opx->offset = gets16(data);
568 opx->segment &= ~(SEG_32BIT|SEG_64BIT);
569 } else if (osize == 32) {
570 opx->offset = gets32(data);
572 opx->segment &= ~SEG_64BIT;
573 opx->segment |= SEG_32BIT;
575 if (segsize != osize) {
577 (opx->type & ~SIZE_MASK)
578 | ((osize == 16) ? BITS16 : BITS32);
583 opx->offset = gets32(data);
585 opx->segment |= SEG_32BIT | SEG_RELATIVE;
594 opx->segment |= SEG_RMREG;
595 data = do_ea(data, modrm, asize, segsize,
596 &ins->oprs[(c >> 3) & 3], ins);
599 opx->basereg = ((modrm >> 3)&7)+
600 (ins->rex & REX_R ? 8 : 0);
605 if (s_field_for == (c & 3)) {
606 opx->offset = gets8(data);
609 opx->offset = getu16(data);
616 s_field_for = (*data & 0x02) ? c & 3 : -1;
617 if ((*data++ & ~0x02) != *r++)
622 if (s_field_for == (c & 3)) {
623 opx->offset = gets8(data);
626 opx->offset = getu32(data);
633 ins->drexdst = c & 3;
637 ins->rex |= REX_D|REX_OC;
638 ins->drexdst = c & 3;
642 data = do_drex(data, ins);
649 uint8_t ximm = *data++;
651 ins->oprs[c >> 3].basereg = ximm >> 4;
652 ins->oprs[c >> 3].segment |= SEG_RMREG;
653 ins->oprs[c & 7].offset = ximm & 15;
659 uint8_t ximm = *data++;
665 ins->oprs[c >> 4].basereg = ximm >> 4;
666 ins->oprs[c >> 4].segment |= SEG_RMREG;
680 if (((modrm >> 3) & 07) != (c & 07))
681 return false; /* spare field doesn't match up */
682 data = do_ea(data, modrm, asize, segsize,
683 &ins->oprs[(c >> 3) & 07], ins);
694 if ((prefix->rex & (REX_V|REX_D|REX_P)) != REX_V)
697 if ((vexm & 0x1f) != prefix->vex_m)
700 switch (vexwlp & 030) {
702 if (prefix->rex & REX_W)
706 if (!(prefix->rex & REX_W))
710 break; /* XXX: Need to do anything special here? */
713 if ((vexwlp & 007) != prefix->vex_lp)
716 opx->segment |= SEG_RMREG;
717 opx->basereg = prefix->vex_v;
726 if ((prefix->rex & (REX_V|REX_D|REX_P)) != REX_V)
729 if ((vexm & 0x1f) != prefix->vex_m)
732 switch (vexwlp & 030) {
734 if (ins->rex & REX_W)
738 if (!(ins->rex & REX_W))
742 break; /* Need to do anything special here? */
745 if ((vexwlp & 007) != prefix->vex_lp)
748 if (prefix->vex_v != 0)
769 if (asize != segsize)
783 if (prefix->rex & REX_B)
788 if (prefix->rex & REX_X)
793 if (prefix->rex & REX_R)
798 if (prefix->rex & REX_W)
817 if (osize != (segsize == 16) ? 16 : 32)
824 ins->rex |= REX_W; /* 64-bit only instruction */
830 if (!(ins->rex & (REX_P|REX_W)) || osize != 64)
837 int t = *r++, d = *data++;
838 if (d < t || d > t + 15)
841 ins->condition = d - t;
851 if (prefix->rep != 0xF2)
857 if (prefix->rep != 0xF3)
900 return false; /* Unknown code */
904 /* REX cannot be combined with DREX or VEX */
905 if ((ins->rex & (REX_D|REX_V)) && (prefix->rex & REX_P))
909 * Check for unused rep or a/o prefixes.
911 for (i = 0; i < t->operands; i++) {
912 if (ins->oprs[i].segment != SEG_RMREG)
917 if (ins->prefixes[PPS_LREP])
919 ins->prefixes[PPS_LREP] = P_LOCK;
922 if (ins->prefixes[PPS_LREP])
924 ins->prefixes[PPS_LREP] = drep;
927 if (osize != ((segsize == 16) ? 16 : 32)) {
928 enum prefixes pfx = 0;
942 if (ins->prefixes[PPS_OSIZE])
944 ins->prefixes[PPS_OSIZE] = pfx;
947 if (!a_used && asize != segsize) {
948 if (ins->prefixes[PPS_ASIZE])
950 ins->prefixes[PPS_ASIZE] = asize == 16 ? P_A16 : P_A32;
953 /* Fix: check for redundant REX prefixes */
955 return data - origdata;
958 int32_t disasm(uint8_t *data, char *output, int outbufsize, int segsize,
959 int32_t offset, int autosync, uint32_t prefer)
961 const struct itemplate * const *p, * const *best_p;
962 const struct disasm_index *ix;
964 int length, best_length = 0;
966 int i, slen, colon, n;
970 uint32_t goodness, best;
972 struct prefix_info prefix;
975 memset(&ins, 0, sizeof ins);
980 memset(&prefix, 0, sizeof prefix);
981 prefix.asize = segsize;
982 prefix.osize = (segsize == 64) ? 32 : segsize;
987 while (!end_prefix) {
991 prefix.rep = *data++;
994 prefix.lock = *data++;
997 segover = "cs", prefix.seg = *data++;
1000 segover = "ss", prefix.seg = *data++;
1003 segover = "ds", prefix.seg = *data++;
1006 segover = "es", prefix.seg = *data++;
1009 segover = "fs", prefix.seg = *data++;
1012 segover = "gs", prefix.seg = *data++;
1015 prefix.osize = (segsize == 16) ? 32 : 16;
1016 prefix.osp = *data++;
1019 prefix.asize = (segsize == 32) ? 16 : 32;
1020 prefix.asp = *data++;
1024 if (segsize == 64 || (data[1] & 0xc0) == 0xc0) {
1025 prefix.vex[0] = *data++;
1026 prefix.vex[1] = *data++;
1027 if (prefix.vex[0] == 0xc4)
1028 prefix.vex[2] = *data++;
1031 if (prefix.vex[0] == 0xc4) {
1032 prefix.rex |= (~prefix.vex[1] >> 5) & 7; /* REX_RXB */
1033 prefix.rex |= (prefix.vex[2] >> (7-3)) & REX_W;
1034 prefix.vex_m = prefix.vex[1] & 0x1f;
1035 prefix.vex_v = (~prefix.vex[2] >> 3) & 15;
1036 prefix.vex_lp = prefix.vex[2] & 7;
1038 prefix.rex |= (~prefix.vex[1] >> (7-2)) & REX_R;
1040 prefix.vex_v = (~prefix.vex[1] >> 3) & 15;
1041 prefix.vex_lp = prefix.vex[1] & 7;
1061 if (segsize == 64) {
1062 prefix.rex = *data++;
1063 if (prefix.rex & REX_W)
1074 best = -1; /* Worst possible */
1076 best_pref = INT_MAX;
1079 ix = itable + *dp++;
1080 while (ix->n == -1) {
1081 ix = (const struct disasm_index *)ix->p + *dp++;
1084 p = (const struct itemplate * const *)ix->p;
1085 for (n = ix->n; n; n--, p++) {
1086 if ((length = matches(*p, data, &prefix, segsize, &tmp_ins))) {
1089 * Final check to make sure the types of r/m match up.
1090 * XXX: Need to make sure this is actually correct.
1092 for (i = 0; i < (*p)->operands; i++) {
1093 if (!((*p)->opd[i] & SAME_AS) &&
1095 /* If it's a mem-only EA but we have a
1097 ((tmp_ins.oprs[i].segment & SEG_RMREG) &&
1098 !(MEMORY & ~(*p)->opd[i])) ||
1099 /* If it's a reg-only EA but we have a memory
1101 (!(tmp_ins.oprs[i].segment & SEG_RMREG) &&
1102 !(REG_EA & ~(*p)->opd[i]) &&
1103 !((*p)->opd[i] & REG_SMASK)) ||
1104 /* Register type mismatch (eg FS vs REG_DESS):
1106 ((((*p)->opd[i] & (REGISTER | FPUREG)) ||
1107 (tmp_ins.oprs[i].segment & SEG_RMREG)) &&
1108 !whichreg((*p)->opd[i],
1109 tmp_ins.oprs[i].basereg, tmp_ins.rex))
1117 * Note: we always prefer instructions which incorporate
1118 * prefixes in the instructions themselves. This is to allow
1119 * e.g. PAUSE to be preferred to REP NOP, and deal with
1120 * MMX/SSE instructions where prefixes are used to select
1121 * between MMX and SSE register sets or outright opcode
1126 goodness = ((*p)->flags & IF_PFMASK) ^ prefer;
1128 for (i = 0; i < MAXPREFIX; i++)
1129 if (tmp_ins.prefixes[i])
1131 if (nprefix < best_pref ||
1132 (nprefix == best_pref && goodness < best)) {
1133 /* This is the best one found so far */
1136 best_pref = nprefix;
1137 best_length = length;
1145 return 0; /* no instruction was matched */
1147 /* Pick the best match */
1149 length = best_length;
1153 /* TODO: snprintf returns the value that the string would have if
1154 * the buffer were long enough, and not the actual length of
1155 * the returned string, so each instance of using the return
1156 * value of snprintf should actually be checked to assure that
1157 * the return value is "sane." Maybe a macro wrapper could
1158 * be used for that purpose.
1160 for (i = 0; i < MAXPREFIX; i++)
1161 switch (ins.prefixes[i]) {
1163 slen += snprintf(output + slen, outbufsize - slen, "lock ");
1166 slen += snprintf(output + slen, outbufsize - slen, "rep ");
1169 slen += snprintf(output + slen, outbufsize - slen, "repe ");
1172 slen += snprintf(output + slen, outbufsize - slen, "repne ");
1175 slen += snprintf(output + slen, outbufsize - slen, "a16 ");
1178 slen += snprintf(output + slen, outbufsize - slen, "a32 ");
1181 slen += snprintf(output + slen, outbufsize - slen, "a64 ");
1184 slen += snprintf(output + slen, outbufsize - slen, "o16 ");
1187 slen += snprintf(output + slen, outbufsize - slen, "o32 ");
1190 slen += snprintf(output + slen, outbufsize - slen, "o64 ");
1196 for (i = 0; i < (int)elements(ico); i++)
1197 if ((*p)->opcode == ico[i]) {
1199 snprintf(output + slen, outbufsize - slen, "%s%s", icn[i],
1200 whichcond(ins.condition));
1203 if (i >= (int)elements(ico))
1205 snprintf(output + slen, outbufsize - slen, "%s",
1206 insn_names[(*p)->opcode]);
1208 length += data - origdata; /* fix up for prefixes */
1209 for (i = 0; i < (*p)->operands; i++) {
1210 opflags_t t = (*p)->opd[i];
1211 const operand *o = &ins.oprs[i];
1215 o = &ins.oprs[t & ~SAME_AS];
1216 t = (*p)->opd[t & ~SAME_AS];
1219 output[slen++] = (colon ? ':' : i == 0 ? ' ' : ',');
1222 if (o->segment & SEG_RELATIVE) {
1223 offs += offset + length;
1225 * sort out wraparound
1227 if (!(o->segment & (SEG_32BIT|SEG_64BIT)))
1229 else if (segsize != 64)
1233 * add sync marker, if autosync is on
1244 if ((t & (REGISTER | FPUREG)) ||
1245 (o->segment & SEG_RMREG)) {
1247 reg = whichreg(t, o->basereg, ins.rex);
1249 slen += snprintf(output + slen, outbufsize - slen, "to ");
1250 slen += snprintf(output + slen, outbufsize - slen, "%s",
1251 reg_names[reg - EXPR_REG_START]);
1252 } else if (!(UNITY & ~t)) {
1253 output[slen++] = '1';
1254 } else if (t & IMMEDIATE) {
1257 snprintf(output + slen, outbufsize - slen, "byte ");
1258 if (o->segment & SEG_SIGNED) {
1261 output[slen++] = '-';
1263 output[slen++] = '+';
1265 } else if (t & BITS16) {
1267 snprintf(output + slen, outbufsize - slen, "word ");
1268 } else if (t & BITS32) {
1270 snprintf(output + slen, outbufsize - slen, "dword ");
1271 } else if (t & BITS64) {
1273 snprintf(output + slen, outbufsize - slen, "qword ");
1274 } else if (t & NEAR) {
1276 snprintf(output + slen, outbufsize - slen, "near ");
1277 } else if (t & SHORT) {
1279 snprintf(output + slen, outbufsize - slen, "short ");
1282 snprintf(output + slen, outbufsize - slen, "0x%"PRIx64"",
1284 } else if (!(MEM_OFFS & ~t)) {
1286 snprintf(output + slen, outbufsize - slen,
1287 "[%s%s%s0x%"PRIx64"]",
1288 (segover ? segover : ""),
1289 (segover ? ":" : ""),
1290 (o->disp_size == 64 ? "qword " :
1291 o->disp_size == 32 ? "dword " :
1292 o->disp_size == 16 ? "word " : ""), offs);
1294 } else if (!(REGMEM & ~t)) {
1295 int started = false;
1298 snprintf(output + slen, outbufsize - slen, "byte ");
1301 snprintf(output + slen, outbufsize - slen, "word ");
1304 snprintf(output + slen, outbufsize - slen, "dword ");
1307 snprintf(output + slen, outbufsize - slen, "qword ");
1310 snprintf(output + slen, outbufsize - slen, "tword ");
1313 snprintf(output + slen, outbufsize - slen, "oword ");
1315 slen += snprintf(output + slen, outbufsize - slen, "far ");
1318 snprintf(output + slen, outbufsize - slen, "near ");
1319 output[slen++] = '[';
1321 slen += snprintf(output + slen, outbufsize - slen, "%s",
1322 (o->disp_size == 64 ? "qword " :
1323 o->disp_size == 32 ? "dword " :
1324 o->disp_size == 16 ? "word " :
1326 if (o->eaflags & EAF_REL)
1327 slen += snprintf(output + slen, outbufsize - slen, "rel ");
1330 snprintf(output + slen, outbufsize - slen, "%s:",
1334 if (o->basereg != -1) {
1335 slen += snprintf(output + slen, outbufsize - slen, "%s",
1336 reg_names[(o->basereg -
1340 if (o->indexreg != -1) {
1342 output[slen++] = '+';
1343 slen += snprintf(output + slen, outbufsize - slen, "%s",
1344 reg_names[(o->indexreg -
1348 snprintf(output + slen, outbufsize - slen, "*%d",
1354 if (o->segment & SEG_DISP8) {
1356 uint8_t offset = offs;
1357 if ((int8_t)offset < 0) {
1364 snprintf(output + slen, outbufsize - slen, "%s0x%"PRIx8"",
1366 } else if (o->segment & SEG_DISP16) {
1368 uint16_t offset = offs;
1369 if ((int16_t)offset < 0 && started) {
1373 prefix = started ? "+" : "";
1376 snprintf(output + slen, outbufsize - slen,
1377 "%s0x%"PRIx16"", prefix, offset);
1378 } else if (o->segment & SEG_DISP32) {
1379 if (prefix.asize == 64) {
1381 uint64_t offset = (int64_t)(int32_t)offs;
1382 if ((int32_t)offs < 0 && started) {
1386 prefix = started ? "+" : "";
1389 snprintf(output + slen, outbufsize - slen,
1390 "%s0x%"PRIx64"", prefix, offset);
1393 uint32_t offset = offs;
1394 if ((int32_t) offset < 0 && started) {
1398 prefix = started ? "+" : "";
1401 snprintf(output + slen, outbufsize - slen,
1402 "%s0x%"PRIx32"", prefix, offset);
1405 output[slen++] = ']';
1408 snprintf(output + slen, outbufsize - slen, "<operand%d>",
1412 output[slen] = '\0';
1413 if (segover) { /* unused segment override */
1415 int count = slen + 1;
1417 p[count + 3] = p[count];
1418 strncpy(output, segover, 2);
1424 int32_t eatbyte(uint8_t *data, char *output, int outbufsize)
1426 snprintf(output, outbufsize, "db 0x%02X", *data);