1 /* General "disassemble this chunk" code. Used for debugging. */
3 #include "qemu-common.h"
9 #include "disas/disas.h"
11 typedef struct CPUDebug {
12 struct disassemble_info info;
16 /* Filled in by elfload.c. Simplistic, but will do for now. */
17 struct syminfo *syminfos = NULL;
19 /* Get LENGTH bytes from info's buffer, at target address memaddr.
20 Transfer them to myaddr. */
22 buffer_read_memory(bfd_vma memaddr, bfd_byte *myaddr, int length,
23 struct disassemble_info *info)
25 if (memaddr < info->buffer_vma
26 || memaddr + length > info->buffer_vma + info->buffer_length)
27 /* Out of bounds. Use EIO because GDB uses it. */
29 memcpy (myaddr, info->buffer + (memaddr - info->buffer_vma), length);
33 /* Get LENGTH bytes from info's buffer, at target address memaddr.
34 Transfer them to myaddr. */
36 target_read_memory (bfd_vma memaddr,
39 struct disassemble_info *info)
41 CPUDebug *s = container_of(info, CPUDebug, info);
43 cpu_memory_rw_debug(s->cpu, memaddr, myaddr, length, 0);
47 /* Print an error message. We can assume that this is in response to
48 an error return from buffer_read_memory. */
50 perror_memory (int status, bfd_vma memaddr, struct disassemble_info *info)
54 (*info->fprintf_func) (info->stream, "Unknown error %d\n", status);
56 /* Actually, address between memaddr and memaddr + len was
58 (*info->fprintf_func) (info->stream,
59 "Address 0x%" PRIx64 " is out of bounds.\n", memaddr);
62 /* This could be in a separate file, to save minuscule amounts of space
63 in statically linked executables. */
65 /* Just print the address is hex. This is included for completeness even
66 though both GDB and objdump provide their own (to print symbolic
70 generic_print_address (bfd_vma addr, struct disassemble_info *info)
72 (*info->fprintf_func) (info->stream, "0x%" PRIx64, addr);
75 /* Print address in hex, truncated to the width of a target virtual address. */
77 generic_print_target_address(bfd_vma addr, struct disassemble_info *info)
79 uint64_t mask = ~0ULL >> (64 - TARGET_VIRT_ADDR_SPACE_BITS);
80 generic_print_address(addr & mask, info);
83 /* Print address in hex, truncated to the width of a host virtual address. */
85 generic_print_host_address(bfd_vma addr, struct disassemble_info *info)
87 uint64_t mask = ~0ULL >> (64 - (sizeof(void *) * 8));
88 generic_print_address(addr & mask, info);
91 /* Just return the given address. */
94 generic_symbol_at_address (bfd_vma addr, struct disassemble_info *info)
99 bfd_vma bfd_getl64 (const bfd_byte *addr)
101 unsigned long long v;
103 v = (unsigned long long) addr[0];
104 v |= (unsigned long long) addr[1] << 8;
105 v |= (unsigned long long) addr[2] << 16;
106 v |= (unsigned long long) addr[3] << 24;
107 v |= (unsigned long long) addr[4] << 32;
108 v |= (unsigned long long) addr[5] << 40;
109 v |= (unsigned long long) addr[6] << 48;
110 v |= (unsigned long long) addr[7] << 56;
114 bfd_vma bfd_getl32 (const bfd_byte *addr)
118 v = (unsigned long) addr[0];
119 v |= (unsigned long) addr[1] << 8;
120 v |= (unsigned long) addr[2] << 16;
121 v |= (unsigned long) addr[3] << 24;
125 bfd_vma bfd_getb32 (const bfd_byte *addr)
129 v = (unsigned long) addr[0] << 24;
130 v |= (unsigned long) addr[1] << 16;
131 v |= (unsigned long) addr[2] << 8;
132 v |= (unsigned long) addr[3];
136 bfd_vma bfd_getl16 (const bfd_byte *addr)
140 v = (unsigned long) addr[0];
141 v |= (unsigned long) addr[1] << 8;
145 bfd_vma bfd_getb16 (const bfd_byte *addr)
149 v = (unsigned long) addr[0] << 24;
150 v |= (unsigned long) addr[1] << 16;
154 static int print_insn_objdump(bfd_vma pc, disassemble_info *info,
157 int i, n = info->buffer_length;
158 uint8_t *buf = g_malloc(n);
160 info->read_memory_func(pc, buf, n, info);
162 for (i = 0; i < n; ++i) {
164 info->fprintf_func(info->stream, "\n%s: ", prefix);
166 info->fprintf_func(info->stream, "%02x", buf[i]);
173 static int print_insn_od_host(bfd_vma pc, disassemble_info *info)
175 return print_insn_objdump(pc, info, "OBJD-H");
178 static int print_insn_od_target(bfd_vma pc, disassemble_info *info)
180 return print_insn_objdump(pc, info, "OBJD-T");
183 /* Disassemble this for me please... (debugging). 'flags' has the following
185 i386 - 1 means 16 bit code, 2 means 64 bit code
186 ppc - bits 0:15 specify (optionally) the machine instruction set;
187 bit 16 indicates little endian.
188 other targets - unused
190 void target_disas(FILE *out, CPUState *cpu, target_ulong code,
191 target_ulong size, int flags)
193 CPUClass *cc = CPU_GET_CLASS(cpu);
198 INIT_DISASSEMBLE_INFO(s.info, out, fprintf);
201 s.info.read_memory_func = target_read_memory;
202 s.info.buffer_vma = code;
203 s.info.buffer_length = size;
204 s.info.print_address_func = generic_print_target_address;
206 #ifdef TARGET_WORDS_BIGENDIAN
207 s.info.endian = BFD_ENDIAN_BIG;
209 s.info.endian = BFD_ENDIAN_LITTLE;
212 if (cc->disas_set_info) {
213 cc->disas_set_info(cpu, &s.info);
216 #if defined(TARGET_I386)
218 s.info.mach = bfd_mach_x86_64;
219 } else if (flags == 1) {
220 s.info.mach = bfd_mach_i386_i8086;
222 s.info.mach = bfd_mach_i386_i386;
224 s.info.print_insn = print_insn_i386;
225 #elif defined(TARGET_SPARC)
226 s.info.print_insn = print_insn_sparc;
227 #ifdef TARGET_SPARC64
228 s.info.mach = bfd_mach_sparc_v9b;
230 #elif defined(TARGET_PPC)
231 if ((flags >> 16) & 1) {
232 s.info.endian = BFD_ENDIAN_LITTLE;
234 if (flags & 0xFFFF) {
235 /* If we have a precise definition of the instruction set, use it. */
236 s.info.mach = flags & 0xFFFF;
239 s.info.mach = bfd_mach_ppc64;
241 s.info.mach = bfd_mach_ppc;
244 s.info.disassembler_options = (char *)"any";
245 s.info.print_insn = print_insn_ppc;
246 #elif defined(TARGET_M68K)
247 s.info.print_insn = print_insn_m68k;
248 #elif defined(TARGET_MIPS)
249 #ifdef TARGET_WORDS_BIGENDIAN
250 s.info.print_insn = print_insn_big_mips;
252 s.info.print_insn = print_insn_little_mips;
254 #elif defined(TARGET_SH4)
255 s.info.mach = bfd_mach_sh4;
256 s.info.print_insn = print_insn_sh;
257 #elif defined(TARGET_ALPHA)
258 s.info.mach = bfd_mach_alpha_ev6;
259 s.info.print_insn = print_insn_alpha;
260 #elif defined(TARGET_CRIS)
262 s.info.mach = bfd_mach_cris_v0_v10;
263 s.info.print_insn = print_insn_crisv10;
265 s.info.mach = bfd_mach_cris_v32;
266 s.info.print_insn = print_insn_crisv32;
268 #elif defined(TARGET_S390X)
269 s.info.mach = bfd_mach_s390_64;
270 s.info.print_insn = print_insn_s390;
271 #elif defined(TARGET_MICROBLAZE)
272 s.info.mach = bfd_arch_microblaze;
273 s.info.print_insn = print_insn_microblaze;
274 #elif defined(TARGET_MOXIE)
275 s.info.mach = bfd_arch_moxie;
276 s.info.print_insn = print_insn_moxie;
277 #elif defined(TARGET_LM32)
278 s.info.mach = bfd_mach_lm32;
279 s.info.print_insn = print_insn_lm32;
281 if (s.info.print_insn == NULL) {
282 s.info.print_insn = print_insn_od_target;
285 for (pc = code; size > 0; pc += count, size -= count) {
286 fprintf(out, "0x" TARGET_FMT_lx ": ", pc);
287 count = s.info.print_insn(pc, &s.info);
293 for(i = 0; i < count; i++) {
294 target_read_memory(pc + i, &b, 1, &s.info);
295 fprintf(out, " %02x", b);
305 "Disassembler disagrees with translator over instruction "
307 "Please report this to qemu-devel@nongnu.org\n");
313 /* Disassemble this for me please... (debugging). */
314 void disas(FILE *out, void *code, unsigned long size)
319 int (*print_insn)(bfd_vma pc, disassemble_info *info) = NULL;
321 INIT_DISASSEMBLE_INFO(s.info, out, fprintf);
322 s.info.print_address_func = generic_print_host_address;
324 s.info.buffer = code;
325 s.info.buffer_vma = (uintptr_t)code;
326 s.info.buffer_length = size;
328 #ifdef HOST_WORDS_BIGENDIAN
329 s.info.endian = BFD_ENDIAN_BIG;
331 s.info.endian = BFD_ENDIAN_LITTLE;
333 #if defined(CONFIG_TCG_INTERPRETER)
334 print_insn = print_insn_tci;
335 #elif defined(__i386__)
336 s.info.mach = bfd_mach_i386_i386;
337 print_insn = print_insn_i386;
338 #elif defined(__x86_64__)
339 s.info.mach = bfd_mach_x86_64;
340 print_insn = print_insn_i386;
341 #elif defined(_ARCH_PPC)
342 s.info.disassembler_options = (char *)"any";
343 print_insn = print_insn_ppc;
344 #elif defined(__aarch64__) && defined(CONFIG_ARM_A64_DIS)
345 print_insn = print_insn_arm_a64;
346 #elif defined(__alpha__)
347 print_insn = print_insn_alpha;
348 #elif defined(__sparc__)
349 print_insn = print_insn_sparc;
350 s.info.mach = bfd_mach_sparc_v9b;
351 #elif defined(__arm__)
352 print_insn = print_insn_arm;
353 #elif defined(__MIPSEB__)
354 print_insn = print_insn_big_mips;
355 #elif defined(__MIPSEL__)
356 print_insn = print_insn_little_mips;
357 #elif defined(__m68k__)
358 print_insn = print_insn_m68k;
359 #elif defined(__s390__)
360 print_insn = print_insn_s390;
361 #elif defined(__hppa__)
362 print_insn = print_insn_hppa;
363 #elif defined(__ia64__)
364 print_insn = print_insn_ia64;
366 if (print_insn == NULL) {
367 print_insn = print_insn_od_host;
369 for (pc = (uintptr_t)code; size > 0; pc += count, size -= count) {
370 fprintf(out, "0x%08" PRIxPTR ": ", pc);
371 count = print_insn(pc, &s.info);
378 /* Look up symbol for debugging purpose. Returns "" if unknown. */
379 const char *lookup_symbol(target_ulong orig_addr)
381 const char *symbol = "";
384 for (s = syminfos; s; s = s->next) {
385 symbol = s->lookup_symbol(s, orig_addr);
386 if (symbol[0] != '\0') {
394 #if !defined(CONFIG_USER_ONLY)
396 #include "monitor/monitor.h"
398 static int monitor_disas_is_physical;
401 monitor_read_memory (bfd_vma memaddr, bfd_byte *myaddr, int length,
402 struct disassemble_info *info)
404 CPUDebug *s = container_of(info, CPUDebug, info);
406 if (monitor_disas_is_physical) {
407 cpu_physical_memory_read(memaddr, myaddr, length);
409 cpu_memory_rw_debug(s->cpu, memaddr, myaddr, length, 0);
414 static int GCC_FMT_ATTR(2, 3)
415 monitor_fprintf(FILE *stream, const char *fmt, ...)
419 monitor_vprintf((Monitor *)stream, fmt, ap);
424 /* Disassembler for the monitor.
425 See target_disas for a description of flags. */
426 void monitor_disas(Monitor *mon, CPUState *cpu,
427 target_ulong pc, int nb_insn, int is_physical, int flags)
429 CPUClass *cc = CPU_GET_CLASS(cpu);
433 INIT_DISASSEMBLE_INFO(s.info, (FILE *)mon, monitor_fprintf);
436 monitor_disas_is_physical = is_physical;
437 s.info.read_memory_func = monitor_read_memory;
438 s.info.print_address_func = generic_print_target_address;
440 s.info.buffer_vma = pc;
442 #ifdef TARGET_WORDS_BIGENDIAN
443 s.info.endian = BFD_ENDIAN_BIG;
445 s.info.endian = BFD_ENDIAN_LITTLE;
448 if (cc->disas_set_info) {
449 cc->disas_set_info(cpu, &s.info);
452 #if defined(TARGET_I386)
454 s.info.mach = bfd_mach_x86_64;
455 } else if (flags == 1) {
456 s.info.mach = bfd_mach_i386_i8086;
458 s.info.mach = bfd_mach_i386_i386;
460 s.info.print_insn = print_insn_i386;
461 #elif defined(TARGET_ALPHA)
462 s.info.print_insn = print_insn_alpha;
463 #elif defined(TARGET_SPARC)
464 s.info.print_insn = print_insn_sparc;
465 #ifdef TARGET_SPARC64
466 s.info.mach = bfd_mach_sparc_v9b;
468 #elif defined(TARGET_PPC)
469 if (flags & 0xFFFF) {
470 /* If we have a precise definition of the instruction set, use it. */
471 s.info.mach = flags & 0xFFFF;
474 s.info.mach = bfd_mach_ppc64;
476 s.info.mach = bfd_mach_ppc;
479 if ((flags >> 16) & 1) {
480 s.info.endian = BFD_ENDIAN_LITTLE;
482 s.info.print_insn = print_insn_ppc;
483 #elif defined(TARGET_M68K)
484 s.info.print_insn = print_insn_m68k;
485 #elif defined(TARGET_MIPS)
486 #ifdef TARGET_WORDS_BIGENDIAN
487 s.info.print_insn = print_insn_big_mips;
489 s.info.print_insn = print_insn_little_mips;
491 #elif defined(TARGET_SH4)
492 s.info.mach = bfd_mach_sh4;
493 s.info.print_insn = print_insn_sh;
494 #elif defined(TARGET_S390X)
495 s.info.mach = bfd_mach_s390_64;
496 s.info.print_insn = print_insn_s390;
497 #elif defined(TARGET_MOXIE)
498 s.info.mach = bfd_arch_moxie;
499 s.info.print_insn = print_insn_moxie;
500 #elif defined(TARGET_LM32)
501 s.info.mach = bfd_mach_lm32;
502 s.info.print_insn = print_insn_lm32;
504 if (!s.info.print_insn) {
505 monitor_printf(mon, "0x" TARGET_FMT_lx
506 ": Asm output not supported on this arch\n", pc);
510 for(i = 0; i < nb_insn; i++) {
511 monitor_printf(mon, "0x" TARGET_FMT_lx ": ", pc);
512 count = s.info.print_insn(pc, &s.info);
513 monitor_printf(mon, "\n");