1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file.
5 #ifndef V8_X64_ASSEMBLER_X64_INL_H_
6 #define V8_X64_ASSEMBLER_X64_INL_H_
8 #include "src/x64/assembler-x64.h"
10 #include "src/base/cpu.h"
11 #include "src/debug.h"
12 #include "src/v8memory.h"
17 bool CpuFeatures::SupportsCrankshaft() { return true; }
20 // -----------------------------------------------------------------------------
21 // Implementation of Assembler
24 static const byte kCallOpcode = 0xE8;
25 // The length of pushq(rbp), movp(rbp, rsp), Push(rsi) and Push(rdi).
26 static const int kNoCodeAgeSequenceLength = kPointerSize == kInt64Size ? 6 : 17;
29 void Assembler::emitl(uint32_t x) {
30 Memory::uint32_at(pc_) = x;
31 pc_ += sizeof(uint32_t);
35 void Assembler::emitp(void* x, RelocInfo::Mode rmode) {
36 uintptr_t value = reinterpret_cast<uintptr_t>(x);
37 Memory::uintptr_at(pc_) = value;
38 if (!RelocInfo::IsNone(rmode)) {
39 RecordRelocInfo(rmode, value);
41 pc_ += sizeof(uintptr_t);
45 void Assembler::emitq(uint64_t x) {
46 Memory::uint64_at(pc_) = x;
47 pc_ += sizeof(uint64_t);
51 void Assembler::emitw(uint16_t x) {
52 Memory::uint16_at(pc_) = x;
53 pc_ += sizeof(uint16_t);
57 void Assembler::emit_code_target(Handle<Code> target,
58 RelocInfo::Mode rmode,
59 TypeFeedbackId ast_id) {
60 DCHECK(RelocInfo::IsCodeTarget(rmode) ||
61 rmode == RelocInfo::CODE_AGE_SEQUENCE);
62 if (rmode == RelocInfo::CODE_TARGET && !ast_id.IsNone()) {
63 RecordRelocInfo(RelocInfo::CODE_TARGET_WITH_ID, ast_id.ToInt());
65 RecordRelocInfo(rmode);
67 int current = code_targets_.length();
68 if (current > 0 && code_targets_.last().is_identical_to(target)) {
69 // Optimization if we keep jumping to the same code target.
72 code_targets_.Add(target);
78 void Assembler::emit_runtime_entry(Address entry, RelocInfo::Mode rmode) {
79 DCHECK(RelocInfo::IsRuntimeEntry(rmode));
80 RecordRelocInfo(rmode);
81 emitl(static_cast<uint32_t>(entry - isolate()->code_range()->start()));
85 void Assembler::emit_rex_64(Register reg, Register rm_reg) {
86 emit(0x48 | reg.high_bit() << 2 | rm_reg.high_bit());
90 void Assembler::emit_rex_64(XMMRegister reg, Register rm_reg) {
91 emit(0x48 | (reg.code() & 0x8) >> 1 | rm_reg.code() >> 3);
95 void Assembler::emit_rex_64(Register reg, XMMRegister rm_reg) {
96 emit(0x48 | (reg.code() & 0x8) >> 1 | rm_reg.code() >> 3);
100 void Assembler::emit_rex_64(Register reg, const Operand& op) {
101 emit(0x48 | reg.high_bit() << 2 | op.rex_);
105 void Assembler::emit_rex_64(XMMRegister reg, const Operand& op) {
106 emit(0x48 | (reg.code() & 0x8) >> 1 | op.rex_);
110 void Assembler::emit_rex_64(Register rm_reg) {
111 DCHECK_EQ(rm_reg.code() & 0xf, rm_reg.code());
112 emit(0x48 | rm_reg.high_bit());
116 void Assembler::emit_rex_64(const Operand& op) {
117 emit(0x48 | op.rex_);
121 void Assembler::emit_rex_32(Register reg, Register rm_reg) {
122 emit(0x40 | reg.high_bit() << 2 | rm_reg.high_bit());
126 void Assembler::emit_rex_32(Register reg, const Operand& op) {
127 emit(0x40 | reg.high_bit() << 2 | op.rex_);
131 void Assembler::emit_rex_32(Register rm_reg) {
132 emit(0x40 | rm_reg.high_bit());
136 void Assembler::emit_rex_32(const Operand& op) {
137 emit(0x40 | op.rex_);
141 void Assembler::emit_optional_rex_32(Register reg, Register rm_reg) {
142 byte rex_bits = reg.high_bit() << 2 | rm_reg.high_bit();
143 if (rex_bits != 0) emit(0x40 | rex_bits);
147 void Assembler::emit_optional_rex_32(Register reg, const Operand& op) {
148 byte rex_bits = reg.high_bit() << 2 | op.rex_;
149 if (rex_bits != 0) emit(0x40 | rex_bits);
153 void Assembler::emit_optional_rex_32(XMMRegister reg, const Operand& op) {
154 byte rex_bits = (reg.code() & 0x8) >> 1 | op.rex_;
155 if (rex_bits != 0) emit(0x40 | rex_bits);
159 void Assembler::emit_optional_rex_32(XMMRegister reg, XMMRegister base) {
160 byte rex_bits = (reg.code() & 0x8) >> 1 | (base.code() & 0x8) >> 3;
161 if (rex_bits != 0) emit(0x40 | rex_bits);
165 void Assembler::emit_optional_rex_32(XMMRegister reg, Register base) {
166 byte rex_bits = (reg.code() & 0x8) >> 1 | (base.code() & 0x8) >> 3;
167 if (rex_bits != 0) emit(0x40 | rex_bits);
171 void Assembler::emit_optional_rex_32(Register reg, XMMRegister base) {
172 byte rex_bits = (reg.code() & 0x8) >> 1 | (base.code() & 0x8) >> 3;
173 if (rex_bits != 0) emit(0x40 | rex_bits);
177 void Assembler::emit_optional_rex_32(Register rm_reg) {
178 if (rm_reg.high_bit()) emit(0x41);
182 void Assembler::emit_optional_rex_32(XMMRegister rm_reg) {
183 if (rm_reg.high_bit()) emit(0x41);
187 void Assembler::emit_optional_rex_32(const Operand& op) {
188 if (op.rex_ != 0) emit(0x40 | op.rex_);
192 // byte 1 of 3-byte VEX
193 void Assembler::emit_vex3_byte1(XMMRegister reg, XMMRegister rm,
195 byte rxb = ~((reg.high_bit() << 2) | rm.high_bit()) << 5;
200 // byte 1 of 3-byte VEX
201 void Assembler::emit_vex3_byte1(XMMRegister reg, const Operand& rm,
203 byte rxb = ~((reg.high_bit() << 2) | rm.rex_) << 5;
208 // byte 1 of 2-byte VEX
209 void Assembler::emit_vex2_byte1(XMMRegister reg, XMMRegister v, VectorLength l,
211 byte rv = ~((reg.high_bit() << 4) | v.code()) << 3;
216 // byte 2 of 3-byte VEX
217 void Assembler::emit_vex3_byte2(VexW w, XMMRegister v, VectorLength l,
219 emit(w | ((~v.code() & 0xf) << 3) | l | pp);
223 void Assembler::emit_vex_prefix(XMMRegister reg, XMMRegister vreg,
224 XMMRegister rm, VectorLength l, SIMDPrefix pp,
225 LeadingOpcode mm, VexW w) {
226 if (rm.high_bit() || mm != k0F || w != kW0) {
228 emit_vex3_byte1(reg, rm, mm);
229 emit_vex3_byte2(w, vreg, l, pp);
232 emit_vex2_byte1(reg, vreg, l, pp);
237 void Assembler::emit_vex_prefix(XMMRegister reg, XMMRegister vreg,
238 const Operand& rm, VectorLength l,
239 SIMDPrefix pp, LeadingOpcode mm, VexW w) {
240 if (rm.rex_ || mm != k0F || w != kW0) {
242 emit_vex3_byte1(reg, rm, mm);
243 emit_vex3_byte2(w, vreg, l, pp);
246 emit_vex2_byte1(reg, vreg, l, pp);
251 Address Assembler::target_address_at(Address pc,
252 ConstantPoolArray* constant_pool) {
253 return Memory::int32_at(pc) + pc + 4;
257 void Assembler::set_target_address_at(Address pc,
258 ConstantPoolArray* constant_pool,
260 ICacheFlushMode icache_flush_mode) {
261 Memory::int32_at(pc) = static_cast<int32_t>(target - pc - 4);
262 if (icache_flush_mode != SKIP_ICACHE_FLUSH) {
263 CpuFeatures::FlushICache(pc, sizeof(int32_t));
268 Address Assembler::target_address_from_return_address(Address pc) {
269 return pc - kCallTargetAddressOffset;
273 Address Assembler::break_address_from_return_address(Address pc) {
274 return pc - Assembler::kPatchDebugBreakSlotReturnOffset;
278 Handle<Object> Assembler::code_target_object_handle_at(Address pc) {
279 return code_targets_[Memory::int32_at(pc)];
283 Address Assembler::runtime_entry_at(Address pc) {
284 return Memory::int32_at(pc) + isolate()->code_range()->start();
287 // -----------------------------------------------------------------------------
288 // Implementation of RelocInfo
290 // The modes possibly affected by apply must be in kApplyMask.
291 void RelocInfo::apply(intptr_t delta, ICacheFlushMode icache_flush_mode) {
292 bool flush_icache = icache_flush_mode != SKIP_ICACHE_FLUSH;
293 if (IsInternalReference(rmode_)) {
294 // absolute code pointer inside code object moves with the code object.
295 Memory::Address_at(pc_) += delta;
296 if (flush_icache) CpuFeatures::FlushICache(pc_, sizeof(Address));
297 } else if (IsCodeTarget(rmode_) || IsRuntimeEntry(rmode_)) {
298 Memory::int32_at(pc_) -= static_cast<int32_t>(delta);
299 if (flush_icache) CpuFeatures::FlushICache(pc_, sizeof(int32_t));
300 } else if (rmode_ == CODE_AGE_SEQUENCE) {
301 if (*pc_ == kCallOpcode) {
302 int32_t* p = reinterpret_cast<int32_t*>(pc_ + 1);
303 *p -= static_cast<int32_t>(delta); // Relocate entry.
304 if (flush_icache) CpuFeatures::FlushICache(p, sizeof(uint32_t));
310 Address RelocInfo::target_address() {
311 DCHECK(IsCodeTarget(rmode_) || IsRuntimeEntry(rmode_));
312 return Assembler::target_address_at(pc_, host_);
316 Address RelocInfo::target_address_address() {
317 DCHECK(IsCodeTarget(rmode_) || IsRuntimeEntry(rmode_)
318 || rmode_ == EMBEDDED_OBJECT
319 || rmode_ == EXTERNAL_REFERENCE);
320 return reinterpret_cast<Address>(pc_);
324 Address RelocInfo::constant_pool_entry_address() {
330 int RelocInfo::target_address_size() {
331 if (IsCodedSpecially()) {
332 return Assembler::kSpecialTargetSize;
339 void RelocInfo::set_target_address(Address target,
340 WriteBarrierMode write_barrier_mode,
341 ICacheFlushMode icache_flush_mode) {
342 DCHECK(IsCodeTarget(rmode_) || IsRuntimeEntry(rmode_));
343 Assembler::set_target_address_at(pc_, host_, target, icache_flush_mode);
344 if (write_barrier_mode == UPDATE_WRITE_BARRIER && host() != NULL &&
345 IsCodeTarget(rmode_)) {
346 Object* target_code = Code::GetCodeFromTargetAddress(target);
347 host()->GetHeap()->incremental_marking()->RecordWriteIntoCode(
348 host(), this, HeapObject::cast(target_code));
353 Object* RelocInfo::target_object() {
354 DCHECK(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT);
355 return Memory::Object_at(pc_);
359 Handle<Object> RelocInfo::target_object_handle(Assembler* origin) {
360 DCHECK(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT);
361 if (rmode_ == EMBEDDED_OBJECT) {
362 return Memory::Object_Handle_at(pc_);
364 return origin->code_target_object_handle_at(pc_);
369 Address RelocInfo::target_reference() {
370 DCHECK(rmode_ == RelocInfo::EXTERNAL_REFERENCE);
371 return Memory::Address_at(pc_);
375 void RelocInfo::set_target_object(Object* target,
376 WriteBarrierMode write_barrier_mode,
377 ICacheFlushMode icache_flush_mode) {
378 DCHECK(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT);
379 Memory::Object_at(pc_) = target;
380 if (icache_flush_mode != SKIP_ICACHE_FLUSH) {
381 CpuFeatures::FlushICache(pc_, sizeof(Address));
383 if (write_barrier_mode == UPDATE_WRITE_BARRIER &&
385 target->IsHeapObject()) {
386 host()->GetHeap()->incremental_marking()->RecordWrite(
387 host(), &Memory::Object_at(pc_), HeapObject::cast(target));
392 Address RelocInfo::target_runtime_entry(Assembler* origin) {
393 DCHECK(IsRuntimeEntry(rmode_));
394 return origin->runtime_entry_at(pc_);
398 void RelocInfo::set_target_runtime_entry(Address target,
399 WriteBarrierMode write_barrier_mode,
400 ICacheFlushMode icache_flush_mode) {
401 DCHECK(IsRuntimeEntry(rmode_));
402 if (target_address() != target) {
403 set_target_address(target, write_barrier_mode, icache_flush_mode);
408 Handle<Cell> RelocInfo::target_cell_handle() {
409 DCHECK(rmode_ == RelocInfo::CELL);
410 Address address = Memory::Address_at(pc_);
411 return Handle<Cell>(reinterpret_cast<Cell**>(address));
415 Cell* RelocInfo::target_cell() {
416 DCHECK(rmode_ == RelocInfo::CELL);
417 return Cell::FromValueAddress(Memory::Address_at(pc_));
421 void RelocInfo::set_target_cell(Cell* cell,
422 WriteBarrierMode write_barrier_mode,
423 ICacheFlushMode icache_flush_mode) {
424 DCHECK(rmode_ == RelocInfo::CELL);
425 Address address = cell->address() + Cell::kValueOffset;
426 Memory::Address_at(pc_) = address;
427 if (icache_flush_mode != SKIP_ICACHE_FLUSH) {
428 CpuFeatures::FlushICache(pc_, sizeof(Address));
430 if (write_barrier_mode == UPDATE_WRITE_BARRIER &&
432 // TODO(1550) We are passing NULL as a slot because cell can never be on
433 // evacuation candidate.
434 host()->GetHeap()->incremental_marking()->RecordWrite(
440 void RelocInfo::WipeOut() {
441 if (IsEmbeddedObject(rmode_) || IsExternalReference(rmode_)) {
442 Memory::Address_at(pc_) = NULL;
443 } else if (IsCodeTarget(rmode_) || IsRuntimeEntry(rmode_)) {
444 // Effectively write zero into the relocation.
445 Assembler::set_target_address_at(pc_, host_, pc_ + sizeof(int32_t));
452 bool RelocInfo::IsPatchedReturnSequence() {
453 // The recognized call sequence is:
454 // movq(kScratchRegister, address); call(kScratchRegister);
455 // It only needs to be distinguished from a return sequence
456 // movq(rsp, rbp); pop(rbp); ret(n); int3 *6
457 // The 11th byte is int3 (0xCC) in the return sequence and
458 // REX.WB (0x48+register bit) for the call sequence.
459 return pc_[Assembler::kMoveAddressIntoScratchRegisterInstructionLength] !=
464 bool RelocInfo::IsPatchedDebugBreakSlotSequence() {
465 return !Assembler::IsNop(pc());
469 Handle<Object> RelocInfo::code_age_stub_handle(Assembler* origin) {
470 DCHECK(rmode_ == RelocInfo::CODE_AGE_SEQUENCE);
471 DCHECK(*pc_ == kCallOpcode);
472 return origin->code_target_object_handle_at(pc_ + 1);
476 Code* RelocInfo::code_age_stub() {
477 DCHECK(rmode_ == RelocInfo::CODE_AGE_SEQUENCE);
478 DCHECK(*pc_ == kCallOpcode);
479 return Code::GetCodeFromTargetAddress(
480 Assembler::target_address_at(pc_ + 1, host_));
484 void RelocInfo::set_code_age_stub(Code* stub,
485 ICacheFlushMode icache_flush_mode) {
486 DCHECK(*pc_ == kCallOpcode);
487 DCHECK(rmode_ == RelocInfo::CODE_AGE_SEQUENCE);
488 Assembler::set_target_address_at(pc_ + 1, host_, stub->instruction_start(),
493 Address RelocInfo::call_address() {
494 DCHECK((IsJSReturn(rmode()) && IsPatchedReturnSequence()) ||
495 (IsDebugBreakSlot(rmode()) && IsPatchedDebugBreakSlotSequence()));
496 return Memory::Address_at(
497 pc_ + Assembler::kRealPatchReturnSequenceAddressOffset);
501 void RelocInfo::set_call_address(Address target) {
502 DCHECK((IsJSReturn(rmode()) && IsPatchedReturnSequence()) ||
503 (IsDebugBreakSlot(rmode()) && IsPatchedDebugBreakSlotSequence()));
504 Memory::Address_at(pc_ + Assembler::kRealPatchReturnSequenceAddressOffset) =
506 CpuFeatures::FlushICache(
507 pc_ + Assembler::kRealPatchReturnSequenceAddressOffset, sizeof(Address));
508 if (host() != NULL) {
509 Object* target_code = Code::GetCodeFromTargetAddress(target);
510 host()->GetHeap()->incremental_marking()->RecordWriteIntoCode(
511 host(), this, HeapObject::cast(target_code));
516 Object* RelocInfo::call_object() {
517 return *call_object_address();
521 void RelocInfo::set_call_object(Object* target) {
522 *call_object_address() = target;
526 Object** RelocInfo::call_object_address() {
527 DCHECK((IsJSReturn(rmode()) && IsPatchedReturnSequence()) ||
528 (IsDebugBreakSlot(rmode()) && IsPatchedDebugBreakSlotSequence()));
529 return reinterpret_cast<Object**>(
530 pc_ + Assembler::kPatchReturnSequenceAddressOffset);
534 void RelocInfo::Visit(Isolate* isolate, ObjectVisitor* visitor) {
535 RelocInfo::Mode mode = rmode();
536 if (mode == RelocInfo::EMBEDDED_OBJECT) {
537 visitor->VisitEmbeddedPointer(this);
538 CpuFeatures::FlushICache(pc_, sizeof(Address));
539 } else if (RelocInfo::IsCodeTarget(mode)) {
540 visitor->VisitCodeTarget(this);
541 } else if (mode == RelocInfo::CELL) {
542 visitor->VisitCell(this);
543 } else if (mode == RelocInfo::EXTERNAL_REFERENCE) {
544 visitor->VisitExternalReference(this);
545 CpuFeatures::FlushICache(pc_, sizeof(Address));
546 } else if (RelocInfo::IsCodeAgeSequence(mode)) {
547 visitor->VisitCodeAgeSequence(this);
548 } else if (((RelocInfo::IsJSReturn(mode) &&
549 IsPatchedReturnSequence()) ||
550 (RelocInfo::IsDebugBreakSlot(mode) &&
551 IsPatchedDebugBreakSlotSequence())) &&
552 isolate->debug()->has_break_points()) {
553 visitor->VisitDebugTarget(this);
554 } else if (RelocInfo::IsRuntimeEntry(mode)) {
555 visitor->VisitRuntimeEntry(this);
560 template<typename StaticVisitor>
561 void RelocInfo::Visit(Heap* heap) {
562 RelocInfo::Mode mode = rmode();
563 if (mode == RelocInfo::EMBEDDED_OBJECT) {
564 StaticVisitor::VisitEmbeddedPointer(heap, this);
565 CpuFeatures::FlushICache(pc_, sizeof(Address));
566 } else if (RelocInfo::IsCodeTarget(mode)) {
567 StaticVisitor::VisitCodeTarget(heap, this);
568 } else if (mode == RelocInfo::CELL) {
569 StaticVisitor::VisitCell(heap, this);
570 } else if (mode == RelocInfo::EXTERNAL_REFERENCE) {
571 StaticVisitor::VisitExternalReference(this);
572 CpuFeatures::FlushICache(pc_, sizeof(Address));
573 } else if (RelocInfo::IsCodeAgeSequence(mode)) {
574 StaticVisitor::VisitCodeAgeSequence(heap, this);
575 } else if (heap->isolate()->debug()->has_break_points() &&
576 ((RelocInfo::IsJSReturn(mode) &&
577 IsPatchedReturnSequence()) ||
578 (RelocInfo::IsDebugBreakSlot(mode) &&
579 IsPatchedDebugBreakSlotSequence()))) {
580 StaticVisitor::VisitDebugTarget(heap, this);
581 } else if (RelocInfo::IsRuntimeEntry(mode)) {
582 StaticVisitor::VisitRuntimeEntry(this);
587 // -----------------------------------------------------------------------------
588 // Implementation of Operand
590 void Operand::set_modrm(int mod, Register rm_reg) {
591 DCHECK(is_uint2(mod));
592 buf_[0] = mod << 6 | rm_reg.low_bits();
593 // Set REX.B to the high bit of rm.code().
594 rex_ |= rm_reg.high_bit();
598 void Operand::set_sib(ScaleFactor scale, Register index, Register base) {
600 DCHECK(is_uint2(scale));
601 // Use SIB with no index register only for base rsp or r12. Otherwise we
602 // would skip the SIB byte entirely.
603 DCHECK(!index.is(rsp) || base.is(rsp) || base.is(r12));
604 buf_[1] = (scale << 6) | (index.low_bits() << 3) | base.low_bits();
605 rex_ |= index.high_bit() << 1 | base.high_bit();
609 void Operand::set_disp8(int disp) {
610 DCHECK(is_int8(disp));
611 DCHECK(len_ == 1 || len_ == 2);
612 int8_t* p = reinterpret_cast<int8_t*>(&buf_[len_]);
614 len_ += sizeof(int8_t);
617 void Operand::set_disp32(int disp) {
618 DCHECK(len_ == 1 || len_ == 2);
619 int32_t* p = reinterpret_cast<int32_t*>(&buf_[len_]);
621 len_ += sizeof(int32_t);
624 void Operand::set_disp64(int64_t disp) {
626 int64_t* p = reinterpret_cast<int64_t*>(&buf_[len_]);
628 len_ += sizeof(disp);
630 } } // namespace v8::internal
632 #endif // V8_X64_ASSEMBLER_X64_INL_H_