1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file.
11 #if V8_TARGET_ARCH_PPC
13 #include "src/assembler.h"
14 #include "src/base/bits.h"
15 #include "src/codegen.h"
16 #include "src/disasm.h"
17 #include "src/ppc/constants-ppc.h"
18 #include "src/ppc/frames-ppc.h"
19 #include "src/ppc/simulator-ppc.h"
21 #if defined(USE_SIMULATOR)
23 // Only build the simulator if not compiling for real PPC hardware.
27 // This macro provides a platform independent use of sscanf. The reason for
28 // SScanF not being implemented in a platform independent way through
29 // ::v8::internal::OS in the same way as SNPrintF is that the
30 // Windows C Run-Time Library does not provide vsscanf.
31 #define SScanF sscanf // NOLINT
33 // The PPCDebugger class is used by the simulator while debugging simulated
37 explicit PPCDebugger(Simulator* sim) : sim_(sim) {}
40 void Stop(Instruction* instr);
44 static const Instr kBreakpointInstr = (TWI | 0x1f * B21);
45 static const Instr kNopInstr = (ORI); // ori, 0,0,0
49 intptr_t GetRegisterValue(int regnum);
50 double GetRegisterPairDoubleValue(int regnum);
51 double GetFPDoubleRegisterValue(int regnum);
52 bool GetValue(const char* desc, intptr_t* value);
53 bool GetFPDoubleValue(const char* desc, double* value);
55 // Set or delete a breakpoint. Returns true if successful.
56 bool SetBreakpoint(Instruction* break_pc);
57 bool DeleteBreakpoint(Instruction* break_pc);
59 // Undo and redo all breakpoints. This is needed to bracket disassembly and
60 // execution to skip past breakpoints when run from the debugger.
61 void UndoBreakpoints();
62 void RedoBreakpoints();
66 PPCDebugger::~PPCDebugger() {}
69 #ifdef GENERATED_CODE_COVERAGE
70 static FILE* coverage_log = NULL;
73 static void InitializeCoverage() {
74 char* file_name = getenv("V8_GENERATED_CODE_COVERAGE_LOG");
75 if (file_name != NULL) {
76 coverage_log = fopen(file_name, "aw+");
81 void PPCDebugger::Stop(Instruction* instr) {
83 uint32_t code = instr->SvcValue() & kStopCodeMask;
84 // Retrieve the encoded address, which comes just after this stop.
86 reinterpret_cast<char**>(sim_->get_pc() + Instruction::kInstrSize);
87 char* msg = *msg_address;
90 // Update this stop description.
91 if (isWatchedStop(code) && !watched_stops_[code].desc) {
92 watched_stops_[code].desc = msg;
95 if (strlen(msg) > 0) {
96 if (coverage_log != NULL) {
97 fprintf(coverage_log, "%s\n", msg);
100 // Overwrite the instruction and address with nops.
101 instr->SetInstructionBits(kNopInstr);
102 reinterpret_cast<Instruction*>(msg_address)->SetInstructionBits(kNopInstr);
104 sim_->set_pc(sim_->get_pc() + Instruction::kInstrSize + kPointerSize);
107 #else // ndef GENERATED_CODE_COVERAGE
109 static void InitializeCoverage() {}
112 void PPCDebugger::Stop(Instruction* instr) {
113 // Get the stop code.
114 // use of kStopCodeMask not right on PowerPC
115 uint32_t code = instr->SvcValue() & kStopCodeMask;
116 // Retrieve the encoded address, which comes just after this stop.
118 *reinterpret_cast<char**>(sim_->get_pc() + Instruction::kInstrSize);
119 // Update this stop description.
120 if (sim_->isWatchedStop(code) && !sim_->watched_stops_[code].desc) {
121 sim_->watched_stops_[code].desc = msg;
123 // Print the stop message and code if it is not the default code.
124 if (code != kMaxStopCode) {
125 PrintF("Simulator hit stop %u: %s\n", code, msg);
127 PrintF("Simulator hit %s\n", msg);
129 sim_->set_pc(sim_->get_pc() + Instruction::kInstrSize + kPointerSize);
135 intptr_t PPCDebugger::GetRegisterValue(int regnum) {
136 return sim_->get_register(regnum);
140 double PPCDebugger::GetRegisterPairDoubleValue(int regnum) {
141 return sim_->get_double_from_register_pair(regnum);
145 double PPCDebugger::GetFPDoubleRegisterValue(int regnum) {
146 return sim_->get_double_from_d_register(regnum);
150 bool PPCDebugger::GetValue(const char* desc, intptr_t* value) {
151 int regnum = Registers::Number(desc);
152 if (regnum != kNoRegister) {
153 *value = GetRegisterValue(regnum);
156 if (strncmp(desc, "0x", 2) == 0) {
157 return SScanF(desc + 2, "%" V8PRIxPTR,
158 reinterpret_cast<uintptr_t*>(value)) == 1;
160 return SScanF(desc, "%" V8PRIuPTR, reinterpret_cast<uintptr_t*>(value)) ==
168 bool PPCDebugger::GetFPDoubleValue(const char* desc, double* value) {
169 int regnum = FPRegisters::Number(desc);
170 if (regnum != kNoRegister) {
171 *value = sim_->get_double_from_d_register(regnum);
178 bool PPCDebugger::SetBreakpoint(Instruction* break_pc) {
179 // Check if a breakpoint can be set. If not return without any side-effects.
180 if (sim_->break_pc_ != NULL) {
184 // Set the breakpoint.
185 sim_->break_pc_ = break_pc;
186 sim_->break_instr_ = break_pc->InstructionBits();
187 // Not setting the breakpoint instruction in the code itself. It will be set
188 // when the debugger shell continues.
193 bool PPCDebugger::DeleteBreakpoint(Instruction* break_pc) {
194 if (sim_->break_pc_ != NULL) {
195 sim_->break_pc_->SetInstructionBits(sim_->break_instr_);
198 sim_->break_pc_ = NULL;
199 sim_->break_instr_ = 0;
204 void PPCDebugger::UndoBreakpoints() {
205 if (sim_->break_pc_ != NULL) {
206 sim_->break_pc_->SetInstructionBits(sim_->break_instr_);
211 void PPCDebugger::RedoBreakpoints() {
212 if (sim_->break_pc_ != NULL) {
213 sim_->break_pc_->SetInstructionBits(kBreakpointInstr);
218 void PPCDebugger::Debug() {
219 intptr_t last_pc = -1;
222 #define COMMAND_SIZE 63
226 #define XSTR(a) STR(a)
228 char cmd[COMMAND_SIZE + 1];
229 char arg1[ARG_SIZE + 1];
230 char arg2[ARG_SIZE + 1];
231 char* argv[3] = {cmd, arg1, arg2};
233 // make sure to have a proper terminating character if reaching the limit
234 cmd[COMMAND_SIZE] = 0;
238 // Undo all set breakpoints while running in the debugger shell. This will
239 // make them invisible to all commands.
241 // Disable tracing while simulating
242 bool trace = ::v8::internal::FLAG_trace_sim;
243 ::v8::internal::FLAG_trace_sim = false;
245 while (!done && !sim_->has_bad_pc()) {
246 if (last_pc != sim_->get_pc()) {
247 disasm::NameConverter converter;
248 disasm::Disassembler dasm(converter);
249 // use a reasonably large buffer
250 v8::internal::EmbeddedVector<char, 256> buffer;
251 dasm.InstructionDecode(buffer, reinterpret_cast<byte*>(sim_->get_pc()));
252 PrintF(" 0x%08" V8PRIxPTR " %s\n", sim_->get_pc(), buffer.start());
253 last_pc = sim_->get_pc();
255 char* line = ReadLine("sim> ");
259 char* last_input = sim_->last_debugger_input();
260 if (strcmp(line, "\n") == 0 && last_input != NULL) {
263 // Ownership is transferred to sim_;
264 sim_->set_last_debugger_input(line);
266 // Use sscanf to parse the individual parts of the command line. At the
267 // moment no command expects more than two parameters.
268 int argc = SScanF(line,
269 "%" XSTR(COMMAND_SIZE) "s "
270 "%" XSTR(ARG_SIZE) "s "
271 "%" XSTR(ARG_SIZE) "s",
273 if ((strcmp(cmd, "si") == 0) || (strcmp(cmd, "stepi") == 0)) {
276 // If at a breakpoint, proceed past it.
277 if ((reinterpret_cast<Instruction*>(sim_->get_pc()))
278 ->InstructionBits() == 0x7d821008) {
279 sim_->set_pc(sim_->get_pc() + Instruction::kInstrSize);
281 sim_->ExecuteInstruction(
282 reinterpret_cast<Instruction*>(sim_->get_pc()));
285 if (argc == 2 && last_pc != sim_->get_pc() && GetValue(arg1, &value)) {
286 for (int i = 1; i < value; i++) {
287 disasm::NameConverter converter;
288 disasm::Disassembler dasm(converter);
289 // use a reasonably large buffer
290 v8::internal::EmbeddedVector<char, 256> buffer;
291 dasm.InstructionDecode(buffer,
292 reinterpret_cast<byte*>(sim_->get_pc()));
293 PrintF(" 0x%08" V8PRIxPTR " %s\n", sim_->get_pc(),
295 sim_->ExecuteInstruction(
296 reinterpret_cast<Instruction*>(sim_->get_pc()));
299 } else if ((strcmp(cmd, "c") == 0) || (strcmp(cmd, "cont") == 0)) {
300 // If at a breakpoint, proceed past it.
301 if ((reinterpret_cast<Instruction*>(sim_->get_pc()))
302 ->InstructionBits() == 0x7d821008) {
303 sim_->set_pc(sim_->get_pc() + Instruction::kInstrSize);
305 // Execute the one instruction we broke at with breakpoints disabled.
306 sim_->ExecuteInstruction(
307 reinterpret_cast<Instruction*>(sim_->get_pc()));
309 // Leave the debugger shell.
311 } else if ((strcmp(cmd, "p") == 0) || (strcmp(cmd, "print") == 0)) {
312 if (argc == 2 || (argc == 3 && strcmp(arg2, "fp") == 0)) {
315 if (strcmp(arg1, "all") == 0) {
316 for (int i = 0; i < kNumRegisters; i++) {
317 value = GetRegisterValue(i);
318 PrintF(" %3s: %08" V8PRIxPTR, Registers::Name(i), value);
319 if ((argc == 3 && strcmp(arg2, "fp") == 0) && i < 8 &&
321 dvalue = GetRegisterPairDoubleValue(i);
322 PrintF(" (%f)\n", dvalue);
323 } else if (i != 0 && !((i + 1) & 3)) {
327 PrintF(" pc: %08" V8PRIxPTR " lr: %08" V8PRIxPTR
329 "ctr: %08" V8PRIxPTR " xer: %08x cr: %08x\n",
330 sim_->special_reg_pc_, sim_->special_reg_lr_,
331 sim_->special_reg_ctr_, sim_->special_reg_xer_,
332 sim_->condition_reg_);
333 } else if (strcmp(arg1, "alld") == 0) {
334 for (int i = 0; i < kNumRegisters; i++) {
335 value = GetRegisterValue(i);
336 PrintF(" %3s: %08" V8PRIxPTR " %11" V8PRIdPTR,
337 Registers::Name(i), value, value);
338 if ((argc == 3 && strcmp(arg2, "fp") == 0) && i < 8 &&
340 dvalue = GetRegisterPairDoubleValue(i);
341 PrintF(" (%f)\n", dvalue);
342 } else if (!((i + 1) % 2)) {
346 PrintF(" pc: %08" V8PRIxPTR " lr: %08" V8PRIxPTR
348 "ctr: %08" V8PRIxPTR " xer: %08x cr: %08x\n",
349 sim_->special_reg_pc_, sim_->special_reg_lr_,
350 sim_->special_reg_ctr_, sim_->special_reg_xer_,
351 sim_->condition_reg_);
352 } else if (strcmp(arg1, "allf") == 0) {
353 for (int i = 0; i < DoubleRegister::kNumRegisters; i++) {
354 dvalue = GetFPDoubleRegisterValue(i);
355 uint64_t as_words = bit_cast<uint64_t>(dvalue);
356 PrintF("%3s: %f 0x%08x %08x\n", FPRegisters::Name(i), dvalue,
357 static_cast<uint32_t>(as_words >> 32),
358 static_cast<uint32_t>(as_words & 0xffffffff));
360 } else if (arg1[0] == 'r' &&
361 (arg1[1] >= '0' && arg1[1] <= '9' &&
362 (arg1[2] == '\0' || (arg1[2] >= '0' && arg1[2] <= '9' &&
363 arg1[3] == '\0')))) {
364 int regnum = strtoul(&arg1[1], 0, 10);
365 if (regnum != kNoRegister) {
366 value = GetRegisterValue(regnum);
367 PrintF("%s: 0x%08" V8PRIxPTR " %" V8PRIdPTR "\n", arg1, value,
370 PrintF("%s unrecognized\n", arg1);
373 if (GetValue(arg1, &value)) {
374 PrintF("%s: 0x%08" V8PRIxPTR " %" V8PRIdPTR "\n", arg1, value,
376 } else if (GetFPDoubleValue(arg1, &dvalue)) {
377 uint64_t as_words = bit_cast<uint64_t>(dvalue);
378 PrintF("%s: %f 0x%08x %08x\n", arg1, dvalue,
379 static_cast<uint32_t>(as_words >> 32),
380 static_cast<uint32_t>(as_words & 0xffffffff));
382 PrintF("%s unrecognized\n", arg1);
386 PrintF("print <register>\n");
388 } else if ((strcmp(cmd, "po") == 0) ||
389 (strcmp(cmd, "printobject") == 0)) {
393 if (GetValue(arg1, &value)) {
394 Object* obj = reinterpret_cast<Object*>(value);
395 os << arg1 << ": \n";
400 os << Brief(obj) << "\n";
403 os << arg1 << " unrecognized\n";
406 PrintF("printobject <value>\n");
408 } else if (strcmp(cmd, "setpc") == 0) {
411 if (!GetValue(arg1, &value)) {
412 PrintF("%s unrecognized\n", arg1);
416 } else if (strcmp(cmd, "stack") == 0 || strcmp(cmd, "mem") == 0) {
417 intptr_t* cur = NULL;
418 intptr_t* end = NULL;
421 if (strcmp(cmd, "stack") == 0) {
422 cur = reinterpret_cast<intptr_t*>(sim_->get_register(Simulator::sp));
425 if (!GetValue(arg1, &value)) {
426 PrintF("%s unrecognized\n", arg1);
429 cur = reinterpret_cast<intptr_t*>(value);
433 intptr_t words; // likely inaccurate variable name for 64bit
434 if (argc == next_arg) {
437 if (!GetValue(argv[next_arg], &words)) {
444 PrintF(" 0x%08" V8PRIxPTR ": 0x%08" V8PRIxPTR " %10" V8PRIdPTR,
445 reinterpret_cast<intptr_t>(cur), *cur, *cur);
446 HeapObject* obj = reinterpret_cast<HeapObject*>(*cur);
447 intptr_t value = *cur;
448 Heap* current_heap = v8::internal::Isolate::Current()->heap();
449 if (((value & 1) == 0) || current_heap->Contains(obj)) {
451 if ((value & 1) == 0) {
452 PrintF("smi %d", PlatformSmiTagging::SmiToInt(obj));
461 } else if (strcmp(cmd, "disasm") == 0 || strcmp(cmd, "di") == 0) {
462 disasm::NameConverter converter;
463 disasm::Disassembler dasm(converter);
464 // use a reasonably large buffer
465 v8::internal::EmbeddedVector<char, 256> buffer;
472 cur = reinterpret_cast<byte*>(sim_->get_pc());
473 end = cur + (10 * Instruction::kInstrSize);
474 } else if (argc == 2) {
475 int regnum = Registers::Number(arg1);
476 if (regnum != kNoRegister || strncmp(arg1, "0x", 2) == 0) {
477 // The argument is an address or a register name.
479 if (GetValue(arg1, &value)) {
480 cur = reinterpret_cast<byte*>(value);
481 // Disassemble 10 instructions at <arg1>.
482 end = cur + (10 * Instruction::kInstrSize);
485 // The argument is the number of instructions.
487 if (GetValue(arg1, &value)) {
488 cur = reinterpret_cast<byte*>(sim_->get_pc());
489 // Disassemble <arg1> instructions.
490 end = cur + (value * Instruction::kInstrSize);
496 if (GetValue(arg1, &value1) && GetValue(arg2, &value2)) {
497 cur = reinterpret_cast<byte*>(value1);
498 end = cur + (value2 * Instruction::kInstrSize);
504 cur += dasm.InstructionDecode(buffer, cur);
505 PrintF(" 0x%08" V8PRIxPTR " %s\n", reinterpret_cast<intptr_t>(prev),
508 } else if (strcmp(cmd, "gdb") == 0) {
509 PrintF("relinquishing control to gdb\n");
510 v8::base::OS::DebugBreak();
511 PrintF("regaining control from gdb\n");
512 } else if (strcmp(cmd, "break") == 0) {
515 if (GetValue(arg1, &value)) {
516 if (!SetBreakpoint(reinterpret_cast<Instruction*>(value))) {
517 PrintF("setting breakpoint failed\n");
520 PrintF("%s unrecognized\n", arg1);
523 PrintF("break <address>\n");
525 } else if (strcmp(cmd, "del") == 0) {
526 if (!DeleteBreakpoint(NULL)) {
527 PrintF("deleting breakpoint failed\n");
529 } else if (strcmp(cmd, "cr") == 0) {
530 PrintF("Condition reg: %08x\n", sim_->condition_reg_);
531 } else if (strcmp(cmd, "lr") == 0) {
532 PrintF("Link reg: %08" V8PRIxPTR "\n", sim_->special_reg_lr_);
533 } else if (strcmp(cmd, "ctr") == 0) {
534 PrintF("Ctr reg: %08" V8PRIxPTR "\n", sim_->special_reg_ctr_);
535 } else if (strcmp(cmd, "xer") == 0) {
536 PrintF("XER: %08x\n", sim_->special_reg_xer_);
537 } else if (strcmp(cmd, "fpscr") == 0) {
538 PrintF("FPSCR: %08x\n", sim_->fp_condition_reg_);
539 } else if (strcmp(cmd, "stop") == 0) {
542 sim_->get_pc() - (Instruction::kInstrSize + kPointerSize);
543 Instruction* stop_instr = reinterpret_cast<Instruction*>(stop_pc);
544 Instruction* msg_address =
545 reinterpret_cast<Instruction*>(stop_pc + Instruction::kInstrSize);
546 if ((argc == 2) && (strcmp(arg1, "unstop") == 0)) {
547 // Remove the current stop.
548 if (sim_->isStopInstruction(stop_instr)) {
549 stop_instr->SetInstructionBits(kNopInstr);
550 msg_address->SetInstructionBits(kNopInstr);
552 PrintF("Not at debugger stop.\n");
554 } else if (argc == 3) {
555 // Print information about all/the specified breakpoint(s).
556 if (strcmp(arg1, "info") == 0) {
557 if (strcmp(arg2, "all") == 0) {
558 PrintF("Stop information:\n");
559 for (uint32_t i = 0; i < sim_->kNumOfWatchedStops; i++) {
560 sim_->PrintStopInfo(i);
562 } else if (GetValue(arg2, &value)) {
563 sim_->PrintStopInfo(value);
565 PrintF("Unrecognized argument.\n");
567 } else if (strcmp(arg1, "enable") == 0) {
568 // Enable all/the specified breakpoint(s).
569 if (strcmp(arg2, "all") == 0) {
570 for (uint32_t i = 0; i < sim_->kNumOfWatchedStops; i++) {
573 } else if (GetValue(arg2, &value)) {
574 sim_->EnableStop(value);
576 PrintF("Unrecognized argument.\n");
578 } else if (strcmp(arg1, "disable") == 0) {
579 // Disable all/the specified breakpoint(s).
580 if (strcmp(arg2, "all") == 0) {
581 for (uint32_t i = 0; i < sim_->kNumOfWatchedStops; i++) {
582 sim_->DisableStop(i);
584 } else if (GetValue(arg2, &value)) {
585 sim_->DisableStop(value);
587 PrintF("Unrecognized argument.\n");
591 PrintF("Wrong usage. Use help command for more information.\n");
593 } else if ((strcmp(cmd, "t") == 0) || strcmp(cmd, "trace") == 0) {
594 ::v8::internal::FLAG_trace_sim = !::v8::internal::FLAG_trace_sim;
595 PrintF("Trace of executed instructions is %s\n",
596 ::v8::internal::FLAG_trace_sim ? "on" : "off");
597 } else if ((strcmp(cmd, "h") == 0) || (strcmp(cmd, "help") == 0)) {
599 PrintF(" continue execution (alias 'c')\n");
600 PrintF("stepi [num instructions]\n");
601 PrintF(" step one/num instruction(s) (alias 'si')\n");
602 PrintF("print <register>\n");
603 PrintF(" print register content (alias 'p')\n");
604 PrintF(" use register name 'all' to display all integer registers\n");
606 " use register name 'alld' to display integer registers "
607 "with decimal values\n");
608 PrintF(" use register name 'rN' to display register number 'N'\n");
609 PrintF(" add argument 'fp' to print register pair double values\n");
611 " use register name 'allf' to display floating-point "
613 PrintF("printobject <register>\n");
614 PrintF(" print an object from a register (alias 'po')\n");
616 PrintF(" print condition register\n");
618 PrintF(" print link register\n");
620 PrintF(" print ctr register\n");
622 PrintF(" print XER\n");
624 PrintF(" print FPSCR\n");
625 PrintF("stack [<num words>]\n");
626 PrintF(" dump stack content, default dump 10 words)\n");
627 PrintF("mem <address> [<num words>]\n");
628 PrintF(" dump memory content, default dump 10 words)\n");
629 PrintF("disasm [<instructions>]\n");
630 PrintF("disasm [<address/register>]\n");
631 PrintF("disasm [[<address/register>] <instructions>]\n");
632 PrintF(" disassemble code, default is 10 instructions\n");
633 PrintF(" from pc (alias 'di')\n");
635 PrintF(" enter gdb\n");
636 PrintF("break <address>\n");
637 PrintF(" set a break point on the address\n");
639 PrintF(" delete the breakpoint\n");
640 PrintF("trace (alias 't')\n");
641 PrintF(" toogle the tracing of all executed statements\n");
642 PrintF("stop feature:\n");
643 PrintF(" Description:\n");
644 PrintF(" Stops are debug instructions inserted by\n");
645 PrintF(" the Assembler::stop() function.\n");
646 PrintF(" When hitting a stop, the Simulator will\n");
647 PrintF(" stop and and give control to the PPCDebugger.\n");
648 PrintF(" The first %d stop codes are watched:\n",
649 Simulator::kNumOfWatchedStops);
650 PrintF(" - They can be enabled / disabled: the Simulator\n");
651 PrintF(" will / won't stop when hitting them.\n");
652 PrintF(" - The Simulator keeps track of how many times they \n");
653 PrintF(" are met. (See the info command.) Going over a\n");
654 PrintF(" disabled stop still increases its counter. \n");
655 PrintF(" Commands:\n");
656 PrintF(" stop info all/<code> : print infos about number <code>\n");
657 PrintF(" or all stop(s).\n");
658 PrintF(" stop enable/disable all/<code> : enables / disables\n");
659 PrintF(" all or number <code> stop(s)\n");
660 PrintF(" stop unstop\n");
661 PrintF(" ignore the stop instruction at the current location\n");
662 PrintF(" from now on\n");
664 PrintF("Unknown command: %s\n", cmd);
669 // Add all the breakpoints back to stop execution and enter the debugger
673 ::v8::internal::FLAG_trace_sim = trace;
683 static bool ICacheMatch(void* one, void* two) {
684 DCHECK((reinterpret_cast<intptr_t>(one) & CachePage::kPageMask) == 0);
685 DCHECK((reinterpret_cast<intptr_t>(two) & CachePage::kPageMask) == 0);
690 static uint32_t ICacheHash(void* key) {
691 return static_cast<uint32_t>(reinterpret_cast<uintptr_t>(key)) >> 2;
695 static bool AllOnOnePage(uintptr_t start, int size) {
696 intptr_t start_page = (start & ~CachePage::kPageMask);
697 intptr_t end_page = ((start + size) & ~CachePage::kPageMask);
698 return start_page == end_page;
702 void Simulator::set_last_debugger_input(char* input) {
703 DeleteArray(last_debugger_input_);
704 last_debugger_input_ = input;
708 void Simulator::FlushICache(v8::internal::HashMap* i_cache, void* start_addr,
710 intptr_t start = reinterpret_cast<intptr_t>(start_addr);
711 int intra_line = (start & CachePage::kLineMask);
714 size = ((size - 1) | CachePage::kLineMask) + 1;
715 int offset = (start & CachePage::kPageMask);
716 while (!AllOnOnePage(start, size - 1)) {
717 int bytes_to_flush = CachePage::kPageSize - offset;
718 FlushOnePage(i_cache, start, bytes_to_flush);
719 start += bytes_to_flush;
720 size -= bytes_to_flush;
721 DCHECK_EQ(0, static_cast<int>(start & CachePage::kPageMask));
725 FlushOnePage(i_cache, start, size);
730 CachePage* Simulator::GetCachePage(v8::internal::HashMap* i_cache, void* page) {
731 v8::internal::HashMap::Entry* entry =
732 i_cache->Lookup(page, ICacheHash(page), true);
733 if (entry->value == NULL) {
734 CachePage* new_page = new CachePage();
735 entry->value = new_page;
737 return reinterpret_cast<CachePage*>(entry->value);
741 // Flush from start up to and not including start + size.
742 void Simulator::FlushOnePage(v8::internal::HashMap* i_cache, intptr_t start,
744 DCHECK(size <= CachePage::kPageSize);
745 DCHECK(AllOnOnePage(start, size - 1));
746 DCHECK((start & CachePage::kLineMask) == 0);
747 DCHECK((size & CachePage::kLineMask) == 0);
748 void* page = reinterpret_cast<void*>(start & (~CachePage::kPageMask));
749 int offset = (start & CachePage::kPageMask);
750 CachePage* cache_page = GetCachePage(i_cache, page);
751 char* valid_bytemap = cache_page->ValidityByte(offset);
752 memset(valid_bytemap, CachePage::LINE_INVALID, size >> CachePage::kLineShift);
756 void Simulator::CheckICache(v8::internal::HashMap* i_cache,
757 Instruction* instr) {
758 intptr_t address = reinterpret_cast<intptr_t>(instr);
759 void* page = reinterpret_cast<void*>(address & (~CachePage::kPageMask));
760 void* line = reinterpret_cast<void*>(address & (~CachePage::kLineMask));
761 int offset = (address & CachePage::kPageMask);
762 CachePage* cache_page = GetCachePage(i_cache, page);
763 char* cache_valid_byte = cache_page->ValidityByte(offset);
764 bool cache_hit = (*cache_valid_byte == CachePage::LINE_VALID);
765 char* cached_line = cache_page->CachedData(offset & ~CachePage::kLineMask);
767 // Check that the data in memory matches the contents of the I-cache.
769 memcmp(reinterpret_cast<void*>(instr),
770 cache_page->CachedData(offset), Instruction::kInstrSize));
772 // Cache miss. Load memory into the cache.
773 memcpy(cached_line, line, CachePage::kLineLength);
774 *cache_valid_byte = CachePage::LINE_VALID;
779 void Simulator::Initialize(Isolate* isolate) {
780 if (isolate->simulator_initialized()) return;
781 isolate->set_simulator_initialized(true);
782 ::v8::internal::ExternalReference::set_redirector(isolate,
783 &RedirectExternalReference);
787 Simulator::Simulator(Isolate* isolate) : isolate_(isolate) {
788 i_cache_ = isolate_->simulator_i_cache();
789 if (i_cache_ == NULL) {
790 i_cache_ = new v8::internal::HashMap(&ICacheMatch);
791 isolate_->set_simulator_i_cache(i_cache_);
794 // Set up simulator support first. Some of this information is needed to
795 // setup the architecture state.
796 #if V8_TARGET_ARCH_PPC64
797 size_t stack_size = 2 * 1024 * 1024; // allocate 2MB for stack
799 size_t stack_size = 1 * 1024 * 1024; // allocate 1MB for stack
801 stack_ = reinterpret_cast<char*>(malloc(stack_size));
802 pc_modified_ = false;
807 // Set up architecture state.
808 // All registers are initialized to zero to start with.
809 for (int i = 0; i < kNumGPRs; i++) {
813 fp_condition_reg_ = 0;
816 special_reg_ctr_ = 0;
818 // Initializing FP registers.
819 for (int i = 0; i < kNumFPRs; i++) {
820 fp_registers_[i] = 0.0;
823 // The sp is initialized to point to the bottom (high address) of the
824 // allocated stack area. To be safe in potential stack underflows we leave
825 // some buffer below.
826 registers_[sp] = reinterpret_cast<intptr_t>(stack_) + stack_size - 64;
827 InitializeCoverage();
829 last_debugger_input_ = NULL;
833 Simulator::~Simulator() {}
836 // When the generated code calls an external reference we need to catch that in
837 // the simulator. The external reference will be a function compiled for the
838 // host architecture. We need to call that function instead of trying to
839 // execute it with the simulator. We do that by redirecting the external
840 // reference to a svc (Supervisor Call) instruction that is handled by
841 // the simulator. We write the original destination of the jump just at a known
842 // offset from the svc instruction so the simulator knows what to call.
845 Redirection(void* external_function, ExternalReference::Type type)
846 : external_function_(external_function),
847 swi_instruction_(rtCallRedirInstr | kCallRtRedirected),
850 Isolate* isolate = Isolate::Current();
851 next_ = isolate->simulator_redirection();
852 Simulator::current(isolate)->FlushICache(
853 isolate->simulator_i_cache(),
854 reinterpret_cast<void*>(&swi_instruction_), Instruction::kInstrSize);
855 isolate->set_simulator_redirection(this);
858 void* address_of_swi_instruction() {
859 return reinterpret_cast<void*>(&swi_instruction_);
862 void* external_function() { return external_function_; }
863 ExternalReference::Type type() { return type_; }
865 static Redirection* Get(void* external_function,
866 ExternalReference::Type type) {
867 Isolate* isolate = Isolate::Current();
868 Redirection* current = isolate->simulator_redirection();
869 for (; current != NULL; current = current->next_) {
870 if (current->external_function_ == external_function) {
871 DCHECK_EQ(current->type(), type);
875 return new Redirection(external_function, type);
878 static Redirection* FromSwiInstruction(Instruction* swi_instruction) {
879 char* addr_of_swi = reinterpret_cast<char*>(swi_instruction);
880 char* addr_of_redirection =
881 addr_of_swi - OFFSET_OF(Redirection, swi_instruction_);
882 return reinterpret_cast<Redirection*>(addr_of_redirection);
885 static void* ReverseRedirection(intptr_t reg) {
886 Redirection* redirection = FromSwiInstruction(
887 reinterpret_cast<Instruction*>(reinterpret_cast<void*>(reg)));
888 return redirection->external_function();
892 void* external_function_;
893 uint32_t swi_instruction_;
894 ExternalReference::Type type_;
899 void* Simulator::RedirectExternalReference(void* external_function,
900 ExternalReference::Type type) {
901 Redirection* redirection = Redirection::Get(external_function, type);
902 return redirection->address_of_swi_instruction();
906 // Get the active Simulator for the current thread.
907 Simulator* Simulator::current(Isolate* isolate) {
908 v8::internal::Isolate::PerIsolateThreadData* isolate_data =
909 isolate->FindOrAllocatePerThreadDataForThisThread();
910 DCHECK(isolate_data != NULL);
912 Simulator* sim = isolate_data->simulator();
914 // TODO(146): delete the simulator object when a thread/isolate goes away.
915 sim = new Simulator(isolate);
916 isolate_data->set_simulator(sim);
922 // Sets the register in the architecture state.
923 void Simulator::set_register(int reg, intptr_t value) {
924 DCHECK((reg >= 0) && (reg < kNumGPRs));
925 registers_[reg] = value;
929 // Get the register from the architecture state.
930 intptr_t Simulator::get_register(int reg) const {
931 DCHECK((reg >= 0) && (reg < kNumGPRs));
932 // Stupid code added to avoid bug in GCC.
933 // See: http://gcc.gnu.org/bugzilla/show_bug.cgi?id=43949
934 if (reg >= kNumGPRs) return 0;
936 return registers_[reg];
940 double Simulator::get_double_from_register_pair(int reg) {
941 DCHECK((reg >= 0) && (reg < kNumGPRs) && ((reg % 2) == 0));
944 #if !V8_TARGET_ARCH_PPC64 // doesn't make sense in 64bit mode
945 // Read the bits from the unsigned integer register_[] array
946 // into the double precision floating point value and return it.
947 char buffer[sizeof(fp_registers_[0])];
948 memcpy(buffer, ®isters_[reg], 2 * sizeof(registers_[0]));
949 memcpy(&dm_val, buffer, 2 * sizeof(registers_[0]));
955 // Raw access to the PC register.
956 void Simulator::set_pc(intptr_t value) {
958 special_reg_pc_ = value;
962 bool Simulator::has_bad_pc() const {
963 return ((special_reg_pc_ == bad_lr) || (special_reg_pc_ == end_sim_pc));
967 // Raw access to the PC register without the special adjustment when reading.
968 intptr_t Simulator::get_pc() const { return special_reg_pc_; }
971 // Runtime FP routines take:
972 // - two double arguments
973 // - one double argument and zero or one integer arguments.
974 // All are consructed here from d1, d2 and r3.
975 void Simulator::GetFpArgs(double* x, double* y, intptr_t* z) {
976 *x = get_double_from_d_register(1);
977 *y = get_double_from_d_register(2);
978 *z = get_register(3);
982 // The return value is in d1.
983 void Simulator::SetFpResult(const double& result) {
984 set_d_register_from_double(1, result);
988 void Simulator::TrashCallerSaveRegisters() {
989 // We don't trash the registers with the return value.
990 #if 0 // A good idea to trash volatile registers, needs to be done
991 registers_[2] = 0x50Bad4U;
992 registers_[3] = 0x50Bad4U;
993 registers_[12] = 0x50Bad4U;
998 uint32_t Simulator::ReadWU(intptr_t addr, Instruction* instr) {
999 uint32_t* ptr = reinterpret_cast<uint32_t*>(addr);
1004 int32_t Simulator::ReadW(intptr_t addr, Instruction* instr) {
1005 int32_t* ptr = reinterpret_cast<int32_t*>(addr);
1010 void Simulator::WriteW(intptr_t addr, uint32_t value, Instruction* instr) {
1011 uint32_t* ptr = reinterpret_cast<uint32_t*>(addr);
1017 void Simulator::WriteW(intptr_t addr, int32_t value, Instruction* instr) {
1018 int32_t* ptr = reinterpret_cast<int32_t*>(addr);
1024 uint16_t Simulator::ReadHU(intptr_t addr, Instruction* instr) {
1025 uint16_t* ptr = reinterpret_cast<uint16_t*>(addr);
1030 int16_t Simulator::ReadH(intptr_t addr, Instruction* instr) {
1031 int16_t* ptr = reinterpret_cast<int16_t*>(addr);
1036 void Simulator::WriteH(intptr_t addr, uint16_t value, Instruction* instr) {
1037 uint16_t* ptr = reinterpret_cast<uint16_t*>(addr);
1043 void Simulator::WriteH(intptr_t addr, int16_t value, Instruction* instr) {
1044 int16_t* ptr = reinterpret_cast<int16_t*>(addr);
1050 uint8_t Simulator::ReadBU(intptr_t addr) {
1051 uint8_t* ptr = reinterpret_cast<uint8_t*>(addr);
1056 int8_t Simulator::ReadB(intptr_t addr) {
1057 int8_t* ptr = reinterpret_cast<int8_t*>(addr);
1062 void Simulator::WriteB(intptr_t addr, uint8_t value) {
1063 uint8_t* ptr = reinterpret_cast<uint8_t*>(addr);
1068 void Simulator::WriteB(intptr_t addr, int8_t value) {
1069 int8_t* ptr = reinterpret_cast<int8_t*>(addr);
1074 intptr_t* Simulator::ReadDW(intptr_t addr) {
1075 intptr_t* ptr = reinterpret_cast<intptr_t*>(addr);
1080 void Simulator::WriteDW(intptr_t addr, int64_t value) {
1081 int64_t* ptr = reinterpret_cast<int64_t*>(addr);
1087 // Returns the limit of the stack area to enable checking for stack overflows.
1088 uintptr_t Simulator::StackLimit() const {
1089 // Leave a safety margin of 1024 bytes to prevent overrunning the stack when
1091 return reinterpret_cast<uintptr_t>(stack_) + 1024;
1095 // Unsupported instructions use Format to print an error and stop execution.
1096 void Simulator::Format(Instruction* instr, const char* format) {
1097 PrintF("Simulator found unsupported instruction:\n 0x%08" V8PRIxPTR ": %s\n",
1098 reinterpret_cast<intptr_t>(instr), format);
1103 // Calculate C flag value for additions.
1104 bool Simulator::CarryFrom(int32_t left, int32_t right, int32_t carry) {
1105 uint32_t uleft = static_cast<uint32_t>(left);
1106 uint32_t uright = static_cast<uint32_t>(right);
1107 uint32_t urest = 0xffffffffU - uleft;
1109 return (uright > urest) ||
1110 (carry && (((uright + 1) > urest) || (uright > (urest - 1))));
1114 // Calculate C flag value for subtractions.
1115 bool Simulator::BorrowFrom(int32_t left, int32_t right) {
1116 uint32_t uleft = static_cast<uint32_t>(left);
1117 uint32_t uright = static_cast<uint32_t>(right);
1119 return (uright > uleft);
1123 // Calculate V flag value for additions and subtractions.
1124 bool Simulator::OverflowFrom(int32_t alu_out, int32_t left, int32_t right,
1128 // operands have the same sign
1129 overflow = ((left >= 0 && right >= 0) || (left < 0 && right < 0))
1130 // and operands and result have different sign
1132 ((left < 0 && alu_out >= 0) || (left >= 0 && alu_out < 0));
1134 // operands have different signs
1135 overflow = ((left < 0 && right >= 0) || (left >= 0 && right < 0))
1136 // and first operand and result have different signs
1138 ((left < 0 && alu_out >= 0) || (left >= 0 && alu_out < 0));
1144 #if V8_TARGET_ARCH_PPC64
1151 static void decodeObjectPair(ObjectPair* pair, intptr_t* x, intptr_t* y) {
1156 typedef uint64_t ObjectPair;
1159 static void decodeObjectPair(ObjectPair* pair, intptr_t* x, intptr_t* y) {
1160 #if V8_TARGET_BIG_ENDIAN
1161 *x = static_cast<int32_t>(*pair >> 32);
1162 *y = static_cast<int32_t>(*pair);
1164 *x = static_cast<int32_t>(*pair);
1165 *y = static_cast<int32_t>(*pair >> 32);
1170 // Calls into the V8 runtime are based on this very simple interface.
1171 // Note: To be able to return two values from some calls the code in
1172 // runtime.cc uses the ObjectPair which is essentially two pointer
1173 // values stuffed into a structure. With the code below we assume that
1174 // all runtime calls return this pair. If they don't, the r4 result
1175 // register contains a bogus value, which is fine because it is
1177 typedef ObjectPair (*SimulatorRuntimeCall)(intptr_t arg0, intptr_t arg1,
1178 intptr_t arg2, intptr_t arg3,
1179 intptr_t arg4, intptr_t arg5);
1181 // These prototypes handle the four types of FP calls.
1182 typedef int (*SimulatorRuntimeCompareCall)(double darg0, double darg1);
1183 typedef double (*SimulatorRuntimeFPFPCall)(double darg0, double darg1);
1184 typedef double (*SimulatorRuntimeFPCall)(double darg0);
1185 typedef double (*SimulatorRuntimeFPIntCall)(double darg0, intptr_t arg0);
1187 // This signature supports direct call in to API function native callback
1188 // (refer to InvocationCallback in v8.h).
1189 typedef void (*SimulatorRuntimeDirectApiCall)(intptr_t arg0);
1190 typedef void (*SimulatorRuntimeProfilingApiCall)(intptr_t arg0, void* arg1);
1192 // This signature supports direct call to accessor getter callback.
1193 typedef void (*SimulatorRuntimeDirectGetterCall)(intptr_t arg0, intptr_t arg1);
1194 typedef void (*SimulatorRuntimeProfilingGetterCall)(intptr_t arg0,
1195 intptr_t arg1, void* arg2);
1197 // Software interrupt instructions are used by the simulator to call into the
1198 // C-based V8 runtime.
1199 void Simulator::SoftwareInterrupt(Instruction* instr) {
1200 int svc = instr->SvcValue();
1202 case kCallRtRedirected: {
1203 // Check if stack is aligned. Error if not aligned is reported below to
1204 // include information on the function called.
1205 bool stack_aligned =
1206 (get_register(sp) & (::v8::internal::FLAG_sim_stack_alignment - 1)) ==
1208 Redirection* redirection = Redirection::FromSwiInstruction(instr);
1209 const int kArgCount = 6;
1210 int arg0_regnum = 3;
1211 #if !ABI_RETURNS_OBJECT_PAIRS_IN_REGS
1212 intptr_t result_buffer = 0;
1213 if (redirection->type() == ExternalReference::BUILTIN_OBJECTPAIR_CALL) {
1214 result_buffer = get_register(r3);
1218 intptr_t arg[kArgCount];
1219 for (int i = 0; i < kArgCount; i++) {
1220 arg[i] = get_register(arg0_regnum + i);
1223 (redirection->type() == ExternalReference::BUILTIN_FP_FP_CALL) ||
1224 (redirection->type() == ExternalReference::BUILTIN_COMPARE_CALL) ||
1225 (redirection->type() == ExternalReference::BUILTIN_FP_CALL) ||
1226 (redirection->type() == ExternalReference::BUILTIN_FP_INT_CALL);
1227 // This is dodgy but it works because the C entry stubs are never moved.
1228 // See comment in codegen-arm.cc and bug 1242173.
1229 intptr_t saved_lr = special_reg_lr_;
1231 reinterpret_cast<intptr_t>(redirection->external_function());
1233 double dval0, dval1; // one or two double parameters
1234 intptr_t ival; // zero or one integer parameters
1235 int iresult = 0; // integer return value
1236 double dresult = 0; // double return value
1237 GetFpArgs(&dval0, &dval1, &ival);
1238 if (::v8::internal::FLAG_trace_sim || !stack_aligned) {
1239 SimulatorRuntimeCall generic_target =
1240 reinterpret_cast<SimulatorRuntimeCall>(external);
1241 switch (redirection->type()) {
1242 case ExternalReference::BUILTIN_FP_FP_CALL:
1243 case ExternalReference::BUILTIN_COMPARE_CALL:
1244 PrintF("Call to host function at %p with args %f, %f",
1245 FUNCTION_ADDR(generic_target), dval0, dval1);
1247 case ExternalReference::BUILTIN_FP_CALL:
1248 PrintF("Call to host function at %p with arg %f",
1249 FUNCTION_ADDR(generic_target), dval0);
1251 case ExternalReference::BUILTIN_FP_INT_CALL:
1252 PrintF("Call to host function at %p with args %f, %" V8PRIdPTR,
1253 FUNCTION_ADDR(generic_target), dval0, ival);
1259 if (!stack_aligned) {
1260 PrintF(" with unaligned stack %08" V8PRIxPTR "\n",
1265 CHECK(stack_aligned);
1266 switch (redirection->type()) {
1267 case ExternalReference::BUILTIN_COMPARE_CALL: {
1268 SimulatorRuntimeCompareCall target =
1269 reinterpret_cast<SimulatorRuntimeCompareCall>(external);
1270 iresult = target(dval0, dval1);
1271 set_register(r3, iresult);
1274 case ExternalReference::BUILTIN_FP_FP_CALL: {
1275 SimulatorRuntimeFPFPCall target =
1276 reinterpret_cast<SimulatorRuntimeFPFPCall>(external);
1277 dresult = target(dval0, dval1);
1278 SetFpResult(dresult);
1281 case ExternalReference::BUILTIN_FP_CALL: {
1282 SimulatorRuntimeFPCall target =
1283 reinterpret_cast<SimulatorRuntimeFPCall>(external);
1284 dresult = target(dval0);
1285 SetFpResult(dresult);
1288 case ExternalReference::BUILTIN_FP_INT_CALL: {
1289 SimulatorRuntimeFPIntCall target =
1290 reinterpret_cast<SimulatorRuntimeFPIntCall>(external);
1291 dresult = target(dval0, ival);
1292 SetFpResult(dresult);
1299 if (::v8::internal::FLAG_trace_sim || !stack_aligned) {
1300 switch (redirection->type()) {
1301 case ExternalReference::BUILTIN_COMPARE_CALL:
1302 PrintF("Returned %08x\n", iresult);
1304 case ExternalReference::BUILTIN_FP_FP_CALL:
1305 case ExternalReference::BUILTIN_FP_CALL:
1306 case ExternalReference::BUILTIN_FP_INT_CALL:
1307 PrintF("Returned %f\n", dresult);
1314 } else if (redirection->type() == ExternalReference::DIRECT_API_CALL) {
1315 // See callers of MacroAssembler::CallApiFunctionAndReturn for
1316 // explanation of register usage.
1317 if (::v8::internal::FLAG_trace_sim || !stack_aligned) {
1318 PrintF("Call to host function at %p args %08" V8PRIxPTR,
1319 reinterpret_cast<void*>(external), arg[0]);
1320 if (!stack_aligned) {
1321 PrintF(" with unaligned stack %08" V8PRIxPTR "\n",
1326 CHECK(stack_aligned);
1327 SimulatorRuntimeDirectApiCall target =
1328 reinterpret_cast<SimulatorRuntimeDirectApiCall>(external);
1330 } else if (redirection->type() == ExternalReference::PROFILING_API_CALL) {
1331 // See callers of MacroAssembler::CallApiFunctionAndReturn for
1332 // explanation of register usage.
1333 if (::v8::internal::FLAG_trace_sim || !stack_aligned) {
1334 PrintF("Call to host function at %p args %08" V8PRIxPTR
1336 reinterpret_cast<void*>(external), arg[0], arg[1]);
1337 if (!stack_aligned) {
1338 PrintF(" with unaligned stack %08" V8PRIxPTR "\n",
1343 CHECK(stack_aligned);
1344 SimulatorRuntimeProfilingApiCall target =
1345 reinterpret_cast<SimulatorRuntimeProfilingApiCall>(external);
1346 target(arg[0], Redirection::ReverseRedirection(arg[1]));
1347 } else if (redirection->type() == ExternalReference::DIRECT_GETTER_CALL) {
1348 // See callers of MacroAssembler::CallApiFunctionAndReturn for
1349 // explanation of register usage.
1350 if (::v8::internal::FLAG_trace_sim || !stack_aligned) {
1351 PrintF("Call to host function at %p args %08" V8PRIxPTR
1353 reinterpret_cast<void*>(external), arg[0], arg[1]);
1354 if (!stack_aligned) {
1355 PrintF(" with unaligned stack %08" V8PRIxPTR "\n",
1360 CHECK(stack_aligned);
1361 SimulatorRuntimeDirectGetterCall target =
1362 reinterpret_cast<SimulatorRuntimeDirectGetterCall>(external);
1363 #if !ABI_PASSES_HANDLES_IN_REGS
1364 arg[0] = *(reinterpret_cast<intptr_t*>(arg[0]));
1366 target(arg[0], arg[1]);
1367 } else if (redirection->type() ==
1368 ExternalReference::PROFILING_GETTER_CALL) {
1369 if (::v8::internal::FLAG_trace_sim || !stack_aligned) {
1370 PrintF("Call to host function at %p args %08" V8PRIxPTR
1371 " %08" V8PRIxPTR " %08" V8PRIxPTR,
1372 reinterpret_cast<void*>(external), arg[0], arg[1], arg[2]);
1373 if (!stack_aligned) {
1374 PrintF(" with unaligned stack %08" V8PRIxPTR "\n",
1379 CHECK(stack_aligned);
1380 SimulatorRuntimeProfilingGetterCall target =
1381 reinterpret_cast<SimulatorRuntimeProfilingGetterCall>(external);
1382 #if !ABI_PASSES_HANDLES_IN_REGS
1383 arg[0] = *(reinterpret_cast<intptr_t*>(arg[0]));
1385 target(arg[0], arg[1], Redirection::ReverseRedirection(arg[2]));
1388 if (::v8::internal::FLAG_trace_sim || !stack_aligned) {
1389 SimulatorRuntimeCall target =
1390 reinterpret_cast<SimulatorRuntimeCall>(external);
1392 "Call to host function at %p,\n"
1393 "\t\t\t\targs %08" V8PRIxPTR ", %08" V8PRIxPTR ", %08" V8PRIxPTR
1394 ", %08" V8PRIxPTR ", %08" V8PRIxPTR ", %08" V8PRIxPTR,
1395 FUNCTION_ADDR(target), arg[0], arg[1], arg[2], arg[3], arg[4],
1397 if (!stack_aligned) {
1398 PrintF(" with unaligned stack %08" V8PRIxPTR "\n",
1403 CHECK(stack_aligned);
1404 DCHECK(redirection->type() == ExternalReference::BUILTIN_CALL);
1405 SimulatorRuntimeCall target =
1406 reinterpret_cast<SimulatorRuntimeCall>(external);
1408 target(arg[0], arg[1], arg[2], arg[3], arg[4], arg[5]);
1411 decodeObjectPair(&result, &x, &y);
1412 if (::v8::internal::FLAG_trace_sim) {
1413 PrintF("Returned {%08" V8PRIxPTR ", %08" V8PRIxPTR "}\n", x, y);
1415 set_register(r3, x);
1416 set_register(r4, y);
1422 PPCDebugger dbg(this);
1426 // stop uses all codes greater than 1 << 23.
1428 if (svc >= (1 << 23)) {
1429 uint32_t code = svc & kStopCodeMask;
1430 if (isWatchedStop(code)) {
1431 IncreaseStopCounter(code);
1433 // Stop if it is enabled, otherwise go on jumping over the stop
1434 // and the message address.
1435 if (isEnabledStop(code)) {
1436 PPCDebugger dbg(this);
1439 set_pc(get_pc() + Instruction::kInstrSize + kPointerSize);
1442 // This is not a valid svc code.
1451 // Stop helper functions.
1452 bool Simulator::isStopInstruction(Instruction* instr) {
1453 return (instr->Bits(27, 24) == 0xF) && (instr->SvcValue() >= kStopCode);
1457 bool Simulator::isWatchedStop(uint32_t code) {
1458 DCHECK(code <= kMaxStopCode);
1459 return code < kNumOfWatchedStops;
1463 bool Simulator::isEnabledStop(uint32_t code) {
1464 DCHECK(code <= kMaxStopCode);
1465 // Unwatched stops are always enabled.
1466 return !isWatchedStop(code) ||
1467 !(watched_stops_[code].count & kStopDisabledBit);
1471 void Simulator::EnableStop(uint32_t code) {
1472 DCHECK(isWatchedStop(code));
1473 if (!isEnabledStop(code)) {
1474 watched_stops_[code].count &= ~kStopDisabledBit;
1479 void Simulator::DisableStop(uint32_t code) {
1480 DCHECK(isWatchedStop(code));
1481 if (isEnabledStop(code)) {
1482 watched_stops_[code].count |= kStopDisabledBit;
1487 void Simulator::IncreaseStopCounter(uint32_t code) {
1488 DCHECK(code <= kMaxStopCode);
1489 DCHECK(isWatchedStop(code));
1490 if ((watched_stops_[code].count & ~(1 << 31)) == 0x7fffffff) {
1492 "Stop counter for code %i has overflowed.\n"
1493 "Enabling this code and reseting the counter to 0.\n",
1495 watched_stops_[code].count = 0;
1498 watched_stops_[code].count++;
1503 // Print a stop status.
1504 void Simulator::PrintStopInfo(uint32_t code) {
1505 DCHECK(code <= kMaxStopCode);
1506 if (!isWatchedStop(code)) {
1507 PrintF("Stop not watched.");
1509 const char* state = isEnabledStop(code) ? "Enabled" : "Disabled";
1510 int32_t count = watched_stops_[code].count & ~kStopDisabledBit;
1511 // Don't print the state of unused breakpoints.
1513 if (watched_stops_[code].desc) {
1514 PrintF("stop %i - 0x%x: \t%s, \tcounter = %i, \t%s\n", code, code,
1515 state, count, watched_stops_[code].desc);
1517 PrintF("stop %i - 0x%x: \t%s, \tcounter = %i\n", code, code, state,
1525 void Simulator::SetCR0(intptr_t result, bool setSO) {
1539 condition_reg_ = (condition_reg_ & ~0xF0000000) | bf;
1543 void Simulator::ExecuteBranchConditional(Instruction* instr) {
1544 int bo = instr->Bits(25, 21) << 21;
1545 int offset = (instr->Bits(15, 2) << 18) >> 16;
1546 int condition_bit = instr->Bits(20, 16);
1547 int condition_mask = 0x80000000 >> condition_bit;
1549 case DCBNZF: // Decrement CTR; branch if CTR != 0 and condition false
1550 case DCBEZF: // Decrement CTR; branch if CTR == 0 and condition false
1552 case BF: { // Branch if condition false
1553 if (!(condition_reg_ & condition_mask)) {
1554 if (instr->Bit(0) == 1) { // LK flag set
1555 special_reg_lr_ = get_pc() + 4;
1557 set_pc(get_pc() + offset);
1561 case DCBNZT: // Decrement CTR; branch if CTR != 0 and condition true
1562 case DCBEZT: // Decrement CTR; branch if CTR == 0 and condition true
1564 case BT: { // Branch if condition true
1565 if (condition_reg_ & condition_mask) {
1566 if (instr->Bit(0) == 1) { // LK flag set
1567 special_reg_lr_ = get_pc() + 4;
1569 set_pc(get_pc() + offset);
1573 case DCBNZ: // Decrement CTR; branch if CTR != 0
1574 case DCBEZ: // Decrement CTR; branch if CTR == 0
1575 special_reg_ctr_ -= 1;
1576 if ((special_reg_ctr_ == 0) == (bo == DCBEZ)) {
1577 if (instr->Bit(0) == 1) { // LK flag set
1578 special_reg_lr_ = get_pc() + 4;
1580 set_pc(get_pc() + offset);
1583 case BA: { // Branch always
1584 if (instr->Bit(0) == 1) { // LK flag set
1585 special_reg_lr_ = get_pc() + 4;
1587 set_pc(get_pc() + offset);
1591 UNIMPLEMENTED(); // Invalid encoding
1596 // Handle execution based on instruction types.
1597 void Simulator::ExecuteExt1(Instruction* instr) {
1598 switch (instr->Bits(10, 1) << 1) {
1600 UNIMPLEMENTED(); // Not used by V8.
1602 // need to check BO flag
1603 intptr_t old_pc = get_pc();
1604 set_pc(special_reg_lr_);
1605 if (instr->Bit(0) == 1) { // LK flag set
1606 special_reg_lr_ = old_pc + 4;
1611 // need to check BO flag
1612 intptr_t old_pc = get_pc();
1613 set_pc(special_reg_ctr_);
1614 if (instr->Bit(0) == 1) { // LK flag set
1615 special_reg_lr_ = old_pc + 4;
1624 // todo - simulate isync
1628 int bt = instr->Bits(25, 21);
1629 int ba = instr->Bits(20, 16);
1630 int bb = instr->Bits(15, 11);
1631 int ba_val = ((0x80000000 >> ba) & condition_reg_) == 0 ? 0 : 1;
1632 int bb_val = ((0x80000000 >> bb) & condition_reg_) == 0 ? 0 : 1;
1633 int bt_val = ba_val ^ bb_val;
1634 bt_val = bt_val << (31 - bt); // shift bit to correct destination
1635 condition_reg_ &= ~(0x80000000 >> bt);
1636 condition_reg_ |= bt_val;
1640 int bt = instr->Bits(25, 21);
1641 int ba = instr->Bits(20, 16);
1642 int bb = instr->Bits(15, 11);
1643 int ba_val = ((0x80000000 >> ba) & condition_reg_) == 0 ? 0 : 1;
1644 int bb_val = ((0x80000000 >> bb) & condition_reg_) == 0 ? 0 : 1;
1645 int bt_val = 1 - (ba_val ^ bb_val);
1646 bt_val = bt_val << (31 - bt); // shift bit to correct destination
1647 condition_reg_ &= ~(0x80000000 >> bt);
1648 condition_reg_ |= bt_val;
1656 UNIMPLEMENTED(); // Not used by V8.
1662 bool Simulator::ExecuteExt2_10bit(Instruction* instr) {
1665 int opcode = instr->Bits(10, 1) << 1;
1668 int rs = instr->RSValue();
1669 int ra = instr->RAValue();
1670 int rb = instr->RBValue();
1671 uint32_t rs_val = get_register(rs);
1672 uintptr_t rb_val = get_register(rb);
1673 intptr_t result = rs_val >> (rb_val & 0x3f);
1674 set_register(ra, result);
1675 if (instr->Bit(0)) { // RC bit set
1680 #if V8_TARGET_ARCH_PPC64
1682 int rs = instr->RSValue();
1683 int ra = instr->RAValue();
1684 int rb = instr->RBValue();
1685 uintptr_t rs_val = get_register(rs);
1686 uintptr_t rb_val = get_register(rb);
1687 intptr_t result = rs_val >> (rb_val & 0x7f);
1688 set_register(ra, result);
1689 if (instr->Bit(0)) { // RC bit set
1696 int rs = instr->RSValue();
1697 int ra = instr->RAValue();
1698 int rb = instr->RBValue();
1699 int32_t rs_val = get_register(rs);
1700 intptr_t rb_val = get_register(rb);
1701 intptr_t result = rs_val >> (rb_val & 0x3f);
1702 set_register(ra, result);
1703 if (instr->Bit(0)) { // RC bit set
1708 #if V8_TARGET_ARCH_PPC64
1710 int rs = instr->RSValue();
1711 int ra = instr->RAValue();
1712 int rb = instr->RBValue();
1713 intptr_t rs_val = get_register(rs);
1714 intptr_t rb_val = get_register(rb);
1715 intptr_t result = rs_val >> (rb_val & 0x7f);
1716 set_register(ra, result);
1717 if (instr->Bit(0)) { // RC bit set
1724 int ra = instr->RAValue();
1725 int rs = instr->RSValue();
1726 int sh = instr->Bits(15, 11);
1727 int32_t rs_val = get_register(rs);
1728 intptr_t result = rs_val >> sh;
1729 set_register(ra, result);
1730 if (instr->Bit(0)) { // RC bit set
1735 #if V8_TARGET_ARCH_PPC64
1737 const int shift = kBitsPerPointer - 32;
1738 int ra = instr->RAValue();
1739 int rs = instr->RSValue();
1740 intptr_t rs_val = get_register(rs);
1741 intptr_t ra_val = (rs_val << shift) >> shift;
1742 set_register(ra, ra_val);
1743 if (instr->Bit(0)) { // RC bit set
1750 const int shift = kBitsPerPointer - 16;
1751 int ra = instr->RAValue();
1752 int rs = instr->RSValue();
1753 intptr_t rs_val = get_register(rs);
1754 intptr_t ra_val = (rs_val << shift) >> shift;
1755 set_register(ra, ra_val);
1756 if (instr->Bit(0)) { // RC bit set
1762 const int shift = kBitsPerPointer - 8;
1763 int ra = instr->RAValue();
1764 int rs = instr->RSValue();
1765 intptr_t rs_val = get_register(rs);
1766 intptr_t ra_val = (rs_val << shift) >> shift;
1767 set_register(ra, ra_val);
1768 if (instr->Bit(0)) { // RC bit set
1775 int frt = instr->RTValue();
1776 int ra = instr->RAValue();
1777 int rb = instr->RBValue();
1778 intptr_t ra_val = ra == 0 ? 0 : get_register(ra);
1779 intptr_t rb_val = get_register(rb);
1780 int32_t val = ReadW(ra_val + rb_val, instr);
1781 float* fptr = reinterpret_cast<float*>(&val);
1782 set_d_register_from_double(frt, static_cast<double>(*fptr));
1783 if (opcode == LFSUX) {
1785 set_register(ra, ra_val + rb_val);
1791 int frt = instr->RTValue();
1792 int ra = instr->RAValue();
1793 int rb = instr->RBValue();
1794 intptr_t ra_val = ra == 0 ? 0 : get_register(ra);
1795 intptr_t rb_val = get_register(rb);
1796 int64_t* dptr = reinterpret_cast<int64_t*>(ReadDW(ra_val + rb_val));
1797 set_d_register(frt, *dptr);
1798 if (opcode == LFDUX) {
1800 set_register(ra, ra_val + rb_val);
1806 int frs = instr->RSValue();
1807 int ra = instr->RAValue();
1808 int rb = instr->RBValue();
1809 intptr_t ra_val = ra == 0 ? 0 : get_register(ra);
1810 intptr_t rb_val = get_register(rb);
1811 float frs_val = static_cast<float>(get_double_from_d_register(frs));
1812 int32_t* p = reinterpret_cast<int32_t*>(&frs_val);
1813 WriteW(ra_val + rb_val, *p, instr);
1814 if (opcode == STFSUX) {
1816 set_register(ra, ra_val + rb_val);
1822 int frs = instr->RSValue();
1823 int ra = instr->RAValue();
1824 int rb = instr->RBValue();
1825 intptr_t ra_val = ra == 0 ? 0 : get_register(ra);
1826 intptr_t rb_val = get_register(rb);
1827 int64_t frs_val = get_d_register(frs);
1828 WriteDW(ra_val + rb_val, frs_val);
1829 if (opcode == STFDUX) {
1831 set_register(ra, ra_val + rb_val);
1836 // todo - simulate sync
1840 // todo - simulate icbi
1849 if (found) return found;
1852 opcode = instr->Bits(10, 2) << 2;
1855 int ra = instr->RAValue();
1856 int rs = instr->RSValue();
1857 int sh = (instr->Bits(15, 11) | (instr->Bit(1) << 5));
1858 intptr_t rs_val = get_register(rs);
1859 intptr_t result = rs_val >> sh;
1860 set_register(ra, result);
1861 if (instr->Bit(0)) { // RC bit set
1876 bool Simulator::ExecuteExt2_9bit_part1(Instruction* instr) {
1879 int opcode = instr->Bits(9, 1) << 1;
1882 // used for call redirection in simulation mode
1883 SoftwareInterrupt(instr);
1887 int ra = instr->RAValue();
1888 int rb = instr->RBValue();
1889 int cr = instr->Bits(25, 23);
1891 #if V8_TARGET_ARCH_PPC64
1892 int L = instr->Bit(21);
1895 intptr_t ra_val = get_register(ra);
1896 intptr_t rb_val = get_register(rb);
1897 if (ra_val < rb_val) {
1900 if (ra_val > rb_val) {
1903 if (ra_val == rb_val) {
1906 #if V8_TARGET_ARCH_PPC64
1908 int32_t ra_val = get_register(ra);
1909 int32_t rb_val = get_register(rb);
1910 if (ra_val < rb_val) {
1913 if (ra_val > rb_val) {
1916 if (ra_val == rb_val) {
1921 uint32_t condition_mask = 0xF0000000U >> (cr * 4);
1922 uint32_t condition = bf >> (cr * 4);
1923 condition_reg_ = (condition_reg_ & ~condition_mask) | condition;
1927 int rt = instr->RTValue();
1928 int ra = instr->RAValue();
1929 int rb = instr->RBValue();
1930 // int oe = instr->Bit(10);
1931 uintptr_t ra_val = get_register(ra);
1932 uintptr_t rb_val = get_register(rb);
1933 uintptr_t alu_out = ~ra_val + rb_val + 1;
1934 set_register(rt, alu_out);
1935 // If the sign of rb and alu_out don't match, carry = 0
1936 if ((alu_out ^ rb_val) & 0x80000000) {
1937 special_reg_xer_ &= ~0xF0000000;
1939 special_reg_xer_ = (special_reg_xer_ & ~0xF0000000) | 0x20000000;
1941 if (instr->Bit(0)) { // RC bit set
1944 // todo - handle OE bit
1948 int rt = instr->RTValue();
1949 int ra = instr->RAValue();
1950 int rb = instr->RBValue();
1951 // int oe = instr->Bit(10);
1952 uintptr_t ra_val = get_register(ra);
1953 uintptr_t rb_val = get_register(rb);
1954 uintptr_t alu_out = ra_val + rb_val;
1956 if (~ra_val < rb_val) {
1957 special_reg_xer_ = (special_reg_xer_ & ~0xF0000000) | 0x20000000;
1959 special_reg_xer_ &= ~0xF0000000;
1961 set_register(rt, alu_out);
1962 if (instr->Bit(0)) { // RC bit set
1963 SetCR0(static_cast<intptr_t>(alu_out));
1965 // todo - handle OE bit
1969 int rt = instr->RTValue();
1970 int ra = instr->RAValue();
1971 int rb = instr->RBValue();
1972 int32_t ra_val = (get_register(ra) & 0xFFFFFFFF);
1973 int32_t rb_val = (get_register(rb) & 0xFFFFFFFF);
1974 int64_t alu_out = (int64_t)ra_val * (int64_t)rb_val;
1976 set_register(rt, alu_out);
1977 if (instr->Bit(0)) { // RC bit set
1978 SetCR0(static_cast<intptr_t>(alu_out));
1983 int rt = instr->RTValue();
1984 int ra = instr->RAValue();
1985 int rb = instr->RBValue();
1986 uint32_t ra_val = (get_register(ra) & 0xFFFFFFFF);
1987 uint32_t rb_val = (get_register(rb) & 0xFFFFFFFF);
1988 uint64_t alu_out = (uint64_t)ra_val * (uint64_t)rb_val;
1990 set_register(rt, alu_out);
1991 if (instr->Bit(0)) { // RC bit set
1992 SetCR0(static_cast<intptr_t>(alu_out));
1997 int rt = instr->RTValue();
1998 int ra = instr->RAValue();
1999 intptr_t ra_val = get_register(ra);
2000 intptr_t alu_out = 1 + ~ra_val;
2001 #if V8_TARGET_ARCH_PPC64
2002 intptr_t one = 1; // work-around gcc
2003 intptr_t kOverflowVal = (one << 63);
2005 intptr_t kOverflowVal = kMinInt;
2007 set_register(rt, alu_out);
2008 if (instr->Bit(10)) { // OE bit set
2009 if (ra_val == kOverflowVal) {
2010 special_reg_xer_ |= 0xC0000000; // set SO,OV
2012 special_reg_xer_ &= ~0x40000000; // clear OV
2015 if (instr->Bit(0)) { // RC bit set
2016 bool setSO = (special_reg_xer_ & 0x80000000);
2017 SetCR0(alu_out, setSO);
2022 int rs = instr->RSValue();
2023 int ra = instr->RAValue();
2024 int rb = instr->RBValue();
2025 uint32_t rs_val = get_register(rs);
2026 uintptr_t rb_val = get_register(rb);
2027 uint32_t result = rs_val << (rb_val & 0x3f);
2028 set_register(ra, result);
2029 if (instr->Bit(0)) { // RC bit set
2034 #if V8_TARGET_ARCH_PPC64
2036 int rs = instr->RSValue();
2037 int ra = instr->RAValue();
2038 int rb = instr->RBValue();
2039 uintptr_t rs_val = get_register(rs);
2040 uintptr_t rb_val = get_register(rb);
2041 uintptr_t result = rs_val << (rb_val & 0x7f);
2042 set_register(ra, result);
2043 if (instr->Bit(0)) { // RC bit set
2049 DCHECK(!instr->Bit(0));
2050 int frt = instr->RTValue();
2051 int ra = instr->RAValue();
2052 int64_t frt_val = get_d_register(frt);
2053 set_register(ra, frt_val);
2057 DCHECK(!instr->Bit(0));
2058 int frt = instr->RTValue();
2059 int ra = instr->RAValue();
2060 int64_t frt_val = get_d_register(frt);
2061 set_register(ra, static_cast<uint32_t>(frt_val));
2065 DCHECK(!instr->Bit(0));
2066 int frt = instr->RTValue();
2067 int ra = instr->RAValue();
2068 int64_t ra_val = get_register(ra);
2069 set_d_register(frt, ra_val);
2073 DCHECK(!instr->Bit(0));
2074 int frt = instr->RTValue();
2075 int ra = instr->RAValue();
2076 int64_t ra_val = static_cast<int32_t>(get_register(ra));
2077 set_d_register(frt, ra_val);
2081 DCHECK(!instr->Bit(0));
2082 int frt = instr->RTValue();
2083 int ra = instr->RAValue();
2084 uint64_t ra_val = static_cast<uint32_t>(get_register(ra));
2085 set_d_register(frt, ra_val);
2099 bool Simulator::ExecuteExt2_9bit_part2(Instruction* instr) {
2101 int opcode = instr->Bits(9, 1) << 1;
2104 int rs = instr->RSValue();
2105 int ra = instr->RAValue();
2106 uintptr_t rs_val = get_register(rs);
2107 uintptr_t count = 0;
2109 uintptr_t bit = 0x80000000;
2110 for (; n < 32; n++) {
2111 if (bit & rs_val) break;
2115 set_register(ra, count);
2116 if (instr->Bit(0)) { // RC Bit set
2124 condition_reg_ = (condition_reg_ & ~0xF0000000) | bf;
2128 #if V8_TARGET_ARCH_PPC64
2130 int rs = instr->RSValue();
2131 int ra = instr->RAValue();
2132 uintptr_t rs_val = get_register(rs);
2133 uintptr_t count = 0;
2135 uintptr_t bit = 0x8000000000000000UL;
2136 for (; n < 64; n++) {
2137 if (bit & rs_val) break;
2141 set_register(ra, count);
2142 if (instr->Bit(0)) { // RC Bit set
2150 condition_reg_ = (condition_reg_ & ~0xF0000000) | bf;
2156 int rs = instr->RSValue();
2157 int ra = instr->RAValue();
2158 int rb = instr->RBValue();
2159 intptr_t rs_val = get_register(rs);
2160 intptr_t rb_val = get_register(rb);
2161 intptr_t alu_out = rs_val & rb_val;
2162 set_register(ra, alu_out);
2163 if (instr->Bit(0)) { // RC Bit set
2169 int rs = instr->RSValue();
2170 int ra = instr->RAValue();
2171 int rb = instr->RBValue();
2172 intptr_t rs_val = get_register(rs);
2173 intptr_t rb_val = get_register(rb);
2174 intptr_t alu_out = rs_val & ~rb_val;
2175 set_register(ra, alu_out);
2176 if (instr->Bit(0)) { // RC Bit set
2182 int ra = instr->RAValue();
2183 int rb = instr->RBValue();
2184 int cr = instr->Bits(25, 23);
2186 #if V8_TARGET_ARCH_PPC64
2187 int L = instr->Bit(21);
2190 uintptr_t ra_val = get_register(ra);
2191 uintptr_t rb_val = get_register(rb);
2192 if (ra_val < rb_val) {
2195 if (ra_val > rb_val) {
2198 if (ra_val == rb_val) {
2201 #if V8_TARGET_ARCH_PPC64
2203 uint32_t ra_val = get_register(ra);
2204 uint32_t rb_val = get_register(rb);
2205 if (ra_val < rb_val) {
2208 if (ra_val > rb_val) {
2211 if (ra_val == rb_val) {
2216 uint32_t condition_mask = 0xF0000000U >> (cr * 4);
2217 uint32_t condition = bf >> (cr * 4);
2218 condition_reg_ = (condition_reg_ & ~condition_mask) | condition;
2222 int rt = instr->RTValue();
2223 int ra = instr->RAValue();
2224 int rb = instr->RBValue();
2225 // int oe = instr->Bit(10);
2226 intptr_t ra_val = get_register(ra);
2227 intptr_t rb_val = get_register(rb);
2228 intptr_t alu_out = rb_val - ra_val;
2229 // todo - figure out underflow
2230 set_register(rt, alu_out);
2231 if (instr->Bit(0)) { // RC Bit set
2234 // todo - handle OE bit
2238 int rt = instr->RTValue();
2239 int ra = instr->RAValue();
2240 intptr_t ra_val = get_register(ra);
2241 if (special_reg_xer_ & 0x20000000) {
2244 set_register(rt, ra_val);
2245 if (instr->Bit(0)) { // RC bit set
2248 // todo - handle OE bit
2252 int rs = instr->RSValue();
2253 int ra = instr->RAValue();
2254 int rb = instr->RBValue();
2255 intptr_t rs_val = get_register(rs);
2256 intptr_t rb_val = get_register(rb);
2257 intptr_t alu_out = ~(rs_val | rb_val);
2258 set_register(ra, alu_out);
2259 if (instr->Bit(0)) { // RC bit set
2265 int rt = instr->RTValue();
2266 int ra = instr->RAValue();
2267 int rb = instr->RBValue();
2268 int32_t ra_val = (get_register(ra) & 0xFFFFFFFF);
2269 int32_t rb_val = (get_register(rb) & 0xFFFFFFFF);
2270 int32_t alu_out = ra_val * rb_val;
2271 set_register(rt, alu_out);
2272 if (instr->Bit(0)) { // RC bit set
2275 // todo - handle OE bit
2278 #if V8_TARGET_ARCH_PPC64
2280 int rt = instr->RTValue();
2281 int ra = instr->RAValue();
2282 int rb = instr->RBValue();
2283 int64_t ra_val = get_register(ra);
2284 int64_t rb_val = get_register(rb);
2285 int64_t alu_out = ra_val * rb_val;
2286 set_register(rt, alu_out);
2287 if (instr->Bit(0)) { // RC bit set
2290 // todo - handle OE bit
2295 int rt = instr->RTValue();
2296 int ra = instr->RAValue();
2297 int rb = instr->RBValue();
2298 int32_t ra_val = get_register(ra);
2299 int32_t rb_val = get_register(rb);
2300 bool overflow = (ra_val == kMinInt && rb_val == -1);
2301 // result is undefined if divisor is zero or if operation
2302 // is 0x80000000 / -1.
2303 int32_t alu_out = (rb_val == 0 || overflow) ? -1 : ra_val / rb_val;
2304 set_register(rt, alu_out);
2305 if (instr->Bit(10)) { // OE bit set
2307 special_reg_xer_ |= 0xC0000000; // set SO,OV
2309 special_reg_xer_ &= ~0x40000000; // clear OV
2312 if (instr->Bit(0)) { // RC bit set
2313 bool setSO = (special_reg_xer_ & 0x80000000);
2314 SetCR0(alu_out, setSO);
2319 int rt = instr->RTValue();
2320 int ra = instr->RAValue();
2321 int rb = instr->RBValue();
2322 uint32_t ra_val = get_register(ra);
2323 uint32_t rb_val = get_register(rb);
2324 bool overflow = (rb_val == 0);
2325 // result is undefined if divisor is zero
2326 uint32_t alu_out = (overflow) ? -1 : ra_val / rb_val;
2327 set_register(rt, alu_out);
2328 if (instr->Bit(10)) { // OE bit set
2330 special_reg_xer_ |= 0xC0000000; // set SO,OV
2332 special_reg_xer_ &= ~0x40000000; // clear OV
2335 if (instr->Bit(0)) { // RC bit set
2336 bool setSO = (special_reg_xer_ & 0x80000000);
2337 SetCR0(alu_out, setSO);
2341 #if V8_TARGET_ARCH_PPC64
2343 int rt = instr->RTValue();
2344 int ra = instr->RAValue();
2345 int rb = instr->RBValue();
2346 int64_t ra_val = get_register(ra);
2347 int64_t rb_val = get_register(rb);
2348 int64_t one = 1; // work-around gcc
2349 int64_t kMinLongLong = (one << 63);
2350 // result is undefined if divisor is zero or if operation
2351 // is 0x80000000_00000000 / -1.
2353 (rb_val == 0 || (ra_val == kMinLongLong && rb_val == -1))
2356 set_register(rt, alu_out);
2357 if (instr->Bit(0)) { // RC bit set
2360 // todo - handle OE bit
2364 int rt = instr->RTValue();
2365 int ra = instr->RAValue();
2366 int rb = instr->RBValue();
2367 uint64_t ra_val = get_register(ra);
2368 uint64_t rb_val = get_register(rb);
2369 // result is undefined if divisor is zero
2370 uint64_t alu_out = (rb_val == 0) ? -1 : ra_val / rb_val;
2371 set_register(rt, alu_out);
2372 if (instr->Bit(0)) { // RC bit set
2375 // todo - handle OE bit
2380 int rt = instr->RTValue();
2381 int ra = instr->RAValue();
2382 int rb = instr->RBValue();
2383 // int oe = instr->Bit(10);
2384 intptr_t ra_val = get_register(ra);
2385 intptr_t rb_val = get_register(rb);
2386 intptr_t alu_out = ra_val + rb_val;
2387 set_register(rt, alu_out);
2388 if (instr->Bit(0)) { // RC bit set
2391 // todo - handle OE bit
2395 int rs = instr->RSValue();
2396 int ra = instr->RAValue();
2397 int rb = instr->RBValue();
2398 intptr_t rs_val = get_register(rs);
2399 intptr_t rb_val = get_register(rb);
2400 intptr_t alu_out = rs_val ^ rb_val;
2401 set_register(ra, alu_out);
2402 if (instr->Bit(0)) { // RC bit set
2408 int rs = instr->RSValue();
2409 int ra = instr->RAValue();
2410 int rb = instr->RBValue();
2411 intptr_t rs_val = get_register(rs);
2412 intptr_t rb_val = get_register(rb);
2413 intptr_t alu_out = rs_val | rb_val;
2414 set_register(ra, alu_out);
2415 if (instr->Bit(0)) { // RC bit set
2421 int rs = instr->RSValue();
2422 int ra = instr->RAValue();
2423 int rb = instr->RBValue();
2424 intptr_t rs_val = get_register(rs);
2425 intptr_t rb_val = get_register(rb);
2426 intptr_t alu_out = rs_val | ~rb_val;
2427 set_register(ra, alu_out);
2428 if (instr->Bit(0)) { // RC bit set
2434 int rt = instr->RTValue();
2435 int spr = instr->Bits(20, 11);
2437 UNIMPLEMENTED(); // Only LRLR supported
2439 set_register(rt, special_reg_lr_);
2443 int rt = instr->RTValue();
2444 intptr_t rt_val = get_register(rt);
2445 int spr = instr->Bits(20, 11);
2447 special_reg_lr_ = rt_val;
2448 } else if (spr == 288) {
2449 special_reg_ctr_ = rt_val;
2450 } else if (spr == 32) {
2451 special_reg_xer_ = rt_val;
2453 UNIMPLEMENTED(); // Only LR supported
2458 int rt = instr->RTValue();
2459 set_register(rt, condition_reg_);
2464 int rs = instr->RSValue();
2465 int ra = instr->RAValue();
2466 int rb = instr->RBValue();
2467 intptr_t ra_val = ra == 0 ? 0 : get_register(ra);
2468 int32_t rs_val = get_register(rs);
2469 intptr_t rb_val = get_register(rb);
2470 WriteW(ra_val + rb_val, rs_val, instr);
2471 if (opcode == STWUX) {
2473 set_register(ra, ra_val + rb_val);
2479 int rs = instr->RSValue();
2480 int ra = instr->RAValue();
2481 int rb = instr->RBValue();
2482 intptr_t ra_val = ra == 0 ? 0 : get_register(ra);
2483 int8_t rs_val = get_register(rs);
2484 intptr_t rb_val = get_register(rb);
2485 WriteB(ra_val + rb_val, rs_val);
2486 if (opcode == STBUX) {
2488 set_register(ra, ra_val + rb_val);
2494 int rs = instr->RSValue();
2495 int ra = instr->RAValue();
2496 int rb = instr->RBValue();
2497 intptr_t ra_val = ra == 0 ? 0 : get_register(ra);
2498 int16_t rs_val = get_register(rs);
2499 intptr_t rb_val = get_register(rb);
2500 WriteH(ra_val + rb_val, rs_val, instr);
2501 if (opcode == STHUX) {
2503 set_register(ra, ra_val + rb_val);
2509 int rt = instr->RTValue();
2510 int ra = instr->RAValue();
2511 int rb = instr->RBValue();
2512 intptr_t ra_val = ra == 0 ? 0 : get_register(ra);
2513 intptr_t rb_val = get_register(rb);
2514 set_register(rt, ReadWU(ra_val + rb_val, instr));
2515 if (opcode == LWZUX) {
2516 DCHECK(ra != 0 && ra != rt);
2517 set_register(ra, ra_val + rb_val);
2521 #if V8_TARGET_ARCH_PPC64
2523 int rt = instr->RTValue();
2524 int ra = instr->RAValue();
2525 int rb = instr->RBValue();
2526 intptr_t ra_val = ra == 0 ? 0 : get_register(ra);
2527 intptr_t rb_val = get_register(rb);
2528 set_register(rt, ReadW(ra_val + rb_val, instr));
2533 int rt = instr->RTValue();
2534 int ra = instr->RAValue();
2535 int rb = instr->RBValue();
2536 intptr_t ra_val = ra == 0 ? 0 : get_register(ra);
2537 intptr_t rb_val = get_register(rb);
2538 intptr_t* result = ReadDW(ra_val + rb_val);
2539 set_register(rt, *result);
2540 if (opcode == LDUX) {
2541 DCHECK(ra != 0 && ra != rt);
2542 set_register(ra, ra_val + rb_val);
2548 int rs = instr->RSValue();
2549 int ra = instr->RAValue();
2550 int rb = instr->RBValue();
2551 intptr_t ra_val = ra == 0 ? 0 : get_register(ra);
2552 intptr_t rs_val = get_register(rs);
2553 intptr_t rb_val = get_register(rb);
2554 WriteDW(ra_val + rb_val, rs_val);
2555 if (opcode == STDUX) {
2557 set_register(ra, ra_val + rb_val);
2564 int rt = instr->RTValue();
2565 int ra = instr->RAValue();
2566 int rb = instr->RBValue();
2567 intptr_t ra_val = ra == 0 ? 0 : get_register(ra);
2568 intptr_t rb_val = get_register(rb);
2569 set_register(rt, ReadBU(ra_val + rb_val) & 0xFF);
2570 if (opcode == LBZUX) {
2571 DCHECK(ra != 0 && ra != rt);
2572 set_register(ra, ra_val + rb_val);
2578 int rt = instr->RTValue();
2579 int ra = instr->RAValue();
2580 int rb = instr->RBValue();
2581 intptr_t ra_val = ra == 0 ? 0 : get_register(ra);
2582 intptr_t rb_val = get_register(rb);
2583 set_register(rt, ReadHU(ra_val + rb_val, instr) & 0xFFFF);
2584 if (opcode == LHZUX) {
2585 DCHECK(ra != 0 && ra != rt);
2586 set_register(ra, ra_val + rb_val);
2592 int rt = instr->RTValue();
2593 int ra = instr->RAValue();
2594 int rb = instr->RBValue();
2595 intptr_t ra_val = ra == 0 ? 0 : get_register(ra);
2596 intptr_t rb_val = get_register(rb);
2597 set_register(rt, ReadH(ra_val + rb_val, instr));
2598 if (opcode == LHAUX) {
2599 DCHECK(ra != 0 && ra != rt);
2600 set_register(ra, ra_val + rb_val);
2605 // todo - simulate dcbf
2618 void Simulator::ExecuteExt2_5bit(Instruction* instr) {
2619 int opcode = instr->Bits(5, 1) << 1;
2622 int rt = instr->RTValue();
2623 int ra = instr->RAValue();
2624 int rb = instr->RBValue();
2625 int condition_bit = instr->RCValue();
2626 int condition_mask = 0x80000000 >> condition_bit;
2627 intptr_t ra_val = (ra == 0) ? 0 : get_register(ra);
2628 intptr_t rb_val = get_register(rb);
2629 intptr_t value = (condition_reg_ & condition_mask) ? ra_val : rb_val;
2630 set_register(rt, value);
2634 PrintF("Unimplemented: %08x\n", instr->InstructionBits());
2635 UNIMPLEMENTED(); // Not used by V8.
2641 void Simulator::ExecuteExt2(Instruction* instr) {
2642 // Check first the 10-1 bit versions
2643 if (ExecuteExt2_10bit(instr)) return;
2644 // Now look at the lesser encodings
2645 if (ExecuteExt2_9bit_part1(instr)) return;
2646 if (ExecuteExt2_9bit_part2(instr)) return;
2647 ExecuteExt2_5bit(instr);
2651 void Simulator::ExecuteExt4(Instruction* instr) {
2652 switch (instr->Bits(5, 1) << 1) {
2654 int frt = instr->RTValue();
2655 int fra = instr->RAValue();
2656 int frb = instr->RBValue();
2657 double fra_val = get_double_from_d_register(fra);
2658 double frb_val = get_double_from_d_register(frb);
2659 double frt_val = fra_val / frb_val;
2660 set_d_register_from_double(frt, frt_val);
2664 int frt = instr->RTValue();
2665 int fra = instr->RAValue();
2666 int frb = instr->RBValue();
2667 double fra_val = get_double_from_d_register(fra);
2668 double frb_val = get_double_from_d_register(frb);
2669 double frt_val = fra_val - frb_val;
2670 set_d_register_from_double(frt, frt_val);
2674 int frt = instr->RTValue();
2675 int fra = instr->RAValue();
2676 int frb = instr->RBValue();
2677 double fra_val = get_double_from_d_register(fra);
2678 double frb_val = get_double_from_d_register(frb);
2679 double frt_val = fra_val + frb_val;
2680 set_d_register_from_double(frt, frt_val);
2684 int frt = instr->RTValue();
2685 int frb = instr->RBValue();
2686 double frb_val = get_double_from_d_register(frb);
2687 double frt_val = fast_sqrt(frb_val);
2688 set_d_register_from_double(frt, frt_val);
2692 int frt = instr->RTValue();
2693 int fra = instr->RAValue();
2694 int frb = instr->RBValue();
2695 int frc = instr->RCValue();
2696 double fra_val = get_double_from_d_register(fra);
2697 double frb_val = get_double_from_d_register(frb);
2698 double frc_val = get_double_from_d_register(frc);
2699 double frt_val = ((fra_val >= 0.0) ? frc_val : frb_val);
2700 set_d_register_from_double(frt, frt_val);
2704 int frt = instr->RTValue();
2705 int fra = instr->RAValue();
2706 int frc = instr->RCValue();
2707 double fra_val = get_double_from_d_register(fra);
2708 double frc_val = get_double_from_d_register(frc);
2709 double frt_val = fra_val * frc_val;
2710 set_d_register_from_double(frt, frt_val);
2714 int frt = instr->RTValue();
2715 int fra = instr->RAValue();
2716 int frb = instr->RBValue();
2717 int frc = instr->RCValue();
2718 double fra_val = get_double_from_d_register(fra);
2719 double frb_val = get_double_from_d_register(frb);
2720 double frc_val = get_double_from_d_register(frc);
2721 double frt_val = (fra_val * frc_val) - frb_val;
2722 set_d_register_from_double(frt, frt_val);
2726 int frt = instr->RTValue();
2727 int fra = instr->RAValue();
2728 int frb = instr->RBValue();
2729 int frc = instr->RCValue();
2730 double fra_val = get_double_from_d_register(fra);
2731 double frb_val = get_double_from_d_register(frb);
2732 double frc_val = get_double_from_d_register(frc);
2733 double frt_val = (fra_val * frc_val) + frb_val;
2734 set_d_register_from_double(frt, frt_val);
2738 int opcode = instr->Bits(10, 1) << 1;
2741 int fra = instr->RAValue();
2742 int frb = instr->RBValue();
2743 double fra_val = get_double_from_d_register(fra);
2744 double frb_val = get_double_from_d_register(frb);
2745 int cr = instr->Bits(25, 23);
2747 if (fra_val < frb_val) {
2750 if (fra_val > frb_val) {
2753 if (fra_val == frb_val) {
2756 if (std::isunordered(fra_val, frb_val)) {
2759 int condition_mask = 0xF0000000 >> (cr * 4);
2760 int condition = bf >> (cr * 4);
2761 condition_reg_ = (condition_reg_ & ~condition_mask) | condition;
2765 int frt = instr->RTValue();
2766 int frb = instr->RBValue();
2767 double frb_val = get_double_from_d_register(frb);
2768 double frt_val = std::round(frb_val);
2769 set_d_register_from_double(frt, frt_val);
2770 if (instr->Bit(0)) { // RC bit set
2776 int frt = instr->RTValue();
2777 int frb = instr->RBValue();
2778 double frb_val = get_double_from_d_register(frb);
2779 double frt_val = std::trunc(frb_val);
2780 set_d_register_from_double(frt, frt_val);
2781 if (instr->Bit(0)) { // RC bit set
2787 int frt = instr->RTValue();
2788 int frb = instr->RBValue();
2789 double frb_val = get_double_from_d_register(frb);
2790 double frt_val = std::ceil(frb_val);
2791 set_d_register_from_double(frt, frt_val);
2792 if (instr->Bit(0)) { // RC bit set
2798 int frt = instr->RTValue();
2799 int frb = instr->RBValue();
2800 double frb_val = get_double_from_d_register(frb);
2801 double frt_val = std::floor(frb_val);
2802 set_d_register_from_double(frt, frt_val);
2803 if (instr->Bit(0)) { // RC bit set
2809 int frt = instr->RTValue();
2810 int frb = instr->RBValue();
2811 // frsp round 8-byte double-precision value to
2812 // single-precision value
2813 double frb_val = get_double_from_d_register(frb);
2814 double frt_val = static_cast<float>(frb_val);
2815 set_d_register_from_double(frt, frt_val);
2816 if (instr->Bit(0)) { // RC bit set
2822 int frt = instr->RTValue();
2823 int frb = instr->RBValue();
2824 double t_val = get_double_from_d_register(frb);
2825 int64_t* frb_val_p = reinterpret_cast<int64_t*>(&t_val);
2826 double frt_val = static_cast<double>(*frb_val_p);
2827 set_d_register_from_double(frt, frt_val);
2831 int frt = instr->RTValue();
2832 int frb = instr->RBValue();
2833 double frb_val = get_double_from_d_register(frb);
2835 int64_t one = 1; // work-around gcc
2836 int64_t kMinLongLong = (one << 63);
2837 int64_t kMaxLongLong = kMinLongLong - 1;
2839 if (frb_val > kMaxLongLong) {
2840 frt_val = kMaxLongLong;
2841 } else if (frb_val < kMinLongLong) {
2842 frt_val = kMinLongLong;
2844 switch (fp_condition_reg_ & kFPRoundingModeMask) {
2846 frt_val = (int64_t)frb_val;
2848 case kRoundToPlusInf:
2849 frt_val = (int64_t)std::ceil(frb_val);
2851 case kRoundToMinusInf:
2852 frt_val = (int64_t)std::floor(frb_val);
2855 frt_val = (int64_t)frb_val;
2856 UNIMPLEMENTED(); // Not used by V8.
2860 double* p = reinterpret_cast<double*>(&frt_val);
2861 set_d_register_from_double(frt, *p);
2865 int frt = instr->RTValue();
2866 int frb = instr->RBValue();
2867 double frb_val = get_double_from_d_register(frb);
2869 int64_t one = 1; // work-around gcc
2870 int64_t kMinLongLong = (one << 63);
2871 int64_t kMaxLongLong = kMinLongLong - 1;
2873 if (frb_val > kMaxLongLong) {
2874 frt_val = kMaxLongLong;
2875 } else if (frb_val < kMinLongLong) {
2876 frt_val = kMinLongLong;
2878 frt_val = (int64_t)frb_val;
2880 double* p = reinterpret_cast<double*>(&frt_val);
2881 set_d_register_from_double(frt, *p);
2886 int frt = instr->RTValue();
2887 int frb = instr->RBValue();
2888 double frb_val = get_double_from_d_register(frb);
2890 if (frb_val > kMaxInt) {
2892 } else if (frb_val < kMinInt) {
2895 if (opcode == FCTIWZ) {
2896 frt_val = (int64_t)frb_val;
2898 switch (fp_condition_reg_ & kFPRoundingModeMask) {
2900 frt_val = (int64_t)frb_val;
2902 case kRoundToPlusInf:
2903 frt_val = (int64_t)std::ceil(frb_val);
2905 case kRoundToMinusInf:
2906 frt_val = (int64_t)std::floor(frb_val);
2908 case kRoundToNearest:
2909 frt_val = (int64_t)lround(frb_val);
2911 // Round to even if exactly halfway. (lround rounds up)
2912 if (std::fabs(static_cast<double>(frt_val) - frb_val) == 0.5 &&
2914 frt_val += ((frt_val > 0) ? -1 : 1);
2920 frt_val = (int64_t)frb_val;
2925 double* p = reinterpret_cast<double*>(&frt_val);
2926 set_d_register_from_double(frt, *p);
2930 int frt = instr->RTValue();
2931 int frb = instr->RBValue();
2932 double frb_val = get_double_from_d_register(frb);
2933 double frt_val = -frb_val;
2934 set_d_register_from_double(frt, frt_val);
2938 int frt = instr->RTValue();
2939 int frb = instr->RBValue();
2940 int64_t frb_val = get_d_register(frb);
2941 set_d_register(frt, frb_val);
2945 int bf = instr->Bits(25, 23);
2946 int imm = instr->Bits(15, 12);
2947 int fp_condition_mask = 0xF0000000 >> (bf * 4);
2948 fp_condition_reg_ &= ~fp_condition_mask;
2949 fp_condition_reg_ |= (imm << (28 - (bf * 4)));
2950 if (instr->Bit(0)) { // RC bit set
2951 condition_reg_ &= 0xF0FFFFFF;
2952 condition_reg_ |= (imm << 23);
2957 int frb = instr->RBValue();
2958 int64_t frb_dval = get_d_register(frb);
2959 int32_t frb_ival = static_cast<int32_t>((frb_dval)&0xffffffff);
2960 int l = instr->Bits(25, 25);
2962 fp_condition_reg_ = frb_ival;
2966 if (instr->Bit(0)) { // RC bit set
2968 // int w = instr->Bits(16, 16);
2969 // int flm = instr->Bits(24, 17);
2974 int frt = instr->RTValue();
2975 int64_t lval = static_cast<int64_t>(fp_condition_reg_);
2976 set_d_register(frt, lval);
2980 int frt = instr->RTValue();
2981 int frb = instr->RBValue();
2982 double frb_val = get_double_from_d_register(frb);
2983 double frt_val = std::fabs(frb_val);
2984 set_d_register_from_double(frt, frt_val);
2988 UNIMPLEMENTED(); // Not used by V8.
2991 #if V8_TARGET_ARCH_PPC64
2992 void Simulator::ExecuteExt5(Instruction* instr) {
2993 switch (instr->Bits(4, 2) << 2) {
2995 int ra = instr->RAValue();
2996 int rs = instr->RSValue();
2997 uintptr_t rs_val = get_register(rs);
2998 int sh = (instr->Bits(15, 11) | (instr->Bit(1) << 5));
2999 int mb = (instr->Bits(10, 6) | (instr->Bit(5) << 5));
3000 DCHECK(sh >= 0 && sh <= 63);
3001 DCHECK(mb >= 0 && mb <= 63);
3002 uintptr_t result = base::bits::RotateLeft64(rs_val, sh);
3003 uintptr_t mask = 0xffffffffffffffff >> mb;
3005 set_register(ra, result);
3006 if (instr->Bit(0)) { // RC bit set
3012 int ra = instr->RAValue();
3013 int rs = instr->RSValue();
3014 uintptr_t rs_val = get_register(rs);
3015 int sh = (instr->Bits(15, 11) | (instr->Bit(1) << 5));
3016 int me = (instr->Bits(10, 6) | (instr->Bit(5) << 5));
3017 DCHECK(sh >= 0 && sh <= 63);
3018 DCHECK(me >= 0 && me <= 63);
3019 uintptr_t result = base::bits::RotateLeft64(rs_val, sh);
3020 uintptr_t mask = 0xffffffffffffffff << (63 - me);
3022 set_register(ra, result);
3023 if (instr->Bit(0)) { // RC bit set
3029 int ra = instr->RAValue();
3030 int rs = instr->RSValue();
3031 uintptr_t rs_val = get_register(rs);
3032 int sh = (instr->Bits(15, 11) | (instr->Bit(1) << 5));
3033 int mb = (instr->Bits(10, 6) | (instr->Bit(5) << 5));
3034 DCHECK(sh >= 0 && sh <= 63);
3035 DCHECK(mb >= 0 && mb <= 63);
3036 uintptr_t result = base::bits::RotateLeft64(rs_val, sh);
3037 uintptr_t mask = (0xffffffffffffffff >> mb) & (0xffffffffffffffff << sh);
3039 set_register(ra, result);
3040 if (instr->Bit(0)) { // RC bit set
3046 int ra = instr->RAValue();
3047 int rs = instr->RSValue();
3048 uintptr_t rs_val = get_register(rs);
3049 intptr_t ra_val = get_register(ra);
3050 int sh = (instr->Bits(15, 11) | (instr->Bit(1) << 5));
3051 int mb = (instr->Bits(10, 6) | (instr->Bit(5) << 5));
3053 uintptr_t result = base::bits::RotateLeft64(rs_val, sh);
3056 uintptr_t bit = 0x8000000000000000 >> mb;
3057 for (; mb <= me; mb++) {
3061 } else if (mb == me + 1) {
3062 mask = 0xffffffffffffffff;
3063 } else { // mb > me+1
3064 uintptr_t bit = 0x8000000000000000 >> (me + 1); // needs to be tested
3065 mask = 0xffffffffffffffff;
3066 for (; me < mb; me++) {
3074 set_register(ra, result);
3075 if (instr->Bit(0)) { // RC bit set
3081 switch (instr->Bits(4, 1) << 1) {
3083 int ra = instr->RAValue();
3084 int rs = instr->RSValue();
3085 int rb = instr->RBValue();
3086 uintptr_t rs_val = get_register(rs);
3087 uintptr_t rb_val = get_register(rb);
3088 int sh = (rb_val & 0x3f);
3089 int mb = (instr->Bits(10, 6) | (instr->Bit(5) << 5));
3090 DCHECK(sh >= 0 && sh <= 63);
3091 DCHECK(mb >= 0 && mb <= 63);
3092 uintptr_t result = base::bits::RotateLeft64(rs_val, sh);
3093 uintptr_t mask = 0xffffffffffffffff >> mb;
3095 set_register(ra, result);
3096 if (instr->Bit(0)) { // RC bit set
3102 UNIMPLEMENTED(); // Not used by V8.
3107 void Simulator::ExecuteGeneric(Instruction* instr) {
3108 int opcode = instr->OpcodeValue() << 26;
3111 int rt = instr->RTValue();
3112 int ra = instr->RAValue();
3113 intptr_t ra_val = get_register(ra);
3114 int32_t im_val = instr->Bits(15, 0);
3115 im_val = SIGN_EXT_IMM16(im_val);
3116 intptr_t alu_out = im_val - ra_val;
3117 set_register(rt, alu_out);
3118 // todo - handle RC bit
3122 int ra = instr->RAValue();
3123 uint32_t im_val = instr->Bits(15, 0);
3124 int cr = instr->Bits(25, 23);
3126 #if V8_TARGET_ARCH_PPC64
3127 int L = instr->Bit(21);
3130 uintptr_t ra_val = get_register(ra);
3131 if (ra_val < im_val) {
3134 if (ra_val > im_val) {
3137 if (ra_val == im_val) {
3140 #if V8_TARGET_ARCH_PPC64
3142 uint32_t ra_val = get_register(ra);
3143 if (ra_val < im_val) {
3146 if (ra_val > im_val) {
3149 if (ra_val == im_val) {
3154 uint32_t condition_mask = 0xF0000000U >> (cr * 4);
3155 uint32_t condition = bf >> (cr * 4);
3156 condition_reg_ = (condition_reg_ & ~condition_mask) | condition;
3160 int ra = instr->RAValue();
3161 int32_t im_val = instr->Bits(15, 0);
3162 im_val = SIGN_EXT_IMM16(im_val);
3163 int cr = instr->Bits(25, 23);
3165 #if V8_TARGET_ARCH_PPC64
3166 int L = instr->Bit(21);
3169 intptr_t ra_val = get_register(ra);
3170 if (ra_val < im_val) {
3173 if (ra_val > im_val) {
3176 if (ra_val == im_val) {
3179 #if V8_TARGET_ARCH_PPC64
3181 int32_t ra_val = get_register(ra);
3182 if (ra_val < im_val) {
3185 if (ra_val > im_val) {
3188 if (ra_val == im_val) {
3193 uint32_t condition_mask = 0xF0000000U >> (cr * 4);
3194 uint32_t condition = bf >> (cr * 4);
3195 condition_reg_ = (condition_reg_ & ~condition_mask) | condition;
3199 int rt = instr->RTValue();
3200 int ra = instr->RAValue();
3201 uintptr_t ra_val = get_register(ra);
3202 uintptr_t im_val = SIGN_EXT_IMM16(instr->Bits(15, 0));
3203 uintptr_t alu_out = ra_val + im_val;
3205 if (~ra_val < im_val) {
3206 special_reg_xer_ = (special_reg_xer_ & ~0xF0000000) | 0x20000000;
3208 special_reg_xer_ &= ~0xF0000000;
3210 set_register(rt, alu_out);
3214 int rt = instr->RTValue();
3215 int ra = instr->RAValue();
3216 int32_t im_val = SIGN_EXT_IMM16(instr->Bits(15, 0));
3221 intptr_t ra_val = get_register(ra);
3222 alu_out = ra_val + im_val;
3224 set_register(rt, alu_out);
3225 // todo - handle RC bit
3229 int rt = instr->RTValue();
3230 int ra = instr->RAValue();
3231 int32_t im_val = (instr->Bits(15, 0) << 16);
3233 if (ra == 0) { // treat r0 as zero
3236 intptr_t ra_val = get_register(ra);
3237 alu_out = ra_val + im_val;
3239 set_register(rt, alu_out);
3243 ExecuteBranchConditional(instr);
3247 int offset = (instr->Bits(25, 2) << 8) >> 6;
3248 if (instr->Bit(0) == 1) { // LK flag set
3249 special_reg_lr_ = get_pc() + 4;
3251 set_pc(get_pc() + offset);
3260 int ra = instr->RAValue();
3261 int rs = instr->RSValue();
3262 uint32_t rs_val = get_register(rs);
3263 int32_t ra_val = get_register(ra);
3264 int sh = instr->Bits(15, 11);
3265 int mb = instr->Bits(10, 6);
3266 int me = instr->Bits(5, 1);
3267 uint32_t result = base::bits::RotateLeft32(rs_val, sh);
3270 int bit = 0x80000000 >> mb;
3271 for (; mb <= me; mb++) {
3275 } else if (mb == me + 1) {
3277 } else { // mb > me+1
3278 int bit = 0x80000000 >> (me + 1); // needs to be tested
3280 for (; me < mb; me++) {
3288 set_register(ra, result);
3289 if (instr->Bit(0)) { // RC bit set
3296 int ra = instr->RAValue();
3297 int rs = instr->RSValue();
3298 uint32_t rs_val = get_register(rs);
3300 if (opcode == RLWINMX) {
3301 sh = instr->Bits(15, 11);
3303 int rb = instr->RBValue();
3304 uint32_t rb_val = get_register(rb);
3305 sh = (rb_val & 0x1f);
3307 int mb = instr->Bits(10, 6);
3308 int me = instr->Bits(5, 1);
3309 uint32_t result = base::bits::RotateLeft32(rs_val, sh);
3312 int bit = 0x80000000 >> mb;
3313 for (; mb <= me; mb++) {
3317 } else if (mb == me + 1) {
3319 } else { // mb > me+1
3320 int bit = 0x80000000 >> (me + 1); // needs to be tested
3322 for (; me < mb; me++) {
3328 set_register(ra, result);
3329 if (instr->Bit(0)) { // RC bit set
3335 int rs = instr->RSValue();
3336 int ra = instr->RAValue();
3337 intptr_t rs_val = get_register(rs);
3338 uint32_t im_val = instr->Bits(15, 0);
3339 intptr_t alu_out = rs_val | im_val;
3340 set_register(ra, alu_out);
3344 int rs = instr->RSValue();
3345 int ra = instr->RAValue();
3346 intptr_t rs_val = get_register(rs);
3347 uint32_t im_val = instr->Bits(15, 0);
3348 intptr_t alu_out = rs_val | (im_val << 16);
3349 set_register(ra, alu_out);
3353 int rs = instr->RSValue();
3354 int ra = instr->RAValue();
3355 intptr_t rs_val = get_register(rs);
3356 uint32_t im_val = instr->Bits(15, 0);
3357 intptr_t alu_out = rs_val ^ im_val;
3358 set_register(ra, alu_out);
3359 // todo - set condition based SO bit
3363 int rs = instr->RSValue();
3364 int ra = instr->RAValue();
3365 intptr_t rs_val = get_register(rs);
3366 uint32_t im_val = instr->Bits(15, 0);
3367 intptr_t alu_out = rs_val ^ (im_val << 16);
3368 set_register(ra, alu_out);
3372 int rs = instr->RSValue();
3373 int ra = instr->RAValue();
3374 intptr_t rs_val = get_register(rs);
3375 uint32_t im_val = instr->Bits(15, 0);
3376 intptr_t alu_out = rs_val & im_val;
3377 set_register(ra, alu_out);
3382 int rs = instr->RSValue();
3383 int ra = instr->RAValue();
3384 intptr_t rs_val = get_register(rs);
3385 uint32_t im_val = instr->Bits(15, 0);
3386 intptr_t alu_out = rs_val & (im_val << 16);
3387 set_register(ra, alu_out);
3398 int ra = instr->RAValue();
3399 int rt = instr->RTValue();
3400 intptr_t ra_val = ra == 0 ? 0 : get_register(ra);
3401 int offset = SIGN_EXT_IMM16(instr->Bits(15, 0));
3402 set_register(rt, ReadWU(ra_val + offset, instr));
3403 if (opcode == LWZU) {
3405 set_register(ra, ra_val + offset);
3412 int ra = instr->RAValue();
3413 int rt = instr->RTValue();
3414 intptr_t ra_val = ra == 0 ? 0 : get_register(ra);
3415 int offset = SIGN_EXT_IMM16(instr->Bits(15, 0));
3416 set_register(rt, ReadB(ra_val + offset) & 0xFF);
3417 if (opcode == LBZU) {
3419 set_register(ra, ra_val + offset);
3426 int ra = instr->RAValue();
3427 int rs = instr->RSValue();
3428 intptr_t ra_val = ra == 0 ? 0 : get_register(ra);
3429 int32_t rs_val = get_register(rs);
3430 int offset = SIGN_EXT_IMM16(instr->Bits(15, 0));
3431 WriteW(ra_val + offset, rs_val, instr);
3432 if (opcode == STWU) {
3434 set_register(ra, ra_val + offset);
3436 // printf("r%d %08x -> %08x\n", rs, rs_val, offset); // 0xdead
3442 int ra = instr->RAValue();
3443 int rs = instr->RSValue();
3444 intptr_t ra_val = ra == 0 ? 0 : get_register(ra);
3445 int8_t rs_val = get_register(rs);
3446 int offset = SIGN_EXT_IMM16(instr->Bits(15, 0));
3447 WriteB(ra_val + offset, rs_val);
3448 if (opcode == STBU) {
3450 set_register(ra, ra_val + offset);
3457 int ra = instr->RAValue();
3458 int rt = instr->RTValue();
3459 intptr_t ra_val = ra == 0 ? 0 : get_register(ra);
3460 int offset = SIGN_EXT_IMM16(instr->Bits(15, 0));
3461 uintptr_t result = ReadHU(ra_val + offset, instr) & 0xffff;
3462 set_register(rt, result);
3463 if (opcode == LHZU) {
3464 set_register(ra, ra_val + offset);
3471 int ra = instr->RAValue();
3472 int rt = instr->RTValue();
3473 intptr_t ra_val = ra == 0 ? 0 : get_register(ra);
3474 int offset = SIGN_EXT_IMM16(instr->Bits(15, 0));
3475 intptr_t result = ReadH(ra_val + offset, instr);
3476 set_register(rt, result);
3477 if (opcode == LHAU) {
3478 set_register(ra, ra_val + offset);
3485 int ra = instr->RAValue();
3486 int rs = instr->RSValue();
3487 intptr_t ra_val = ra == 0 ? 0 : get_register(ra);
3488 int16_t rs_val = get_register(rs);
3489 int offset = SIGN_EXT_IMM16(instr->Bits(15, 0));
3490 WriteH(ra_val + offset, rs_val, instr);
3491 if (opcode == STHU) {
3493 set_register(ra, ra_val + offset);
3506 int frt = instr->RTValue();
3507 int ra = instr->RAValue();
3508 int32_t offset = SIGN_EXT_IMM16(instr->Bits(15, 0));
3509 intptr_t ra_val = ra == 0 ? 0 : get_register(ra);
3510 int32_t val = ReadW(ra_val + offset, instr);
3511 float* fptr = reinterpret_cast<float*>(&val);
3512 set_d_register_from_double(frt, static_cast<double>(*fptr));
3513 if (opcode == LFSU) {
3515 set_register(ra, ra_val + offset);
3522 int frt = instr->RTValue();
3523 int ra = instr->RAValue();
3524 int32_t offset = SIGN_EXT_IMM16(instr->Bits(15, 0));
3525 intptr_t ra_val = ra == 0 ? 0 : get_register(ra);
3526 int64_t* dptr = reinterpret_cast<int64_t*>(ReadDW(ra_val + offset));
3527 set_d_register(frt, *dptr);
3528 if (opcode == LFDU) {
3530 set_register(ra, ra_val + offset);
3537 int frs = instr->RSValue();
3538 int ra = instr->RAValue();
3539 int32_t offset = SIGN_EXT_IMM16(instr->Bits(15, 0));
3540 intptr_t ra_val = ra == 0 ? 0 : get_register(ra);
3541 float frs_val = static_cast<float>(get_double_from_d_register(frs));
3542 int32_t* p = reinterpret_cast<int32_t*>(&frs_val);
3543 WriteW(ra_val + offset, *p, instr);
3544 if (opcode == STFSU) {
3546 set_register(ra, ra_val + offset);
3553 int frs = instr->RSValue();
3554 int ra = instr->RAValue();
3555 int32_t offset = SIGN_EXT_IMM16(instr->Bits(15, 0));
3556 intptr_t ra_val = ra == 0 ? 0 : get_register(ra);
3557 int64_t frs_val = get_d_register(frs);
3558 WriteDW(ra_val + offset, frs_val);
3559 if (opcode == STFDU) {
3561 set_register(ra, ra_val + offset);
3573 #if V8_TARGET_ARCH_PPC64
3579 int ra = instr->RAValue();
3580 int rt = instr->RTValue();
3581 int64_t ra_val = ra == 0 ? 0 : get_register(ra);
3582 int offset = SIGN_EXT_IMM16(instr->Bits(15, 0) & ~3);
3583 switch (instr->Bits(1, 0)) {
3585 intptr_t* result = ReadDW(ra_val + offset);
3586 set_register(rt, *result);
3590 intptr_t* result = ReadDW(ra_val + offset);
3591 set_register(rt, *result);
3593 set_register(ra, ra_val + offset);
3597 intptr_t result = ReadW(ra_val + offset, instr);
3598 set_register(rt, result);
3606 int ra = instr->RAValue();
3607 int rs = instr->RSValue();
3608 int64_t ra_val = ra == 0 ? 0 : get_register(ra);
3609 int64_t rs_val = get_register(rs);
3610 int offset = SIGN_EXT_IMM16(instr->Bits(15, 0) & ~3);
3611 WriteDW(ra_val + offset, rs_val);
3612 if (instr->Bit(0) == 1) { // This is the STDU form
3614 set_register(ra, ra_val + offset);
3628 void Simulator::Trace(Instruction* instr) {
3629 disasm::NameConverter converter;
3630 disasm::Disassembler dasm(converter);
3631 // use a reasonably large buffer
3632 v8::internal::EmbeddedVector<char, 256> buffer;
3633 dasm.InstructionDecode(buffer, reinterpret_cast<byte*>(instr));
3634 PrintF("%05d %08" V8PRIxPTR " %s\n", icount_,
3635 reinterpret_cast<intptr_t>(instr), buffer.start());
3639 // Executes the current instruction.
3640 void Simulator::ExecuteInstruction(Instruction* instr) {
3641 if (v8::internal::FLAG_check_icache) {
3642 CheckICache(isolate_->simulator_i_cache(), instr);
3644 pc_modified_ = false;
3645 if (::v8::internal::FLAG_trace_sim) {
3648 int opcode = instr->OpcodeValue() << 26;
3649 if (opcode == TWI) {
3650 SoftwareInterrupt(instr);
3652 ExecuteGeneric(instr);
3654 if (!pc_modified_) {
3655 set_pc(reinterpret_cast<intptr_t>(instr) + Instruction::kInstrSize);
3660 void Simulator::Execute() {
3661 // Get the PC to simulate. Cannot use the accessor here as we need the
3662 // raw PC value and not the one used as input to arithmetic instructions.
3663 intptr_t program_counter = get_pc();
3665 if (::v8::internal::FLAG_stop_sim_at == 0) {
3666 // Fast version of the dispatch loop without checking whether the simulator
3667 // should be stopping at a particular executed instruction.
3668 while (program_counter != end_sim_pc) {
3669 Instruction* instr = reinterpret_cast<Instruction*>(program_counter);
3671 ExecuteInstruction(instr);
3672 program_counter = get_pc();
3675 // FLAG_stop_sim_at is at the non-default value. Stop in the debugger when
3676 // we reach the particular instuction count.
3677 while (program_counter != end_sim_pc) {
3678 Instruction* instr = reinterpret_cast<Instruction*>(program_counter);
3680 if (icount_ == ::v8::internal::FLAG_stop_sim_at) {
3681 PPCDebugger dbg(this);
3684 ExecuteInstruction(instr);
3686 program_counter = get_pc();
3692 void Simulator::CallInternal(byte* entry) {
3693 // Prepare to execute the code at entry
3694 #if ABI_USES_FUNCTION_DESCRIPTORS
3695 // entry is the function descriptor
3696 set_pc(*(reinterpret_cast<intptr_t*>(entry)));
3698 // entry is the instruction address
3699 set_pc(reinterpret_cast<intptr_t>(entry));
3702 // Put down marker for end of simulation. The simulator will stop simulation
3703 // when the PC reaches this value. By saving the "end simulation" value into
3704 // the LR the simulation stops when returning to this call point.
3705 special_reg_lr_ = end_sim_pc;
3707 // Remember the values of non-volatile registers.
3708 intptr_t r2_val = get_register(r2);
3709 intptr_t r13_val = get_register(r13);
3710 intptr_t r14_val = get_register(r14);
3711 intptr_t r15_val = get_register(r15);
3712 intptr_t r16_val = get_register(r16);
3713 intptr_t r17_val = get_register(r17);
3714 intptr_t r18_val = get_register(r18);
3715 intptr_t r19_val = get_register(r19);
3716 intptr_t r20_val = get_register(r20);
3717 intptr_t r21_val = get_register(r21);
3718 intptr_t r22_val = get_register(r22);
3719 intptr_t r23_val = get_register(r23);
3720 intptr_t r24_val = get_register(r24);
3721 intptr_t r25_val = get_register(r25);
3722 intptr_t r26_val = get_register(r26);
3723 intptr_t r27_val = get_register(r27);
3724 intptr_t r28_val = get_register(r28);
3725 intptr_t r29_val = get_register(r29);
3726 intptr_t r30_val = get_register(r30);
3727 intptr_t r31_val = get_register(fp);
3729 // Set up the non-volatile registers with a known value. To be able to check
3730 // that they are preserved properly across JS execution.
3731 intptr_t callee_saved_value = icount_;
3732 set_register(r2, callee_saved_value);
3733 set_register(r13, callee_saved_value);
3734 set_register(r14, callee_saved_value);
3735 set_register(r15, callee_saved_value);
3736 set_register(r16, callee_saved_value);
3737 set_register(r17, callee_saved_value);
3738 set_register(r18, callee_saved_value);
3739 set_register(r19, callee_saved_value);
3740 set_register(r20, callee_saved_value);
3741 set_register(r21, callee_saved_value);
3742 set_register(r22, callee_saved_value);
3743 set_register(r23, callee_saved_value);
3744 set_register(r24, callee_saved_value);
3745 set_register(r25, callee_saved_value);
3746 set_register(r26, callee_saved_value);
3747 set_register(r27, callee_saved_value);
3748 set_register(r28, callee_saved_value);
3749 set_register(r29, callee_saved_value);
3750 set_register(r30, callee_saved_value);
3751 set_register(fp, callee_saved_value);
3753 // Start the simulation
3756 // Check that the non-volatile registers have been preserved.
3757 CHECK_EQ(callee_saved_value, get_register(r2));
3758 CHECK_EQ(callee_saved_value, get_register(r13));
3759 CHECK_EQ(callee_saved_value, get_register(r14));
3760 CHECK_EQ(callee_saved_value, get_register(r15));
3761 CHECK_EQ(callee_saved_value, get_register(r16));
3762 CHECK_EQ(callee_saved_value, get_register(r17));
3763 CHECK_EQ(callee_saved_value, get_register(r18));
3764 CHECK_EQ(callee_saved_value, get_register(r19));
3765 CHECK_EQ(callee_saved_value, get_register(r20));
3766 CHECK_EQ(callee_saved_value, get_register(r21));
3767 CHECK_EQ(callee_saved_value, get_register(r22));
3768 CHECK_EQ(callee_saved_value, get_register(r23));
3769 CHECK_EQ(callee_saved_value, get_register(r24));
3770 CHECK_EQ(callee_saved_value, get_register(r25));
3771 CHECK_EQ(callee_saved_value, get_register(r26));
3772 CHECK_EQ(callee_saved_value, get_register(r27));
3773 CHECK_EQ(callee_saved_value, get_register(r28));
3774 CHECK_EQ(callee_saved_value, get_register(r29));
3775 CHECK_EQ(callee_saved_value, get_register(r30));
3776 CHECK_EQ(callee_saved_value, get_register(fp));
3778 // Restore non-volatile registers with the original value.
3779 set_register(r2, r2_val);
3780 set_register(r13, r13_val);
3781 set_register(r14, r14_val);
3782 set_register(r15, r15_val);
3783 set_register(r16, r16_val);
3784 set_register(r17, r17_val);
3785 set_register(r18, r18_val);
3786 set_register(r19, r19_val);
3787 set_register(r20, r20_val);
3788 set_register(r21, r21_val);
3789 set_register(r22, r22_val);
3790 set_register(r23, r23_val);
3791 set_register(r24, r24_val);
3792 set_register(r25, r25_val);
3793 set_register(r26, r26_val);
3794 set_register(r27, r27_val);
3795 set_register(r28, r28_val);
3796 set_register(r29, r29_val);
3797 set_register(r30, r30_val);
3798 set_register(fp, r31_val);
3802 intptr_t Simulator::Call(byte* entry, int argument_count, ...) {
3804 va_start(parameters, argument_count);
3807 // First eight arguments passed in registers r3-r10.
3808 int reg_arg_count = (argument_count > 8) ? 8 : argument_count;
3809 int stack_arg_count = argument_count - reg_arg_count;
3810 for (int i = 0; i < reg_arg_count; i++) {
3811 set_register(i + 3, va_arg(parameters, intptr_t));
3814 // Remaining arguments passed on stack.
3815 intptr_t original_stack = get_register(sp);
3816 // Compute position of stack on entry to generated code.
3817 intptr_t entry_stack =
3819 (kNumRequiredStackFrameSlots + stack_arg_count) * sizeof(intptr_t));
3820 if (base::OS::ActivationFrameAlignment() != 0) {
3821 entry_stack &= -base::OS::ActivationFrameAlignment();
3823 // Store remaining arguments on stack, from low to high memory.
3824 // +2 is a hack for the LR slot + old SP on PPC
3825 intptr_t* stack_argument =
3826 reinterpret_cast<intptr_t*>(entry_stack) + kStackFrameExtraParamSlot;
3827 for (int i = 0; i < stack_arg_count; i++) {
3828 stack_argument[i] = va_arg(parameters, intptr_t);
3831 set_register(sp, entry_stack);
3833 CallInternal(entry);
3835 // Pop stack passed arguments.
3836 CHECK_EQ(entry_stack, get_register(sp));
3837 set_register(sp, original_stack);
3839 intptr_t result = get_register(r3);
3844 void Simulator::CallFP(byte* entry, double d0, double d1) {
3845 set_d_register_from_double(1, d0);
3846 set_d_register_from_double(2, d1);
3847 CallInternal(entry);
3851 int32_t Simulator::CallFPReturnsInt(byte* entry, double d0, double d1) {
3852 CallFP(entry, d0, d1);
3853 int32_t result = get_register(r3);
3858 double Simulator::CallFPReturnsDouble(byte* entry, double d0, double d1) {
3859 CallFP(entry, d0, d1);
3860 return get_double_from_d_register(1);
3864 uintptr_t Simulator::PushAddress(uintptr_t address) {
3865 uintptr_t new_sp = get_register(sp) - sizeof(uintptr_t);
3866 uintptr_t* stack_slot = reinterpret_cast<uintptr_t*>(new_sp);
3867 *stack_slot = address;
3868 set_register(sp, new_sp);
3873 uintptr_t Simulator::PopAddress() {
3874 uintptr_t current_sp = get_register(sp);
3875 uintptr_t* stack_slot = reinterpret_cast<uintptr_t*>(current_sp);
3876 uintptr_t address = *stack_slot;
3877 set_register(sp, current_sp + sizeof(uintptr_t));
3881 } // namespace v8::internal
3883 #endif // USE_SIMULATOR
3884 #endif // V8_TARGET_ARCH_PPC