1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file.
11 #if V8_TARGET_ARCH_PPC
13 #include "src/assembler.h"
14 #include "src/codegen.h"
15 #include "src/disasm.h"
16 #include "src/ppc/constants-ppc.h"
17 #include "src/ppc/frames-ppc.h"
18 #include "src/ppc/simulator-ppc.h"
20 #if defined(USE_SIMULATOR)
22 // Only build the simulator if not compiling for real PPC hardware.
26 // This macro provides a platform independent use of sscanf. The reason for
27 // SScanF not being implemented in a platform independent way through
28 // ::v8::internal::OS in the same way as SNPrintF is that the
29 // Windows C Run-Time Library does not provide vsscanf.
30 #define SScanF sscanf // NOLINT
32 // The PPCDebugger class is used by the simulator while debugging simulated
36 explicit PPCDebugger(Simulator* sim) : sim_(sim) {}
39 void Stop(Instruction* instr);
43 static const Instr kBreakpointInstr = (TWI | 0x1f * B21);
44 static const Instr kNopInstr = (ORI); // ori, 0,0,0
48 intptr_t GetRegisterValue(int regnum);
49 double GetRegisterPairDoubleValue(int regnum);
50 double GetFPDoubleRegisterValue(int regnum);
51 bool GetValue(const char* desc, intptr_t* value);
52 bool GetFPDoubleValue(const char* desc, double* value);
54 // Set or delete a breakpoint. Returns true if successful.
55 bool SetBreakpoint(Instruction* break_pc);
56 bool DeleteBreakpoint(Instruction* break_pc);
58 // Undo and redo all breakpoints. This is needed to bracket disassembly and
59 // execution to skip past breakpoints when run from the debugger.
60 void UndoBreakpoints();
61 void RedoBreakpoints();
65 PPCDebugger::~PPCDebugger() {}
68 #ifdef GENERATED_CODE_COVERAGE
69 static FILE* coverage_log = NULL;
72 static void InitializeCoverage() {
73 char* file_name = getenv("V8_GENERATED_CODE_COVERAGE_LOG");
74 if (file_name != NULL) {
75 coverage_log = fopen(file_name, "aw+");
80 void PPCDebugger::Stop(Instruction* instr) {
82 uint32_t code = instr->SvcValue() & kStopCodeMask;
83 // Retrieve the encoded address, which comes just after this stop.
85 reinterpret_cast<char**>(sim_->get_pc() + Instruction::kInstrSize);
86 char* msg = *msg_address;
89 // Update this stop description.
90 if (isWatchedStop(code) && !watched_stops_[code].desc) {
91 watched_stops_[code].desc = msg;
94 if (strlen(msg) > 0) {
95 if (coverage_log != NULL) {
96 fprintf(coverage_log, "%s\n", msg);
99 // Overwrite the instruction and address with nops.
100 instr->SetInstructionBits(kNopInstr);
101 reinterpret_cast<Instruction*>(msg_address)->SetInstructionBits(kNopInstr);
103 sim_->set_pc(sim_->get_pc() + Instruction::kInstrSize + kPointerSize);
106 #else // ndef GENERATED_CODE_COVERAGE
108 static void InitializeCoverage() {}
111 void PPCDebugger::Stop(Instruction* instr) {
112 // Get the stop code.
113 // use of kStopCodeMask not right on PowerPC
114 uint32_t code = instr->SvcValue() & kStopCodeMask;
115 // Retrieve the encoded address, which comes just after this stop.
117 *reinterpret_cast<char**>(sim_->get_pc() + Instruction::kInstrSize);
118 // Update this stop description.
119 if (sim_->isWatchedStop(code) && !sim_->watched_stops_[code].desc) {
120 sim_->watched_stops_[code].desc = msg;
122 // Print the stop message and code if it is not the default code.
123 if (code != kMaxStopCode) {
124 PrintF("Simulator hit stop %u: %s\n", code, msg);
126 PrintF("Simulator hit %s\n", msg);
128 sim_->set_pc(sim_->get_pc() + Instruction::kInstrSize + kPointerSize);
134 intptr_t PPCDebugger::GetRegisterValue(int regnum) {
135 return sim_->get_register(regnum);
139 double PPCDebugger::GetRegisterPairDoubleValue(int regnum) {
140 return sim_->get_double_from_register_pair(regnum);
144 double PPCDebugger::GetFPDoubleRegisterValue(int regnum) {
145 return sim_->get_double_from_d_register(regnum);
149 bool PPCDebugger::GetValue(const char* desc, intptr_t* value) {
150 int regnum = Registers::Number(desc);
151 if (regnum != kNoRegister) {
152 *value = GetRegisterValue(regnum);
155 if (strncmp(desc, "0x", 2) == 0) {
156 return SScanF(desc + 2, "%" V8PRIxPTR,
157 reinterpret_cast<uintptr_t*>(value)) == 1;
159 return SScanF(desc, "%" V8PRIuPTR, reinterpret_cast<uintptr_t*>(value)) ==
167 bool PPCDebugger::GetFPDoubleValue(const char* desc, double* value) {
168 int regnum = FPRegisters::Number(desc);
169 if (regnum != kNoRegister) {
170 *value = sim_->get_double_from_d_register(regnum);
177 bool PPCDebugger::SetBreakpoint(Instruction* break_pc) {
178 // Check if a breakpoint can be set. If not return without any side-effects.
179 if (sim_->break_pc_ != NULL) {
183 // Set the breakpoint.
184 sim_->break_pc_ = break_pc;
185 sim_->break_instr_ = break_pc->InstructionBits();
186 // Not setting the breakpoint instruction in the code itself. It will be set
187 // when the debugger shell continues.
192 bool PPCDebugger::DeleteBreakpoint(Instruction* break_pc) {
193 if (sim_->break_pc_ != NULL) {
194 sim_->break_pc_->SetInstructionBits(sim_->break_instr_);
197 sim_->break_pc_ = NULL;
198 sim_->break_instr_ = 0;
203 void PPCDebugger::UndoBreakpoints() {
204 if (sim_->break_pc_ != NULL) {
205 sim_->break_pc_->SetInstructionBits(sim_->break_instr_);
210 void PPCDebugger::RedoBreakpoints() {
211 if (sim_->break_pc_ != NULL) {
212 sim_->break_pc_->SetInstructionBits(kBreakpointInstr);
217 void PPCDebugger::Debug() {
218 intptr_t last_pc = -1;
221 #define COMMAND_SIZE 63
225 #define XSTR(a) STR(a)
227 char cmd[COMMAND_SIZE + 1];
228 char arg1[ARG_SIZE + 1];
229 char arg2[ARG_SIZE + 1];
230 char* argv[3] = {cmd, arg1, arg2};
232 // make sure to have a proper terminating character if reaching the limit
233 cmd[COMMAND_SIZE] = 0;
237 // Undo all set breakpoints while running in the debugger shell. This will
238 // make them invisible to all commands.
240 // Disable tracing while simulating
241 bool trace = ::v8::internal::FLAG_trace_sim;
242 ::v8::internal::FLAG_trace_sim = false;
244 while (!done && !sim_->has_bad_pc()) {
245 if (last_pc != sim_->get_pc()) {
246 disasm::NameConverter converter;
247 disasm::Disassembler dasm(converter);
248 // use a reasonably large buffer
249 v8::internal::EmbeddedVector<char, 256> buffer;
250 dasm.InstructionDecode(buffer, reinterpret_cast<byte*>(sim_->get_pc()));
251 PrintF(" 0x%08" V8PRIxPTR " %s\n", sim_->get_pc(), buffer.start());
252 last_pc = sim_->get_pc();
254 char* line = ReadLine("sim> ");
258 char* last_input = sim_->last_debugger_input();
259 if (strcmp(line, "\n") == 0 && last_input != NULL) {
262 // Ownership is transferred to sim_;
263 sim_->set_last_debugger_input(line);
265 // Use sscanf to parse the individual parts of the command line. At the
266 // moment no command expects more than two parameters.
267 int argc = SScanF(line,
268 "%" XSTR(COMMAND_SIZE) "s "
269 "%" XSTR(ARG_SIZE) "s "
270 "%" XSTR(ARG_SIZE) "s",
272 if ((strcmp(cmd, "si") == 0) || (strcmp(cmd, "stepi") == 0)) {
275 // If at a breakpoint, proceed past it.
276 if ((reinterpret_cast<Instruction*>(sim_->get_pc()))
277 ->InstructionBits() == 0x7d821008) {
278 sim_->set_pc(sim_->get_pc() + Instruction::kInstrSize);
280 sim_->ExecuteInstruction(
281 reinterpret_cast<Instruction*>(sim_->get_pc()));
284 if (argc == 2 && last_pc != sim_->get_pc() && GetValue(arg1, &value)) {
285 for (int i = 1; i < value; i++) {
286 disasm::NameConverter converter;
287 disasm::Disassembler dasm(converter);
288 // use a reasonably large buffer
289 v8::internal::EmbeddedVector<char, 256> buffer;
290 dasm.InstructionDecode(buffer,
291 reinterpret_cast<byte*>(sim_->get_pc()));
292 PrintF(" 0x%08" V8PRIxPTR " %s\n", sim_->get_pc(),
294 sim_->ExecuteInstruction(
295 reinterpret_cast<Instruction*>(sim_->get_pc()));
298 } else if ((strcmp(cmd, "c") == 0) || (strcmp(cmd, "cont") == 0)) {
299 // If at a breakpoint, proceed past it.
300 if ((reinterpret_cast<Instruction*>(sim_->get_pc()))
301 ->InstructionBits() == 0x7d821008) {
302 sim_->set_pc(sim_->get_pc() + Instruction::kInstrSize);
304 // Execute the one instruction we broke at with breakpoints disabled.
305 sim_->ExecuteInstruction(
306 reinterpret_cast<Instruction*>(sim_->get_pc()));
308 // Leave the debugger shell.
310 } else if ((strcmp(cmd, "p") == 0) || (strcmp(cmd, "print") == 0)) {
311 if (argc == 2 || (argc == 3 && strcmp(arg2, "fp") == 0)) {
314 if (strcmp(arg1, "all") == 0) {
315 for (int i = 0; i < kNumRegisters; i++) {
316 value = GetRegisterValue(i);
317 PrintF(" %3s: %08" V8PRIxPTR, Registers::Name(i), value);
318 if ((argc == 3 && strcmp(arg2, "fp") == 0) && i < 8 &&
320 dvalue = GetRegisterPairDoubleValue(i);
321 PrintF(" (%f)\n", dvalue);
322 } else if (i != 0 && !((i + 1) & 3)) {
326 PrintF(" pc: %08" V8PRIxPTR " lr: %08" V8PRIxPTR
328 "ctr: %08" V8PRIxPTR " xer: %08x cr: %08x\n",
329 sim_->special_reg_pc_, sim_->special_reg_lr_,
330 sim_->special_reg_ctr_, sim_->special_reg_xer_,
331 sim_->condition_reg_);
332 } else if (strcmp(arg1, "alld") == 0) {
333 for (int i = 0; i < kNumRegisters; i++) {
334 value = GetRegisterValue(i);
335 PrintF(" %3s: %08" V8PRIxPTR " %11" V8PRIdPTR,
336 Registers::Name(i), value, value);
337 if ((argc == 3 && strcmp(arg2, "fp") == 0) && i < 8 &&
339 dvalue = GetRegisterPairDoubleValue(i);
340 PrintF(" (%f)\n", dvalue);
341 } else if (!((i + 1) % 2)) {
345 PrintF(" pc: %08" V8PRIxPTR " lr: %08" V8PRIxPTR
347 "ctr: %08" V8PRIxPTR " xer: %08x cr: %08x\n",
348 sim_->special_reg_pc_, sim_->special_reg_lr_,
349 sim_->special_reg_ctr_, sim_->special_reg_xer_,
350 sim_->condition_reg_);
351 } else if (strcmp(arg1, "allf") == 0) {
352 for (int i = 0; i < DoubleRegister::kNumRegisters; i++) {
353 dvalue = GetFPDoubleRegisterValue(i);
354 uint64_t as_words = bit_cast<uint64_t>(dvalue);
355 PrintF("%3s: %f 0x%08x %08x\n", FPRegisters::Name(i), dvalue,
356 static_cast<uint32_t>(as_words >> 32),
357 static_cast<uint32_t>(as_words & 0xffffffff));
359 } else if (arg1[0] == 'r' &&
360 (arg1[1] >= '0' && arg1[1] <= '9' &&
361 (arg1[2] == '\0' || (arg1[2] >= '0' && arg1[2] <= '9' &&
362 arg1[3] == '\0')))) {
363 int regnum = strtoul(&arg1[1], 0, 10);
364 if (regnum != kNoRegister) {
365 value = GetRegisterValue(regnum);
366 PrintF("%s: 0x%08" V8PRIxPTR " %" V8PRIdPTR "\n", arg1, value,
369 PrintF("%s unrecognized\n", arg1);
372 if (GetValue(arg1, &value)) {
373 PrintF("%s: 0x%08" V8PRIxPTR " %" V8PRIdPTR "\n", arg1, value,
375 } else if (GetFPDoubleValue(arg1, &dvalue)) {
376 uint64_t as_words = bit_cast<uint64_t>(dvalue);
377 PrintF("%s: %f 0x%08x %08x\n", arg1, dvalue,
378 static_cast<uint32_t>(as_words >> 32),
379 static_cast<uint32_t>(as_words & 0xffffffff));
381 PrintF("%s unrecognized\n", arg1);
385 PrintF("print <register>\n");
387 } else if ((strcmp(cmd, "po") == 0) ||
388 (strcmp(cmd, "printobject") == 0)) {
392 if (GetValue(arg1, &value)) {
393 Object* obj = reinterpret_cast<Object*>(value);
394 os << arg1 << ": \n";
399 os << Brief(obj) << "\n";
402 os << arg1 << " unrecognized\n";
405 PrintF("printobject <value>\n");
407 } else if (strcmp(cmd, "setpc") == 0) {
410 if (!GetValue(arg1, &value)) {
411 PrintF("%s unrecognized\n", arg1);
415 } else if (strcmp(cmd, "stack") == 0 || strcmp(cmd, "mem") == 0) {
416 intptr_t* cur = NULL;
417 intptr_t* end = NULL;
420 if (strcmp(cmd, "stack") == 0) {
421 cur = reinterpret_cast<intptr_t*>(sim_->get_register(Simulator::sp));
424 if (!GetValue(arg1, &value)) {
425 PrintF("%s unrecognized\n", arg1);
428 cur = reinterpret_cast<intptr_t*>(value);
432 intptr_t words; // likely inaccurate variable name for 64bit
433 if (argc == next_arg) {
436 if (!GetValue(argv[next_arg], &words)) {
443 PrintF(" 0x%08" V8PRIxPTR ": 0x%08" V8PRIxPTR " %10" V8PRIdPTR,
444 reinterpret_cast<intptr_t>(cur), *cur, *cur);
445 HeapObject* obj = reinterpret_cast<HeapObject*>(*cur);
446 intptr_t value = *cur;
447 Heap* current_heap = v8::internal::Isolate::Current()->heap();
448 if (((value & 1) == 0) || current_heap->Contains(obj)) {
450 if ((value & 1) == 0) {
451 PrintF("smi %d", PlatformSmiTagging::SmiToInt(obj));
460 } else if (strcmp(cmd, "disasm") == 0 || strcmp(cmd, "di") == 0) {
461 disasm::NameConverter converter;
462 disasm::Disassembler dasm(converter);
463 // use a reasonably large buffer
464 v8::internal::EmbeddedVector<char, 256> buffer;
471 cur = reinterpret_cast<byte*>(sim_->get_pc());
472 end = cur + (10 * Instruction::kInstrSize);
473 } else if (argc == 2) {
474 int regnum = Registers::Number(arg1);
475 if (regnum != kNoRegister || strncmp(arg1, "0x", 2) == 0) {
476 // The argument is an address or a register name.
478 if (GetValue(arg1, &value)) {
479 cur = reinterpret_cast<byte*>(value);
480 // Disassemble 10 instructions at <arg1>.
481 end = cur + (10 * Instruction::kInstrSize);
484 // The argument is the number of instructions.
486 if (GetValue(arg1, &value)) {
487 cur = reinterpret_cast<byte*>(sim_->get_pc());
488 // Disassemble <arg1> instructions.
489 end = cur + (value * Instruction::kInstrSize);
495 if (GetValue(arg1, &value1) && GetValue(arg2, &value2)) {
496 cur = reinterpret_cast<byte*>(value1);
497 end = cur + (value2 * Instruction::kInstrSize);
503 cur += dasm.InstructionDecode(buffer, cur);
504 PrintF(" 0x%08" V8PRIxPTR " %s\n", reinterpret_cast<intptr_t>(prev),
507 } else if (strcmp(cmd, "gdb") == 0) {
508 PrintF("relinquishing control to gdb\n");
509 v8::base::OS::DebugBreak();
510 PrintF("regaining control from gdb\n");
511 } else if (strcmp(cmd, "break") == 0) {
514 if (GetValue(arg1, &value)) {
515 if (!SetBreakpoint(reinterpret_cast<Instruction*>(value))) {
516 PrintF("setting breakpoint failed\n");
519 PrintF("%s unrecognized\n", arg1);
522 PrintF("break <address>\n");
524 } else if (strcmp(cmd, "del") == 0) {
525 if (!DeleteBreakpoint(NULL)) {
526 PrintF("deleting breakpoint failed\n");
528 } else if (strcmp(cmd, "cr") == 0) {
529 PrintF("Condition reg: %08x\n", sim_->condition_reg_);
530 } else if (strcmp(cmd, "lr") == 0) {
531 PrintF("Link reg: %08" V8PRIxPTR "\n", sim_->special_reg_lr_);
532 } else if (strcmp(cmd, "ctr") == 0) {
533 PrintF("Ctr reg: %08" V8PRIxPTR "\n", sim_->special_reg_ctr_);
534 } else if (strcmp(cmd, "xer") == 0) {
535 PrintF("XER: %08x\n", sim_->special_reg_xer_);
536 } else if (strcmp(cmd, "fpscr") == 0) {
537 PrintF("FPSCR: %08x\n", sim_->fp_condition_reg_);
538 } else if (strcmp(cmd, "stop") == 0) {
541 sim_->get_pc() - (Instruction::kInstrSize + kPointerSize);
542 Instruction* stop_instr = reinterpret_cast<Instruction*>(stop_pc);
543 Instruction* msg_address =
544 reinterpret_cast<Instruction*>(stop_pc + Instruction::kInstrSize);
545 if ((argc == 2) && (strcmp(arg1, "unstop") == 0)) {
546 // Remove the current stop.
547 if (sim_->isStopInstruction(stop_instr)) {
548 stop_instr->SetInstructionBits(kNopInstr);
549 msg_address->SetInstructionBits(kNopInstr);
551 PrintF("Not at debugger stop.\n");
553 } else if (argc == 3) {
554 // Print information about all/the specified breakpoint(s).
555 if (strcmp(arg1, "info") == 0) {
556 if (strcmp(arg2, "all") == 0) {
557 PrintF("Stop information:\n");
558 for (uint32_t i = 0; i < sim_->kNumOfWatchedStops; i++) {
559 sim_->PrintStopInfo(i);
561 } else if (GetValue(arg2, &value)) {
562 sim_->PrintStopInfo(value);
564 PrintF("Unrecognized argument.\n");
566 } else if (strcmp(arg1, "enable") == 0) {
567 // Enable all/the specified breakpoint(s).
568 if (strcmp(arg2, "all") == 0) {
569 for (uint32_t i = 0; i < sim_->kNumOfWatchedStops; i++) {
572 } else if (GetValue(arg2, &value)) {
573 sim_->EnableStop(value);
575 PrintF("Unrecognized argument.\n");
577 } else if (strcmp(arg1, "disable") == 0) {
578 // Disable all/the specified breakpoint(s).
579 if (strcmp(arg2, "all") == 0) {
580 for (uint32_t i = 0; i < sim_->kNumOfWatchedStops; i++) {
581 sim_->DisableStop(i);
583 } else if (GetValue(arg2, &value)) {
584 sim_->DisableStop(value);
586 PrintF("Unrecognized argument.\n");
590 PrintF("Wrong usage. Use help command for more information.\n");
592 } else if ((strcmp(cmd, "t") == 0) || strcmp(cmd, "trace") == 0) {
593 ::v8::internal::FLAG_trace_sim = !::v8::internal::FLAG_trace_sim;
594 PrintF("Trace of executed instructions is %s\n",
595 ::v8::internal::FLAG_trace_sim ? "on" : "off");
596 } else if ((strcmp(cmd, "h") == 0) || (strcmp(cmd, "help") == 0)) {
598 PrintF(" continue execution (alias 'c')\n");
599 PrintF("stepi [num instructions]\n");
600 PrintF(" step one/num instruction(s) (alias 'si')\n");
601 PrintF("print <register>\n");
602 PrintF(" print register content (alias 'p')\n");
603 PrintF(" use register name 'all' to display all integer registers\n");
605 " use register name 'alld' to display integer registers "
606 "with decimal values\n");
607 PrintF(" use register name 'rN' to display register number 'N'\n");
608 PrintF(" add argument 'fp' to print register pair double values\n");
610 " use register name 'allf' to display floating-point "
612 PrintF("printobject <register>\n");
613 PrintF(" print an object from a register (alias 'po')\n");
615 PrintF(" print condition register\n");
617 PrintF(" print link register\n");
619 PrintF(" print ctr register\n");
621 PrintF(" print XER\n");
623 PrintF(" print FPSCR\n");
624 PrintF("stack [<num words>]\n");
625 PrintF(" dump stack content, default dump 10 words)\n");
626 PrintF("mem <address> [<num words>]\n");
627 PrintF(" dump memory content, default dump 10 words)\n");
628 PrintF("disasm [<instructions>]\n");
629 PrintF("disasm [<address/register>]\n");
630 PrintF("disasm [[<address/register>] <instructions>]\n");
631 PrintF(" disassemble code, default is 10 instructions\n");
632 PrintF(" from pc (alias 'di')\n");
634 PrintF(" enter gdb\n");
635 PrintF("break <address>\n");
636 PrintF(" set a break point on the address\n");
638 PrintF(" delete the breakpoint\n");
639 PrintF("trace (alias 't')\n");
640 PrintF(" toogle the tracing of all executed statements\n");
641 PrintF("stop feature:\n");
642 PrintF(" Description:\n");
643 PrintF(" Stops are debug instructions inserted by\n");
644 PrintF(" the Assembler::stop() function.\n");
645 PrintF(" When hitting a stop, the Simulator will\n");
646 PrintF(" stop and and give control to the PPCDebugger.\n");
647 PrintF(" The first %d stop codes are watched:\n",
648 Simulator::kNumOfWatchedStops);
649 PrintF(" - They can be enabled / disabled: the Simulator\n");
650 PrintF(" will / won't stop when hitting them.\n");
651 PrintF(" - The Simulator keeps track of how many times they \n");
652 PrintF(" are met. (See the info command.) Going over a\n");
653 PrintF(" disabled stop still increases its counter. \n");
654 PrintF(" Commands:\n");
655 PrintF(" stop info all/<code> : print infos about number <code>\n");
656 PrintF(" or all stop(s).\n");
657 PrintF(" stop enable/disable all/<code> : enables / disables\n");
658 PrintF(" all or number <code> stop(s)\n");
659 PrintF(" stop unstop\n");
660 PrintF(" ignore the stop instruction at the current location\n");
661 PrintF(" from now on\n");
663 PrintF("Unknown command: %s\n", cmd);
668 // Add all the breakpoints back to stop execution and enter the debugger
672 ::v8::internal::FLAG_trace_sim = trace;
682 static bool ICacheMatch(void* one, void* two) {
683 DCHECK((reinterpret_cast<intptr_t>(one) & CachePage::kPageMask) == 0);
684 DCHECK((reinterpret_cast<intptr_t>(two) & CachePage::kPageMask) == 0);
689 static uint32_t ICacheHash(void* key) {
690 return static_cast<uint32_t>(reinterpret_cast<uintptr_t>(key)) >> 2;
694 static bool AllOnOnePage(uintptr_t start, int size) {
695 intptr_t start_page = (start & ~CachePage::kPageMask);
696 intptr_t end_page = ((start + size) & ~CachePage::kPageMask);
697 return start_page == end_page;
701 void Simulator::set_last_debugger_input(char* input) {
702 DeleteArray(last_debugger_input_);
703 last_debugger_input_ = input;
707 void Simulator::FlushICache(v8::internal::HashMap* i_cache, void* start_addr,
709 intptr_t start = reinterpret_cast<intptr_t>(start_addr);
710 int intra_line = (start & CachePage::kLineMask);
713 size = ((size - 1) | CachePage::kLineMask) + 1;
714 int offset = (start & CachePage::kPageMask);
715 while (!AllOnOnePage(start, size - 1)) {
716 int bytes_to_flush = CachePage::kPageSize - offset;
717 FlushOnePage(i_cache, start, bytes_to_flush);
718 start += bytes_to_flush;
719 size -= bytes_to_flush;
720 DCHECK_EQ(0, static_cast<int>(start & CachePage::kPageMask));
724 FlushOnePage(i_cache, start, size);
729 CachePage* Simulator::GetCachePage(v8::internal::HashMap* i_cache, void* page) {
730 v8::internal::HashMap::Entry* entry =
731 i_cache->Lookup(page, ICacheHash(page), true);
732 if (entry->value == NULL) {
733 CachePage* new_page = new CachePage();
734 entry->value = new_page;
736 return reinterpret_cast<CachePage*>(entry->value);
740 // Flush from start up to and not including start + size.
741 void Simulator::FlushOnePage(v8::internal::HashMap* i_cache, intptr_t start,
743 DCHECK(size <= CachePage::kPageSize);
744 DCHECK(AllOnOnePage(start, size - 1));
745 DCHECK((start & CachePage::kLineMask) == 0);
746 DCHECK((size & CachePage::kLineMask) == 0);
747 void* page = reinterpret_cast<void*>(start & (~CachePage::kPageMask));
748 int offset = (start & CachePage::kPageMask);
749 CachePage* cache_page = GetCachePage(i_cache, page);
750 char* valid_bytemap = cache_page->ValidityByte(offset);
751 memset(valid_bytemap, CachePage::LINE_INVALID, size >> CachePage::kLineShift);
755 void Simulator::CheckICache(v8::internal::HashMap* i_cache,
756 Instruction* instr) {
757 intptr_t address = reinterpret_cast<intptr_t>(instr);
758 void* page = reinterpret_cast<void*>(address & (~CachePage::kPageMask));
759 void* line = reinterpret_cast<void*>(address & (~CachePage::kLineMask));
760 int offset = (address & CachePage::kPageMask);
761 CachePage* cache_page = GetCachePage(i_cache, page);
762 char* cache_valid_byte = cache_page->ValidityByte(offset);
763 bool cache_hit = (*cache_valid_byte == CachePage::LINE_VALID);
764 char* cached_line = cache_page->CachedData(offset & ~CachePage::kLineMask);
766 // Check that the data in memory matches the contents of the I-cache.
768 memcmp(reinterpret_cast<void*>(instr),
769 cache_page->CachedData(offset), Instruction::kInstrSize));
771 // Cache miss. Load memory into the cache.
772 memcpy(cached_line, line, CachePage::kLineLength);
773 *cache_valid_byte = CachePage::LINE_VALID;
778 void Simulator::Initialize(Isolate* isolate) {
779 if (isolate->simulator_initialized()) return;
780 isolate->set_simulator_initialized(true);
781 ::v8::internal::ExternalReference::set_redirector(isolate,
782 &RedirectExternalReference);
786 Simulator::Simulator(Isolate* isolate) : isolate_(isolate) {
787 i_cache_ = isolate_->simulator_i_cache();
788 if (i_cache_ == NULL) {
789 i_cache_ = new v8::internal::HashMap(&ICacheMatch);
790 isolate_->set_simulator_i_cache(i_cache_);
793 // Set up simulator support first. Some of this information is needed to
794 // setup the architecture state.
795 #if V8_TARGET_ARCH_PPC64
796 size_t stack_size = 2 * 1024 * 1024; // allocate 2MB for stack
798 size_t stack_size = 1 * 1024 * 1024; // allocate 1MB for stack
800 stack_ = reinterpret_cast<char*>(malloc(stack_size));
801 pc_modified_ = false;
806 // Set up architecture state.
807 // All registers are initialized to zero to start with.
808 for (int i = 0; i < kNumGPRs; i++) {
812 fp_condition_reg_ = 0;
815 special_reg_ctr_ = 0;
817 // Initializing FP registers.
818 for (int i = 0; i < kNumFPRs; i++) {
819 fp_registers_[i] = 0.0;
822 // The sp is initialized to point to the bottom (high address) of the
823 // allocated stack area. To be safe in potential stack underflows we leave
824 // some buffer below.
825 registers_[sp] = reinterpret_cast<intptr_t>(stack_) + stack_size - 64;
826 InitializeCoverage();
828 last_debugger_input_ = NULL;
832 Simulator::~Simulator() {}
835 // When the generated code calls an external reference we need to catch that in
836 // the simulator. The external reference will be a function compiled for the
837 // host architecture. We need to call that function instead of trying to
838 // execute it with the simulator. We do that by redirecting the external
839 // reference to a svc (Supervisor Call) instruction that is handled by
840 // the simulator. We write the original destination of the jump just at a known
841 // offset from the svc instruction so the simulator knows what to call.
844 Redirection(void* external_function, ExternalReference::Type type)
845 : external_function_(external_function),
846 swi_instruction_(rtCallRedirInstr | kCallRtRedirected),
849 Isolate* isolate = Isolate::Current();
850 next_ = isolate->simulator_redirection();
851 Simulator::current(isolate)->FlushICache(
852 isolate->simulator_i_cache(),
853 reinterpret_cast<void*>(&swi_instruction_), Instruction::kInstrSize);
854 isolate->set_simulator_redirection(this);
857 void* address_of_swi_instruction() {
858 return reinterpret_cast<void*>(&swi_instruction_);
861 void* external_function() { return external_function_; }
862 ExternalReference::Type type() { return type_; }
864 static Redirection* Get(void* external_function,
865 ExternalReference::Type type) {
866 Isolate* isolate = Isolate::Current();
867 Redirection* current = isolate->simulator_redirection();
868 for (; current != NULL; current = current->next_) {
869 if (current->external_function_ == external_function) {
870 DCHECK_EQ(current->type(), type);
874 return new Redirection(external_function, type);
877 static Redirection* FromSwiInstruction(Instruction* swi_instruction) {
878 char* addr_of_swi = reinterpret_cast<char*>(swi_instruction);
879 char* addr_of_redirection =
880 addr_of_swi - OFFSET_OF(Redirection, swi_instruction_);
881 return reinterpret_cast<Redirection*>(addr_of_redirection);
884 static void* ReverseRedirection(intptr_t reg) {
885 Redirection* redirection = FromSwiInstruction(
886 reinterpret_cast<Instruction*>(reinterpret_cast<void*>(reg)));
887 return redirection->external_function();
891 void* external_function_;
892 uint32_t swi_instruction_;
893 ExternalReference::Type type_;
898 void* Simulator::RedirectExternalReference(void* external_function,
899 ExternalReference::Type type) {
900 Redirection* redirection = Redirection::Get(external_function, type);
901 return redirection->address_of_swi_instruction();
905 // Get the active Simulator for the current thread.
906 Simulator* Simulator::current(Isolate* isolate) {
907 v8::internal::Isolate::PerIsolateThreadData* isolate_data =
908 isolate->FindOrAllocatePerThreadDataForThisThread();
909 DCHECK(isolate_data != NULL);
911 Simulator* sim = isolate_data->simulator();
913 // TODO(146): delete the simulator object when a thread/isolate goes away.
914 sim = new Simulator(isolate);
915 isolate_data->set_simulator(sim);
921 // Sets the register in the architecture state.
922 void Simulator::set_register(int reg, intptr_t value) {
923 DCHECK((reg >= 0) && (reg < kNumGPRs));
924 registers_[reg] = value;
928 // Get the register from the architecture state.
929 intptr_t Simulator::get_register(int reg) const {
930 DCHECK((reg >= 0) && (reg < kNumGPRs));
931 // Stupid code added to avoid bug in GCC.
932 // See: http://gcc.gnu.org/bugzilla/show_bug.cgi?id=43949
933 if (reg >= kNumGPRs) return 0;
935 return registers_[reg];
939 double Simulator::get_double_from_register_pair(int reg) {
940 DCHECK((reg >= 0) && (reg < kNumGPRs) && ((reg % 2) == 0));
943 #if !V8_TARGET_ARCH_PPC64 // doesn't make sense in 64bit mode
944 // Read the bits from the unsigned integer register_[] array
945 // into the double precision floating point value and return it.
946 char buffer[sizeof(fp_registers_[0])];
947 memcpy(buffer, ®isters_[reg], 2 * sizeof(registers_[0]));
948 memcpy(&dm_val, buffer, 2 * sizeof(registers_[0]));
954 // Raw access to the PC register.
955 void Simulator::set_pc(intptr_t value) {
957 special_reg_pc_ = value;
961 bool Simulator::has_bad_pc() const {
962 return ((special_reg_pc_ == bad_lr) || (special_reg_pc_ == end_sim_pc));
966 // Raw access to the PC register without the special adjustment when reading.
967 intptr_t Simulator::get_pc() const { return special_reg_pc_; }
970 // Runtime FP routines take:
971 // - two double arguments
972 // - one double argument and zero or one integer arguments.
973 // All are consructed here from d1, d2 and r3.
974 void Simulator::GetFpArgs(double* x, double* y, intptr_t* z) {
975 *x = get_double_from_d_register(1);
976 *y = get_double_from_d_register(2);
977 *z = get_register(3);
981 // The return value is in d1.
982 void Simulator::SetFpResult(const double& result) {
983 set_d_register_from_double(1, result);
987 void Simulator::TrashCallerSaveRegisters() {
988 // We don't trash the registers with the return value.
989 #if 0 // A good idea to trash volatile registers, needs to be done
990 registers_[2] = 0x50Bad4U;
991 registers_[3] = 0x50Bad4U;
992 registers_[12] = 0x50Bad4U;
997 uint32_t Simulator::ReadWU(intptr_t addr, Instruction* instr) {
998 uint32_t* ptr = reinterpret_cast<uint32_t*>(addr);
1003 int32_t Simulator::ReadW(intptr_t addr, Instruction* instr) {
1004 int32_t* ptr = reinterpret_cast<int32_t*>(addr);
1009 void Simulator::WriteW(intptr_t addr, uint32_t value, Instruction* instr) {
1010 uint32_t* ptr = reinterpret_cast<uint32_t*>(addr);
1016 void Simulator::WriteW(intptr_t addr, int32_t value, Instruction* instr) {
1017 int32_t* ptr = reinterpret_cast<int32_t*>(addr);
1023 uint16_t Simulator::ReadHU(intptr_t addr, Instruction* instr) {
1024 uint16_t* ptr = reinterpret_cast<uint16_t*>(addr);
1029 int16_t Simulator::ReadH(intptr_t addr, Instruction* instr) {
1030 int16_t* ptr = reinterpret_cast<int16_t*>(addr);
1035 void Simulator::WriteH(intptr_t addr, uint16_t value, Instruction* instr) {
1036 uint16_t* ptr = reinterpret_cast<uint16_t*>(addr);
1042 void Simulator::WriteH(intptr_t addr, int16_t value, Instruction* instr) {
1043 int16_t* ptr = reinterpret_cast<int16_t*>(addr);
1049 uint8_t Simulator::ReadBU(intptr_t addr) {
1050 uint8_t* ptr = reinterpret_cast<uint8_t*>(addr);
1055 int8_t Simulator::ReadB(intptr_t addr) {
1056 int8_t* ptr = reinterpret_cast<int8_t*>(addr);
1061 void Simulator::WriteB(intptr_t addr, uint8_t value) {
1062 uint8_t* ptr = reinterpret_cast<uint8_t*>(addr);
1067 void Simulator::WriteB(intptr_t addr, int8_t value) {
1068 int8_t* ptr = reinterpret_cast<int8_t*>(addr);
1073 intptr_t* Simulator::ReadDW(intptr_t addr) {
1074 intptr_t* ptr = reinterpret_cast<intptr_t*>(addr);
1079 void Simulator::WriteDW(intptr_t addr, int64_t value) {
1080 int64_t* ptr = reinterpret_cast<int64_t*>(addr);
1086 // Returns the limit of the stack area to enable checking for stack overflows.
1087 uintptr_t Simulator::StackLimit() const {
1088 // Leave a safety margin of 1024 bytes to prevent overrunning the stack when
1090 return reinterpret_cast<uintptr_t>(stack_) + 1024;
1094 // Unsupported instructions use Format to print an error and stop execution.
1095 void Simulator::Format(Instruction* instr, const char* format) {
1096 PrintF("Simulator found unsupported instruction:\n 0x%08" V8PRIxPTR ": %s\n",
1097 reinterpret_cast<intptr_t>(instr), format);
1102 // Calculate C flag value for additions.
1103 bool Simulator::CarryFrom(int32_t left, int32_t right, int32_t carry) {
1104 uint32_t uleft = static_cast<uint32_t>(left);
1105 uint32_t uright = static_cast<uint32_t>(right);
1106 uint32_t urest = 0xffffffffU - uleft;
1108 return (uright > urest) ||
1109 (carry && (((uright + 1) > urest) || (uright > (urest - 1))));
1113 // Calculate C flag value for subtractions.
1114 bool Simulator::BorrowFrom(int32_t left, int32_t right) {
1115 uint32_t uleft = static_cast<uint32_t>(left);
1116 uint32_t uright = static_cast<uint32_t>(right);
1118 return (uright > uleft);
1122 // Calculate V flag value for additions and subtractions.
1123 bool Simulator::OverflowFrom(int32_t alu_out, int32_t left, int32_t right,
1127 // operands have the same sign
1128 overflow = ((left >= 0 && right >= 0) || (left < 0 && right < 0))
1129 // and operands and result have different sign
1131 ((left < 0 && alu_out >= 0) || (left >= 0 && alu_out < 0));
1133 // operands have different signs
1134 overflow = ((left < 0 && right >= 0) || (left >= 0 && right < 0))
1135 // and first operand and result have different signs
1137 ((left < 0 && alu_out >= 0) || (left >= 0 && alu_out < 0));
1143 #if V8_TARGET_ARCH_PPC64
1150 static void decodeObjectPair(ObjectPair* pair, intptr_t* x, intptr_t* y) {
1155 typedef uint64_t ObjectPair;
1158 static void decodeObjectPair(ObjectPair* pair, intptr_t* x, intptr_t* y) {
1159 #if V8_TARGET_BIG_ENDIAN
1160 *x = static_cast<int32_t>(*pair >> 32);
1161 *y = static_cast<int32_t>(*pair);
1163 *x = static_cast<int32_t>(*pair);
1164 *y = static_cast<int32_t>(*pair >> 32);
1169 // Calls into the V8 runtime are based on this very simple interface.
1170 // Note: To be able to return two values from some calls the code in
1171 // runtime.cc uses the ObjectPair which is essentially two pointer
1172 // values stuffed into a structure. With the code below we assume that
1173 // all runtime calls return this pair. If they don't, the r4 result
1174 // register contains a bogus value, which is fine because it is
1176 typedef ObjectPair (*SimulatorRuntimeCall)(intptr_t arg0, intptr_t arg1,
1177 intptr_t arg2, intptr_t arg3,
1178 intptr_t arg4, intptr_t arg5);
1180 // These prototypes handle the four types of FP calls.
1181 typedef int (*SimulatorRuntimeCompareCall)(double darg0, double darg1);
1182 typedef double (*SimulatorRuntimeFPFPCall)(double darg0, double darg1);
1183 typedef double (*SimulatorRuntimeFPCall)(double darg0);
1184 typedef double (*SimulatorRuntimeFPIntCall)(double darg0, intptr_t arg0);
1186 // This signature supports direct call in to API function native callback
1187 // (refer to InvocationCallback in v8.h).
1188 typedef void (*SimulatorRuntimeDirectApiCall)(intptr_t arg0);
1189 typedef void (*SimulatorRuntimeProfilingApiCall)(intptr_t arg0, void* arg1);
1191 // This signature supports direct call to accessor getter callback.
1192 typedef void (*SimulatorRuntimeDirectGetterCall)(intptr_t arg0, intptr_t arg1);
1193 typedef void (*SimulatorRuntimeProfilingGetterCall)(intptr_t arg0,
1194 intptr_t arg1, void* arg2);
1196 // Software interrupt instructions are used by the simulator to call into the
1197 // C-based V8 runtime.
1198 void Simulator::SoftwareInterrupt(Instruction* instr) {
1199 int svc = instr->SvcValue();
1201 case kCallRtRedirected: {
1202 // Check if stack is aligned. Error if not aligned is reported below to
1203 // include information on the function called.
1204 bool stack_aligned =
1205 (get_register(sp) & (::v8::internal::FLAG_sim_stack_alignment - 1)) ==
1207 Redirection* redirection = Redirection::FromSwiInstruction(instr);
1208 const int kArgCount = 6;
1209 int arg0_regnum = 3;
1210 #if !ABI_RETURNS_OBJECT_PAIRS_IN_REGS
1211 intptr_t result_buffer = 0;
1212 if (redirection->type() == ExternalReference::BUILTIN_OBJECTPAIR_CALL) {
1213 result_buffer = get_register(r3);
1217 intptr_t arg[kArgCount];
1218 for (int i = 0; i < kArgCount; i++) {
1219 arg[i] = get_register(arg0_regnum + i);
1222 (redirection->type() == ExternalReference::BUILTIN_FP_FP_CALL) ||
1223 (redirection->type() == ExternalReference::BUILTIN_COMPARE_CALL) ||
1224 (redirection->type() == ExternalReference::BUILTIN_FP_CALL) ||
1225 (redirection->type() == ExternalReference::BUILTIN_FP_INT_CALL);
1226 // This is dodgy but it works because the C entry stubs are never moved.
1227 // See comment in codegen-arm.cc and bug 1242173.
1228 intptr_t saved_lr = special_reg_lr_;
1230 reinterpret_cast<intptr_t>(redirection->external_function());
1232 double dval0, dval1; // one or two double parameters
1233 intptr_t ival; // zero or one integer parameters
1234 int iresult = 0; // integer return value
1235 double dresult = 0; // double return value
1236 GetFpArgs(&dval0, &dval1, &ival);
1237 if (::v8::internal::FLAG_trace_sim || !stack_aligned) {
1238 SimulatorRuntimeCall generic_target =
1239 reinterpret_cast<SimulatorRuntimeCall>(external);
1240 switch (redirection->type()) {
1241 case ExternalReference::BUILTIN_FP_FP_CALL:
1242 case ExternalReference::BUILTIN_COMPARE_CALL:
1243 PrintF("Call to host function at %p with args %f, %f",
1244 FUNCTION_ADDR(generic_target), dval0, dval1);
1246 case ExternalReference::BUILTIN_FP_CALL:
1247 PrintF("Call to host function at %p with arg %f",
1248 FUNCTION_ADDR(generic_target), dval0);
1250 case ExternalReference::BUILTIN_FP_INT_CALL:
1251 PrintF("Call to host function at %p with args %f, %" V8PRIdPTR,
1252 FUNCTION_ADDR(generic_target), dval0, ival);
1258 if (!stack_aligned) {
1259 PrintF(" with unaligned stack %08" V8PRIxPTR "\n",
1264 CHECK(stack_aligned);
1265 switch (redirection->type()) {
1266 case ExternalReference::BUILTIN_COMPARE_CALL: {
1267 SimulatorRuntimeCompareCall target =
1268 reinterpret_cast<SimulatorRuntimeCompareCall>(external);
1269 iresult = target(dval0, dval1);
1270 set_register(r3, iresult);
1273 case ExternalReference::BUILTIN_FP_FP_CALL: {
1274 SimulatorRuntimeFPFPCall target =
1275 reinterpret_cast<SimulatorRuntimeFPFPCall>(external);
1276 dresult = target(dval0, dval1);
1277 SetFpResult(dresult);
1280 case ExternalReference::BUILTIN_FP_CALL: {
1281 SimulatorRuntimeFPCall target =
1282 reinterpret_cast<SimulatorRuntimeFPCall>(external);
1283 dresult = target(dval0);
1284 SetFpResult(dresult);
1287 case ExternalReference::BUILTIN_FP_INT_CALL: {
1288 SimulatorRuntimeFPIntCall target =
1289 reinterpret_cast<SimulatorRuntimeFPIntCall>(external);
1290 dresult = target(dval0, ival);
1291 SetFpResult(dresult);
1298 if (::v8::internal::FLAG_trace_sim || !stack_aligned) {
1299 switch (redirection->type()) {
1300 case ExternalReference::BUILTIN_COMPARE_CALL:
1301 PrintF("Returned %08x\n", iresult);
1303 case ExternalReference::BUILTIN_FP_FP_CALL:
1304 case ExternalReference::BUILTIN_FP_CALL:
1305 case ExternalReference::BUILTIN_FP_INT_CALL:
1306 PrintF("Returned %f\n", dresult);
1313 } else if (redirection->type() == ExternalReference::DIRECT_API_CALL) {
1314 // See callers of MacroAssembler::CallApiFunctionAndReturn for
1315 // explanation of register usage.
1316 if (::v8::internal::FLAG_trace_sim || !stack_aligned) {
1317 PrintF("Call to host function at %p args %08" V8PRIxPTR,
1318 reinterpret_cast<void*>(external), arg[0]);
1319 if (!stack_aligned) {
1320 PrintF(" with unaligned stack %08" V8PRIxPTR "\n",
1325 CHECK(stack_aligned);
1326 SimulatorRuntimeDirectApiCall target =
1327 reinterpret_cast<SimulatorRuntimeDirectApiCall>(external);
1329 } else if (redirection->type() == ExternalReference::PROFILING_API_CALL) {
1330 // See callers of MacroAssembler::CallApiFunctionAndReturn for
1331 // explanation of register usage.
1332 if (::v8::internal::FLAG_trace_sim || !stack_aligned) {
1333 PrintF("Call to host function at %p args %08" V8PRIxPTR
1335 reinterpret_cast<void*>(external), arg[0], arg[1]);
1336 if (!stack_aligned) {
1337 PrintF(" with unaligned stack %08" V8PRIxPTR "\n",
1342 CHECK(stack_aligned);
1343 SimulatorRuntimeProfilingApiCall target =
1344 reinterpret_cast<SimulatorRuntimeProfilingApiCall>(external);
1345 target(arg[0], Redirection::ReverseRedirection(arg[1]));
1346 } else if (redirection->type() == ExternalReference::DIRECT_GETTER_CALL) {
1347 // See callers of MacroAssembler::CallApiFunctionAndReturn for
1348 // explanation of register usage.
1349 if (::v8::internal::FLAG_trace_sim || !stack_aligned) {
1350 PrintF("Call to host function at %p args %08" V8PRIxPTR
1352 reinterpret_cast<void*>(external), arg[0], arg[1]);
1353 if (!stack_aligned) {
1354 PrintF(" with unaligned stack %08" V8PRIxPTR "\n",
1359 CHECK(stack_aligned);
1360 SimulatorRuntimeDirectGetterCall target =
1361 reinterpret_cast<SimulatorRuntimeDirectGetterCall>(external);
1362 #if !ABI_PASSES_HANDLES_IN_REGS
1363 arg[0] = *(reinterpret_cast<intptr_t*>(arg[0]));
1365 target(arg[0], arg[1]);
1366 } else if (redirection->type() ==
1367 ExternalReference::PROFILING_GETTER_CALL) {
1368 if (::v8::internal::FLAG_trace_sim || !stack_aligned) {
1369 PrintF("Call to host function at %p args %08" V8PRIxPTR
1370 " %08" V8PRIxPTR " %08" V8PRIxPTR,
1371 reinterpret_cast<void*>(external), arg[0], arg[1], arg[2]);
1372 if (!stack_aligned) {
1373 PrintF(" with unaligned stack %08" V8PRIxPTR "\n",
1378 CHECK(stack_aligned);
1379 SimulatorRuntimeProfilingGetterCall target =
1380 reinterpret_cast<SimulatorRuntimeProfilingGetterCall>(external);
1381 #if !ABI_PASSES_HANDLES_IN_REGS
1382 arg[0] = *(reinterpret_cast<intptr_t*>(arg[0]));
1384 target(arg[0], arg[1], Redirection::ReverseRedirection(arg[2]));
1387 if (::v8::internal::FLAG_trace_sim || !stack_aligned) {
1388 SimulatorRuntimeCall target =
1389 reinterpret_cast<SimulatorRuntimeCall>(external);
1391 "Call to host function at %p,\n"
1392 "\t\t\t\targs %08" V8PRIxPTR ", %08" V8PRIxPTR ", %08" V8PRIxPTR
1393 ", %08" V8PRIxPTR ", %08" V8PRIxPTR ", %08" V8PRIxPTR,
1394 FUNCTION_ADDR(target), arg[0], arg[1], arg[2], arg[3], arg[4],
1396 if (!stack_aligned) {
1397 PrintF(" with unaligned stack %08" V8PRIxPTR "\n",
1402 CHECK(stack_aligned);
1403 DCHECK(redirection->type() == ExternalReference::BUILTIN_CALL);
1404 SimulatorRuntimeCall target =
1405 reinterpret_cast<SimulatorRuntimeCall>(external);
1407 target(arg[0], arg[1], arg[2], arg[3], arg[4], arg[5]);
1410 decodeObjectPair(&result, &x, &y);
1411 if (::v8::internal::FLAG_trace_sim) {
1412 PrintF("Returned {%08" V8PRIxPTR ", %08" V8PRIxPTR "}\n", x, y);
1414 set_register(r3, x);
1415 set_register(r4, y);
1421 PPCDebugger dbg(this);
1425 // stop uses all codes greater than 1 << 23.
1427 if (svc >= (1 << 23)) {
1428 uint32_t code = svc & kStopCodeMask;
1429 if (isWatchedStop(code)) {
1430 IncreaseStopCounter(code);
1432 // Stop if it is enabled, otherwise go on jumping over the stop
1433 // and the message address.
1434 if (isEnabledStop(code)) {
1435 PPCDebugger dbg(this);
1438 set_pc(get_pc() + Instruction::kInstrSize + kPointerSize);
1441 // This is not a valid svc code.
1450 // Stop helper functions.
1451 bool Simulator::isStopInstruction(Instruction* instr) {
1452 return (instr->Bits(27, 24) == 0xF) && (instr->SvcValue() >= kStopCode);
1456 bool Simulator::isWatchedStop(uint32_t code) {
1457 DCHECK(code <= kMaxStopCode);
1458 return code < kNumOfWatchedStops;
1462 bool Simulator::isEnabledStop(uint32_t code) {
1463 DCHECK(code <= kMaxStopCode);
1464 // Unwatched stops are always enabled.
1465 return !isWatchedStop(code) ||
1466 !(watched_stops_[code].count & kStopDisabledBit);
1470 void Simulator::EnableStop(uint32_t code) {
1471 DCHECK(isWatchedStop(code));
1472 if (!isEnabledStop(code)) {
1473 watched_stops_[code].count &= ~kStopDisabledBit;
1478 void Simulator::DisableStop(uint32_t code) {
1479 DCHECK(isWatchedStop(code));
1480 if (isEnabledStop(code)) {
1481 watched_stops_[code].count |= kStopDisabledBit;
1486 void Simulator::IncreaseStopCounter(uint32_t code) {
1487 DCHECK(code <= kMaxStopCode);
1488 DCHECK(isWatchedStop(code));
1489 if ((watched_stops_[code].count & ~(1 << 31)) == 0x7fffffff) {
1491 "Stop counter for code %i has overflowed.\n"
1492 "Enabling this code and reseting the counter to 0.\n",
1494 watched_stops_[code].count = 0;
1497 watched_stops_[code].count++;
1502 // Print a stop status.
1503 void Simulator::PrintStopInfo(uint32_t code) {
1504 DCHECK(code <= kMaxStopCode);
1505 if (!isWatchedStop(code)) {
1506 PrintF("Stop not watched.");
1508 const char* state = isEnabledStop(code) ? "Enabled" : "Disabled";
1509 int32_t count = watched_stops_[code].count & ~kStopDisabledBit;
1510 // Don't print the state of unused breakpoints.
1512 if (watched_stops_[code].desc) {
1513 PrintF("stop %i - 0x%x: \t%s, \tcounter = %i, \t%s\n", code, code,
1514 state, count, watched_stops_[code].desc);
1516 PrintF("stop %i - 0x%x: \t%s, \tcounter = %i\n", code, code, state,
1524 void Simulator::SetCR0(intptr_t result, bool setSO) {
1538 condition_reg_ = (condition_reg_ & ~0xF0000000) | bf;
1542 void Simulator::ExecuteBranchConditional(Instruction* instr) {
1543 int bo = instr->Bits(25, 21) << 21;
1544 int offset = (instr->Bits(15, 2) << 18) >> 16;
1545 int condition_bit = instr->Bits(20, 16);
1546 int condition_mask = 0x80000000 >> condition_bit;
1548 case DCBNZF: // Decrement CTR; branch if CTR != 0 and condition false
1549 case DCBEZF: // Decrement CTR; branch if CTR == 0 and condition false
1551 case BF: { // Branch if condition false
1552 if (!(condition_reg_ & condition_mask)) {
1553 if (instr->Bit(0) == 1) { // LK flag set
1554 special_reg_lr_ = get_pc() + 4;
1556 set_pc(get_pc() + offset);
1560 case DCBNZT: // Decrement CTR; branch if CTR != 0 and condition true
1561 case DCBEZT: // Decrement CTR; branch if CTR == 0 and condition true
1563 case BT: { // Branch if condition true
1564 if (condition_reg_ & condition_mask) {
1565 if (instr->Bit(0) == 1) { // LK flag set
1566 special_reg_lr_ = get_pc() + 4;
1568 set_pc(get_pc() + offset);
1572 case DCBNZ: // Decrement CTR; branch if CTR != 0
1573 case DCBEZ: // Decrement CTR; branch if CTR == 0
1574 special_reg_ctr_ -= 1;
1575 if ((special_reg_ctr_ == 0) == (bo == DCBEZ)) {
1576 if (instr->Bit(0) == 1) { // LK flag set
1577 special_reg_lr_ = get_pc() + 4;
1579 set_pc(get_pc() + offset);
1582 case BA: { // Branch always
1583 if (instr->Bit(0) == 1) { // LK flag set
1584 special_reg_lr_ = get_pc() + 4;
1586 set_pc(get_pc() + offset);
1590 UNIMPLEMENTED(); // Invalid encoding
1595 // Handle execution based on instruction types.
1596 void Simulator::ExecuteExt1(Instruction* instr) {
1597 switch (instr->Bits(10, 1) << 1) {
1599 UNIMPLEMENTED(); // Not used by V8.
1601 // need to check BO flag
1602 intptr_t old_pc = get_pc();
1603 set_pc(special_reg_lr_);
1604 if (instr->Bit(0) == 1) { // LK flag set
1605 special_reg_lr_ = old_pc + 4;
1610 // need to check BO flag
1611 intptr_t old_pc = get_pc();
1612 set_pc(special_reg_ctr_);
1613 if (instr->Bit(0) == 1) { // LK flag set
1614 special_reg_lr_ = old_pc + 4;
1623 // todo - simulate isync
1627 int bt = instr->Bits(25, 21);
1628 int ba = instr->Bits(20, 16);
1629 int bb = instr->Bits(15, 11);
1630 int ba_val = ((0x80000000 >> ba) & condition_reg_) == 0 ? 0 : 1;
1631 int bb_val = ((0x80000000 >> bb) & condition_reg_) == 0 ? 0 : 1;
1632 int bt_val = ba_val ^ bb_val;
1633 bt_val = bt_val << (31 - bt); // shift bit to correct destination
1634 condition_reg_ &= ~(0x80000000 >> bt);
1635 condition_reg_ |= bt_val;
1639 int bt = instr->Bits(25, 21);
1640 int ba = instr->Bits(20, 16);
1641 int bb = instr->Bits(15, 11);
1642 int ba_val = ((0x80000000 >> ba) & condition_reg_) == 0 ? 0 : 1;
1643 int bb_val = ((0x80000000 >> bb) & condition_reg_) == 0 ? 0 : 1;
1644 int bt_val = 1 - (ba_val ^ bb_val);
1645 bt_val = bt_val << (31 - bt); // shift bit to correct destination
1646 condition_reg_ &= ~(0x80000000 >> bt);
1647 condition_reg_ |= bt_val;
1655 UNIMPLEMENTED(); // Not used by V8.
1661 bool Simulator::ExecuteExt2_10bit(Instruction* instr) {
1664 int opcode = instr->Bits(10, 1) << 1;
1667 int rs = instr->RSValue();
1668 int ra = instr->RAValue();
1669 int rb = instr->RBValue();
1670 uint32_t rs_val = get_register(rs);
1671 uintptr_t rb_val = get_register(rb);
1672 intptr_t result = rs_val >> (rb_val & 0x3f);
1673 set_register(ra, result);
1674 if (instr->Bit(0)) { // RC bit set
1679 #if V8_TARGET_ARCH_PPC64
1681 int rs = instr->RSValue();
1682 int ra = instr->RAValue();
1683 int rb = instr->RBValue();
1684 uintptr_t rs_val = get_register(rs);
1685 uintptr_t rb_val = get_register(rb);
1686 intptr_t result = rs_val >> (rb_val & 0x7f);
1687 set_register(ra, result);
1688 if (instr->Bit(0)) { // RC bit set
1695 int rs = instr->RSValue();
1696 int ra = instr->RAValue();
1697 int rb = instr->RBValue();
1698 int32_t rs_val = get_register(rs);
1699 intptr_t rb_val = get_register(rb);
1700 intptr_t result = rs_val >> (rb_val & 0x3f);
1701 set_register(ra, result);
1702 if (instr->Bit(0)) { // RC bit set
1707 #if V8_TARGET_ARCH_PPC64
1709 int rs = instr->RSValue();
1710 int ra = instr->RAValue();
1711 int rb = instr->RBValue();
1712 intptr_t rs_val = get_register(rs);
1713 intptr_t rb_val = get_register(rb);
1714 intptr_t result = rs_val >> (rb_val & 0x7f);
1715 set_register(ra, result);
1716 if (instr->Bit(0)) { // RC bit set
1723 int ra = instr->RAValue();
1724 int rs = instr->RSValue();
1725 int sh = instr->Bits(15, 11);
1726 int32_t rs_val = get_register(rs);
1727 intptr_t result = rs_val >> sh;
1728 set_register(ra, result);
1729 if (instr->Bit(0)) { // RC bit set
1734 #if V8_TARGET_ARCH_PPC64
1736 const int shift = kBitsPerPointer - 32;
1737 int ra = instr->RAValue();
1738 int rs = instr->RSValue();
1739 intptr_t rs_val = get_register(rs);
1740 intptr_t ra_val = (rs_val << shift) >> shift;
1741 set_register(ra, ra_val);
1742 if (instr->Bit(0)) { // RC bit set
1749 const int shift = kBitsPerPointer - 16;
1750 int ra = instr->RAValue();
1751 int rs = instr->RSValue();
1752 intptr_t rs_val = get_register(rs);
1753 intptr_t ra_val = (rs_val << shift) >> shift;
1754 set_register(ra, ra_val);
1755 if (instr->Bit(0)) { // RC bit set
1761 const int shift = kBitsPerPointer - 8;
1762 int ra = instr->RAValue();
1763 int rs = instr->RSValue();
1764 intptr_t rs_val = get_register(rs);
1765 intptr_t ra_val = (rs_val << shift) >> shift;
1766 set_register(ra, ra_val);
1767 if (instr->Bit(0)) { // RC bit set
1774 int frt = instr->RTValue();
1775 int ra = instr->RAValue();
1776 int rb = instr->RBValue();
1777 intptr_t ra_val = ra == 0 ? 0 : get_register(ra);
1778 intptr_t rb_val = get_register(rb);
1779 int32_t val = ReadW(ra_val + rb_val, instr);
1780 float* fptr = reinterpret_cast<float*>(&val);
1781 set_d_register_from_double(frt, static_cast<double>(*fptr));
1782 if (opcode == LFSUX) {
1784 set_register(ra, ra_val + rb_val);
1790 int frt = instr->RTValue();
1791 int ra = instr->RAValue();
1792 int rb = instr->RBValue();
1793 intptr_t ra_val = ra == 0 ? 0 : get_register(ra);
1794 intptr_t rb_val = get_register(rb);
1795 int64_t* dptr = reinterpret_cast<int64_t*>(ReadDW(ra_val + rb_val));
1796 set_d_register(frt, *dptr);
1797 if (opcode == LFDUX) {
1799 set_register(ra, ra_val + rb_val);
1805 int frs = instr->RSValue();
1806 int ra = instr->RAValue();
1807 int rb = instr->RBValue();
1808 intptr_t ra_val = ra == 0 ? 0 : get_register(ra);
1809 intptr_t rb_val = get_register(rb);
1810 float frs_val = static_cast<float>(get_double_from_d_register(frs));
1811 int32_t* p = reinterpret_cast<int32_t*>(&frs_val);
1812 WriteW(ra_val + rb_val, *p, instr);
1813 if (opcode == STFSUX) {
1815 set_register(ra, ra_val + rb_val);
1821 int frs = instr->RSValue();
1822 int ra = instr->RAValue();
1823 int rb = instr->RBValue();
1824 intptr_t ra_val = ra == 0 ? 0 : get_register(ra);
1825 intptr_t rb_val = get_register(rb);
1826 int64_t frs_val = get_d_register(frs);
1827 WriteDW(ra_val + rb_val, frs_val);
1828 if (opcode == STFDUX) {
1830 set_register(ra, ra_val + rb_val);
1835 // todo - simulate sync
1839 // todo - simulate icbi
1848 if (found) return found;
1851 opcode = instr->Bits(10, 2) << 2;
1854 int ra = instr->RAValue();
1855 int rs = instr->RSValue();
1856 int sh = (instr->Bits(15, 11) | (instr->Bit(1) << 5));
1857 intptr_t rs_val = get_register(rs);
1858 intptr_t result = rs_val >> sh;
1859 set_register(ra, result);
1860 if (instr->Bit(0)) { // RC bit set
1875 bool Simulator::ExecuteExt2_9bit_part1(Instruction* instr) {
1878 int opcode = instr->Bits(9, 1) << 1;
1881 // used for call redirection in simulation mode
1882 SoftwareInterrupt(instr);
1886 int ra = instr->RAValue();
1887 int rb = instr->RBValue();
1888 int cr = instr->Bits(25, 23);
1890 #if V8_TARGET_ARCH_PPC64
1891 int L = instr->Bit(21);
1894 intptr_t ra_val = get_register(ra);
1895 intptr_t rb_val = get_register(rb);
1896 if (ra_val < rb_val) {
1899 if (ra_val > rb_val) {
1902 if (ra_val == rb_val) {
1905 #if V8_TARGET_ARCH_PPC64
1907 int32_t ra_val = get_register(ra);
1908 int32_t rb_val = get_register(rb);
1909 if (ra_val < rb_val) {
1912 if (ra_val > rb_val) {
1915 if (ra_val == rb_val) {
1920 uint32_t condition_mask = 0xF0000000U >> (cr * 4);
1921 uint32_t condition = bf >> (cr * 4);
1922 condition_reg_ = (condition_reg_ & ~condition_mask) | condition;
1926 int rt = instr->RTValue();
1927 int ra = instr->RAValue();
1928 int rb = instr->RBValue();
1929 // int oe = instr->Bit(10);
1930 uintptr_t ra_val = get_register(ra);
1931 uintptr_t rb_val = get_register(rb);
1932 uintptr_t alu_out = ~ra_val + rb_val + 1;
1933 set_register(rt, alu_out);
1934 // If the sign of rb and alu_out don't match, carry = 0
1935 if ((alu_out ^ rb_val) & 0x80000000) {
1936 special_reg_xer_ &= ~0xF0000000;
1938 special_reg_xer_ = (special_reg_xer_ & ~0xF0000000) | 0x20000000;
1940 if (instr->Bit(0)) { // RC bit set
1943 // todo - handle OE bit
1947 int rt = instr->RTValue();
1948 int ra = instr->RAValue();
1949 int rb = instr->RBValue();
1950 // int oe = instr->Bit(10);
1951 uintptr_t ra_val = get_register(ra);
1952 uintptr_t rb_val = get_register(rb);
1953 uintptr_t alu_out = ra_val + rb_val;
1955 if (~ra_val < rb_val) {
1956 special_reg_xer_ = (special_reg_xer_ & ~0xF0000000) | 0x20000000;
1958 special_reg_xer_ &= ~0xF0000000;
1960 set_register(rt, alu_out);
1961 if (instr->Bit(0)) { // RC bit set
1962 SetCR0(static_cast<intptr_t>(alu_out));
1964 // todo - handle OE bit
1968 int rt = instr->RTValue();
1969 int ra = instr->RAValue();
1970 int rb = instr->RBValue();
1971 int32_t ra_val = (get_register(ra) & 0xFFFFFFFF);
1972 int32_t rb_val = (get_register(rb) & 0xFFFFFFFF);
1973 int64_t alu_out = (int64_t)ra_val * (int64_t)rb_val;
1975 set_register(rt, alu_out);
1976 if (instr->Bit(0)) { // RC bit set
1977 SetCR0(static_cast<intptr_t>(alu_out));
1982 int rt = instr->RTValue();
1983 int ra = instr->RAValue();
1984 int rb = instr->RBValue();
1985 uint32_t ra_val = (get_register(ra) & 0xFFFFFFFF);
1986 uint32_t rb_val = (get_register(rb) & 0xFFFFFFFF);
1987 uint64_t alu_out = (uint64_t)ra_val * (uint64_t)rb_val;
1989 set_register(rt, alu_out);
1990 if (instr->Bit(0)) { // RC bit set
1991 SetCR0(static_cast<intptr_t>(alu_out));
1996 int rt = instr->RTValue();
1997 int ra = instr->RAValue();
1998 intptr_t ra_val = get_register(ra);
1999 intptr_t alu_out = 1 + ~ra_val;
2000 #if V8_TARGET_ARCH_PPC64
2001 intptr_t one = 1; // work-around gcc
2002 intptr_t kOverflowVal = (one << 63);
2004 intptr_t kOverflowVal = kMinInt;
2006 set_register(rt, alu_out);
2007 if (instr->Bit(10)) { // OE bit set
2008 if (ra_val == kOverflowVal) {
2009 special_reg_xer_ |= 0xC0000000; // set SO,OV
2011 special_reg_xer_ &= ~0x40000000; // clear OV
2014 if (instr->Bit(0)) { // RC bit set
2015 bool setSO = (special_reg_xer_ & 0x80000000);
2016 SetCR0(alu_out, setSO);
2021 int rs = instr->RSValue();
2022 int ra = instr->RAValue();
2023 int rb = instr->RBValue();
2024 uint32_t rs_val = get_register(rs);
2025 uintptr_t rb_val = get_register(rb);
2026 uint32_t result = rs_val << (rb_val & 0x3f);
2027 set_register(ra, result);
2028 if (instr->Bit(0)) { // RC bit set
2033 #if V8_TARGET_ARCH_PPC64
2035 int rs = instr->RSValue();
2036 int ra = instr->RAValue();
2037 int rb = instr->RBValue();
2038 uintptr_t rs_val = get_register(rs);
2039 uintptr_t rb_val = get_register(rb);
2040 uintptr_t result = rs_val << (rb_val & 0x7f);
2041 set_register(ra, result);
2042 if (instr->Bit(0)) { // RC bit set
2048 DCHECK(!instr->Bit(0));
2049 int frt = instr->RTValue();
2050 int ra = instr->RAValue();
2051 int64_t frt_val = get_d_register(frt);
2052 set_register(ra, frt_val);
2056 DCHECK(!instr->Bit(0));
2057 int frt = instr->RTValue();
2058 int ra = instr->RAValue();
2059 int64_t frt_val = get_d_register(frt);
2060 set_register(ra, static_cast<uint32_t>(frt_val));
2064 DCHECK(!instr->Bit(0));
2065 int frt = instr->RTValue();
2066 int ra = instr->RAValue();
2067 int64_t ra_val = get_register(ra);
2068 set_d_register(frt, ra_val);
2072 DCHECK(!instr->Bit(0));
2073 int frt = instr->RTValue();
2074 int ra = instr->RAValue();
2075 int64_t ra_val = static_cast<int32_t>(get_register(ra));
2076 set_d_register(frt, ra_val);
2080 DCHECK(!instr->Bit(0));
2081 int frt = instr->RTValue();
2082 int ra = instr->RAValue();
2083 uint64_t ra_val = static_cast<uint32_t>(get_register(ra));
2084 set_d_register(frt, ra_val);
2098 bool Simulator::ExecuteExt2_9bit_part2(Instruction* instr) {
2100 int opcode = instr->Bits(9, 1) << 1;
2103 int rs = instr->RSValue();
2104 int ra = instr->RAValue();
2105 uintptr_t rs_val = get_register(rs);
2106 uintptr_t count = 0;
2108 uintptr_t bit = 0x80000000;
2109 for (; n < 32; n++) {
2110 if (bit & rs_val) break;
2114 set_register(ra, count);
2115 if (instr->Bit(0)) { // RC Bit set
2123 condition_reg_ = (condition_reg_ & ~0xF0000000) | bf;
2127 #if V8_TARGET_ARCH_PPC64
2129 int rs = instr->RSValue();
2130 int ra = instr->RAValue();
2131 uintptr_t rs_val = get_register(rs);
2132 uintptr_t count = 0;
2134 uintptr_t bit = 0x8000000000000000UL;
2135 for (; n < 64; n++) {
2136 if (bit & rs_val) break;
2140 set_register(ra, count);
2141 if (instr->Bit(0)) { // RC Bit set
2149 condition_reg_ = (condition_reg_ & ~0xF0000000) | bf;
2155 int rs = instr->RSValue();
2156 int ra = instr->RAValue();
2157 int rb = instr->RBValue();
2158 intptr_t rs_val = get_register(rs);
2159 intptr_t rb_val = get_register(rb);
2160 intptr_t alu_out = rs_val & rb_val;
2161 set_register(ra, alu_out);
2162 if (instr->Bit(0)) { // RC Bit set
2168 int rs = instr->RSValue();
2169 int ra = instr->RAValue();
2170 int rb = instr->RBValue();
2171 intptr_t rs_val = get_register(rs);
2172 intptr_t rb_val = get_register(rb);
2173 intptr_t alu_out = rs_val & ~rb_val;
2174 set_register(ra, alu_out);
2175 if (instr->Bit(0)) { // RC Bit set
2181 int ra = instr->RAValue();
2182 int rb = instr->RBValue();
2183 int cr = instr->Bits(25, 23);
2185 #if V8_TARGET_ARCH_PPC64
2186 int L = instr->Bit(21);
2189 uintptr_t ra_val = get_register(ra);
2190 uintptr_t rb_val = get_register(rb);
2191 if (ra_val < rb_val) {
2194 if (ra_val > rb_val) {
2197 if (ra_val == rb_val) {
2200 #if V8_TARGET_ARCH_PPC64
2202 uint32_t ra_val = get_register(ra);
2203 uint32_t rb_val = get_register(rb);
2204 if (ra_val < rb_val) {
2207 if (ra_val > rb_val) {
2210 if (ra_val == rb_val) {
2215 uint32_t condition_mask = 0xF0000000U >> (cr * 4);
2216 uint32_t condition = bf >> (cr * 4);
2217 condition_reg_ = (condition_reg_ & ~condition_mask) | condition;
2221 int rt = instr->RTValue();
2222 int ra = instr->RAValue();
2223 int rb = instr->RBValue();
2224 // int oe = instr->Bit(10);
2225 intptr_t ra_val = get_register(ra);
2226 intptr_t rb_val = get_register(rb);
2227 intptr_t alu_out = rb_val - ra_val;
2228 // todo - figure out underflow
2229 set_register(rt, alu_out);
2230 if (instr->Bit(0)) { // RC Bit set
2233 // todo - handle OE bit
2237 int rt = instr->RTValue();
2238 int ra = instr->RAValue();
2239 intptr_t ra_val = get_register(ra);
2240 if (special_reg_xer_ & 0x20000000) {
2243 set_register(rt, ra_val);
2244 if (instr->Bit(0)) { // RC bit set
2247 // todo - handle OE bit
2251 int rs = instr->RSValue();
2252 int ra = instr->RAValue();
2253 int rb = instr->RBValue();
2254 intptr_t rs_val = get_register(rs);
2255 intptr_t rb_val = get_register(rb);
2256 intptr_t alu_out = ~(rs_val | rb_val);
2257 set_register(ra, alu_out);
2258 if (instr->Bit(0)) { // RC bit set
2264 int rt = instr->RTValue();
2265 int ra = instr->RAValue();
2266 int rb = instr->RBValue();
2267 int32_t ra_val = (get_register(ra) & 0xFFFFFFFF);
2268 int32_t rb_val = (get_register(rb) & 0xFFFFFFFF);
2269 int32_t alu_out = ra_val * rb_val;
2270 set_register(rt, alu_out);
2271 if (instr->Bit(0)) { // RC bit set
2274 // todo - handle OE bit
2277 #if V8_TARGET_ARCH_PPC64
2279 int rt = instr->RTValue();
2280 int ra = instr->RAValue();
2281 int rb = instr->RBValue();
2282 int64_t ra_val = get_register(ra);
2283 int64_t rb_val = get_register(rb);
2284 int64_t alu_out = ra_val * rb_val;
2285 set_register(rt, alu_out);
2286 if (instr->Bit(0)) { // RC bit set
2289 // todo - handle OE bit
2294 int rt = instr->RTValue();
2295 int ra = instr->RAValue();
2296 int rb = instr->RBValue();
2297 int32_t ra_val = get_register(ra);
2298 int32_t rb_val = get_register(rb);
2299 bool overflow = (ra_val == kMinInt && rb_val == -1);
2300 // result is undefined if divisor is zero or if operation
2301 // is 0x80000000 / -1.
2302 int32_t alu_out = (rb_val == 0 || overflow) ? -1 : ra_val / rb_val;
2303 set_register(rt, alu_out);
2304 if (instr->Bit(10)) { // OE bit set
2306 special_reg_xer_ |= 0xC0000000; // set SO,OV
2308 special_reg_xer_ &= ~0x40000000; // clear OV
2311 if (instr->Bit(0)) { // RC bit set
2312 bool setSO = (special_reg_xer_ & 0x80000000);
2313 SetCR0(alu_out, setSO);
2318 int rt = instr->RTValue();
2319 int ra = instr->RAValue();
2320 int rb = instr->RBValue();
2321 uint32_t ra_val = get_register(ra);
2322 uint32_t rb_val = get_register(rb);
2323 bool overflow = (rb_val == 0);
2324 // result is undefined if divisor is zero
2325 uint32_t alu_out = (overflow) ? -1 : ra_val / rb_val;
2326 set_register(rt, alu_out);
2327 if (instr->Bit(10)) { // OE bit set
2329 special_reg_xer_ |= 0xC0000000; // set SO,OV
2331 special_reg_xer_ &= ~0x40000000; // clear OV
2334 if (instr->Bit(0)) { // RC bit set
2335 bool setSO = (special_reg_xer_ & 0x80000000);
2336 SetCR0(alu_out, setSO);
2340 #if V8_TARGET_ARCH_PPC64
2342 int rt = instr->RTValue();
2343 int ra = instr->RAValue();
2344 int rb = instr->RBValue();
2345 int64_t ra_val = get_register(ra);
2346 int64_t rb_val = get_register(rb);
2347 int64_t one = 1; // work-around gcc
2348 int64_t kMinLongLong = (one << 63);
2349 // result is undefined if divisor is zero or if operation
2350 // is 0x80000000_00000000 / -1.
2352 (rb_val == 0 || (ra_val == kMinLongLong && rb_val == -1))
2355 set_register(rt, alu_out);
2356 if (instr->Bit(0)) { // RC bit set
2359 // todo - handle OE bit
2363 int rt = instr->RTValue();
2364 int ra = instr->RAValue();
2365 int rb = instr->RBValue();
2366 uint64_t ra_val = get_register(ra);
2367 uint64_t rb_val = get_register(rb);
2368 // result is undefined if divisor is zero
2369 uint64_t alu_out = (rb_val == 0) ? -1 : ra_val / rb_val;
2370 set_register(rt, alu_out);
2371 if (instr->Bit(0)) { // RC bit set
2374 // todo - handle OE bit
2379 int rt = instr->RTValue();
2380 int ra = instr->RAValue();
2381 int rb = instr->RBValue();
2382 // int oe = instr->Bit(10);
2383 intptr_t ra_val = get_register(ra);
2384 intptr_t rb_val = get_register(rb);
2385 intptr_t alu_out = ra_val + rb_val;
2386 set_register(rt, alu_out);
2387 if (instr->Bit(0)) { // RC bit set
2390 // todo - handle OE bit
2394 int rs = instr->RSValue();
2395 int ra = instr->RAValue();
2396 int rb = instr->RBValue();
2397 intptr_t rs_val = get_register(rs);
2398 intptr_t rb_val = get_register(rb);
2399 intptr_t alu_out = rs_val ^ rb_val;
2400 set_register(ra, alu_out);
2401 if (instr->Bit(0)) { // RC bit set
2407 int rs = instr->RSValue();
2408 int ra = instr->RAValue();
2409 int rb = instr->RBValue();
2410 intptr_t rs_val = get_register(rs);
2411 intptr_t rb_val = get_register(rb);
2412 intptr_t alu_out = rs_val | rb_val;
2413 set_register(ra, alu_out);
2414 if (instr->Bit(0)) { // RC bit set
2420 int rs = instr->RSValue();
2421 int ra = instr->RAValue();
2422 int rb = instr->RBValue();
2423 intptr_t rs_val = get_register(rs);
2424 intptr_t rb_val = get_register(rb);
2425 intptr_t alu_out = rs_val | ~rb_val;
2426 set_register(ra, alu_out);
2427 if (instr->Bit(0)) { // RC bit set
2433 int rt = instr->RTValue();
2434 int spr = instr->Bits(20, 11);
2436 UNIMPLEMENTED(); // Only LRLR supported
2438 set_register(rt, special_reg_lr_);
2442 int rt = instr->RTValue();
2443 intptr_t rt_val = get_register(rt);
2444 int spr = instr->Bits(20, 11);
2446 special_reg_lr_ = rt_val;
2447 } else if (spr == 288) {
2448 special_reg_ctr_ = rt_val;
2449 } else if (spr == 32) {
2450 special_reg_xer_ = rt_val;
2452 UNIMPLEMENTED(); // Only LR supported
2457 int rt = instr->RTValue();
2458 set_register(rt, condition_reg_);
2463 int rs = instr->RSValue();
2464 int ra = instr->RAValue();
2465 int rb = instr->RBValue();
2466 intptr_t ra_val = ra == 0 ? 0 : get_register(ra);
2467 int32_t rs_val = get_register(rs);
2468 intptr_t rb_val = get_register(rb);
2469 WriteW(ra_val + rb_val, rs_val, instr);
2470 if (opcode == STWUX) {
2472 set_register(ra, ra_val + rb_val);
2478 int rs = instr->RSValue();
2479 int ra = instr->RAValue();
2480 int rb = instr->RBValue();
2481 intptr_t ra_val = ra == 0 ? 0 : get_register(ra);
2482 int8_t rs_val = get_register(rs);
2483 intptr_t rb_val = get_register(rb);
2484 WriteB(ra_val + rb_val, rs_val);
2485 if (opcode == STBUX) {
2487 set_register(ra, ra_val + rb_val);
2493 int rs = instr->RSValue();
2494 int ra = instr->RAValue();
2495 int rb = instr->RBValue();
2496 intptr_t ra_val = ra == 0 ? 0 : get_register(ra);
2497 int16_t rs_val = get_register(rs);
2498 intptr_t rb_val = get_register(rb);
2499 WriteH(ra_val + rb_val, rs_val, instr);
2500 if (opcode == STHUX) {
2502 set_register(ra, ra_val + rb_val);
2508 int rt = instr->RTValue();
2509 int ra = instr->RAValue();
2510 int rb = instr->RBValue();
2511 intptr_t ra_val = ra == 0 ? 0 : get_register(ra);
2512 intptr_t rb_val = get_register(rb);
2513 set_register(rt, ReadWU(ra_val + rb_val, instr));
2514 if (opcode == LWZUX) {
2515 DCHECK(ra != 0 && ra != rt);
2516 set_register(ra, ra_val + rb_val);
2520 #if V8_TARGET_ARCH_PPC64
2522 int rt = instr->RTValue();
2523 int ra = instr->RAValue();
2524 int rb = instr->RBValue();
2525 intptr_t ra_val = ra == 0 ? 0 : get_register(ra);
2526 intptr_t rb_val = get_register(rb);
2527 set_register(rt, ReadW(ra_val + rb_val, instr));
2532 int rt = instr->RTValue();
2533 int ra = instr->RAValue();
2534 int rb = instr->RBValue();
2535 intptr_t ra_val = ra == 0 ? 0 : get_register(ra);
2536 intptr_t rb_val = get_register(rb);
2537 intptr_t* result = ReadDW(ra_val + rb_val);
2538 set_register(rt, *result);
2539 if (opcode == LDUX) {
2540 DCHECK(ra != 0 && ra != rt);
2541 set_register(ra, ra_val + rb_val);
2547 int rs = instr->RSValue();
2548 int ra = instr->RAValue();
2549 int rb = instr->RBValue();
2550 intptr_t ra_val = ra == 0 ? 0 : get_register(ra);
2551 intptr_t rs_val = get_register(rs);
2552 intptr_t rb_val = get_register(rb);
2553 WriteDW(ra_val + rb_val, rs_val);
2554 if (opcode == STDUX) {
2556 set_register(ra, ra_val + rb_val);
2563 int rt = instr->RTValue();
2564 int ra = instr->RAValue();
2565 int rb = instr->RBValue();
2566 intptr_t ra_val = ra == 0 ? 0 : get_register(ra);
2567 intptr_t rb_val = get_register(rb);
2568 set_register(rt, ReadBU(ra_val + rb_val) & 0xFF);
2569 if (opcode == LBZUX) {
2570 DCHECK(ra != 0 && ra != rt);
2571 set_register(ra, ra_val + rb_val);
2577 int rt = instr->RTValue();
2578 int ra = instr->RAValue();
2579 int rb = instr->RBValue();
2580 intptr_t ra_val = ra == 0 ? 0 : get_register(ra);
2581 intptr_t rb_val = get_register(rb);
2582 set_register(rt, ReadHU(ra_val + rb_val, instr) & 0xFFFF);
2583 if (opcode == LHZUX) {
2584 DCHECK(ra != 0 && ra != rt);
2585 set_register(ra, ra_val + rb_val);
2591 int rt = instr->RTValue();
2592 int ra = instr->RAValue();
2593 int rb = instr->RBValue();
2594 intptr_t ra_val = ra == 0 ? 0 : get_register(ra);
2595 intptr_t rb_val = get_register(rb);
2596 set_register(rt, ReadH(ra_val + rb_val, instr));
2597 if (opcode == LHAUX) {
2598 DCHECK(ra != 0 && ra != rt);
2599 set_register(ra, ra_val + rb_val);
2604 // todo - simulate dcbf
2617 void Simulator::ExecuteExt2_5bit(Instruction* instr) {
2618 int opcode = instr->Bits(5, 1) << 1;
2621 int rt = instr->RTValue();
2622 int ra = instr->RAValue();
2623 int rb = instr->RBValue();
2624 int condition_bit = instr->RCValue();
2625 int condition_mask = 0x80000000 >> condition_bit;
2626 intptr_t ra_val = (ra == 0) ? 0 : get_register(ra);
2627 intptr_t rb_val = get_register(rb);
2628 intptr_t value = (condition_reg_ & condition_mask) ? ra_val : rb_val;
2629 set_register(rt, value);
2633 PrintF("Unimplemented: %08x\n", instr->InstructionBits());
2634 UNIMPLEMENTED(); // Not used by V8.
2640 void Simulator::ExecuteExt2(Instruction* instr) {
2641 // Check first the 10-1 bit versions
2642 if (ExecuteExt2_10bit(instr)) return;
2643 // Now look at the lesser encodings
2644 if (ExecuteExt2_9bit_part1(instr)) return;
2645 if (ExecuteExt2_9bit_part2(instr)) return;
2646 ExecuteExt2_5bit(instr);
2650 void Simulator::ExecuteExt4(Instruction* instr) {
2651 switch (instr->Bits(5, 1) << 1) {
2653 int frt = instr->RTValue();
2654 int fra = instr->RAValue();
2655 int frb = instr->RBValue();
2656 double fra_val = get_double_from_d_register(fra);
2657 double frb_val = get_double_from_d_register(frb);
2658 double frt_val = fra_val / frb_val;
2659 set_d_register_from_double(frt, frt_val);
2663 int frt = instr->RTValue();
2664 int fra = instr->RAValue();
2665 int frb = instr->RBValue();
2666 double fra_val = get_double_from_d_register(fra);
2667 double frb_val = get_double_from_d_register(frb);
2668 double frt_val = fra_val - frb_val;
2669 set_d_register_from_double(frt, frt_val);
2673 int frt = instr->RTValue();
2674 int fra = instr->RAValue();
2675 int frb = instr->RBValue();
2676 double fra_val = get_double_from_d_register(fra);
2677 double frb_val = get_double_from_d_register(frb);
2678 double frt_val = fra_val + frb_val;
2679 set_d_register_from_double(frt, frt_val);
2683 int frt = instr->RTValue();
2684 int frb = instr->RBValue();
2685 double frb_val = get_double_from_d_register(frb);
2686 double frt_val = fast_sqrt(frb_val);
2687 set_d_register_from_double(frt, frt_val);
2691 int frt = instr->RTValue();
2692 int fra = instr->RAValue();
2693 int frb = instr->RBValue();
2694 int frc = instr->RCValue();
2695 double fra_val = get_double_from_d_register(fra);
2696 double frb_val = get_double_from_d_register(frb);
2697 double frc_val = get_double_from_d_register(frc);
2698 double frt_val = ((fra_val >= 0.0) ? frc_val : frb_val);
2699 set_d_register_from_double(frt, frt_val);
2703 int frt = instr->RTValue();
2704 int fra = instr->RAValue();
2705 int frc = instr->RCValue();
2706 double fra_val = get_double_from_d_register(fra);
2707 double frc_val = get_double_from_d_register(frc);
2708 double frt_val = fra_val * frc_val;
2709 set_d_register_from_double(frt, frt_val);
2713 int frt = instr->RTValue();
2714 int fra = instr->RAValue();
2715 int frb = instr->RBValue();
2716 int frc = instr->RCValue();
2717 double fra_val = get_double_from_d_register(fra);
2718 double frb_val = get_double_from_d_register(frb);
2719 double frc_val = get_double_from_d_register(frc);
2720 double frt_val = (fra_val * frc_val) - frb_val;
2721 set_d_register_from_double(frt, frt_val);
2725 int frt = instr->RTValue();
2726 int fra = instr->RAValue();
2727 int frb = instr->RBValue();
2728 int frc = instr->RCValue();
2729 double fra_val = get_double_from_d_register(fra);
2730 double frb_val = get_double_from_d_register(frb);
2731 double frc_val = get_double_from_d_register(frc);
2732 double frt_val = (fra_val * frc_val) + frb_val;
2733 set_d_register_from_double(frt, frt_val);
2737 int opcode = instr->Bits(10, 1) << 1;
2740 int fra = instr->RAValue();
2741 int frb = instr->RBValue();
2742 double fra_val = get_double_from_d_register(fra);
2743 double frb_val = get_double_from_d_register(frb);
2744 int cr = instr->Bits(25, 23);
2746 if (fra_val < frb_val) {
2749 if (fra_val > frb_val) {
2752 if (fra_val == frb_val) {
2755 if (std::isunordered(fra_val, frb_val)) {
2758 int condition_mask = 0xF0000000 >> (cr * 4);
2759 int condition = bf >> (cr * 4);
2760 condition_reg_ = (condition_reg_ & ~condition_mask) | condition;
2764 int frt = instr->RTValue();
2765 int frb = instr->RBValue();
2766 double frb_val = get_double_from_d_register(frb);
2767 double frt_val = std::round(frb_val);
2768 set_d_register_from_double(frt, frt_val);
2769 if (instr->Bit(0)) { // RC bit set
2775 int frt = instr->RTValue();
2776 int frb = instr->RBValue();
2777 double frb_val = get_double_from_d_register(frb);
2778 double frt_val = std::trunc(frb_val);
2779 set_d_register_from_double(frt, frt_val);
2780 if (instr->Bit(0)) { // RC bit set
2786 int frt = instr->RTValue();
2787 int frb = instr->RBValue();
2788 double frb_val = get_double_from_d_register(frb);
2789 double frt_val = std::ceil(frb_val);
2790 set_d_register_from_double(frt, frt_val);
2791 if (instr->Bit(0)) { // RC bit set
2797 int frt = instr->RTValue();
2798 int frb = instr->RBValue();
2799 double frb_val = get_double_from_d_register(frb);
2800 double frt_val = std::floor(frb_val);
2801 set_d_register_from_double(frt, frt_val);
2802 if (instr->Bit(0)) { // RC bit set
2808 int frt = instr->RTValue();
2809 int frb = instr->RBValue();
2810 // frsp round 8-byte double-precision value to
2811 // single-precision value
2812 double frb_val = get_double_from_d_register(frb);
2813 double frt_val = static_cast<float>(frb_val);
2814 set_d_register_from_double(frt, frt_val);
2815 if (instr->Bit(0)) { // RC bit set
2821 int frt = instr->RTValue();
2822 int frb = instr->RBValue();
2823 double t_val = get_double_from_d_register(frb);
2824 int64_t* frb_val_p = reinterpret_cast<int64_t*>(&t_val);
2825 double frt_val = static_cast<double>(*frb_val_p);
2826 set_d_register_from_double(frt, frt_val);
2830 int frt = instr->RTValue();
2831 int frb = instr->RBValue();
2832 double frb_val = get_double_from_d_register(frb);
2834 int64_t one = 1; // work-around gcc
2835 int64_t kMinLongLong = (one << 63);
2836 int64_t kMaxLongLong = kMinLongLong - 1;
2838 if (frb_val > kMaxLongLong) {
2839 frt_val = kMaxLongLong;
2840 } else if (frb_val < kMinLongLong) {
2841 frt_val = kMinLongLong;
2843 switch (fp_condition_reg_ & kFPRoundingModeMask) {
2845 frt_val = (int64_t)frb_val;
2847 case kRoundToPlusInf:
2848 frt_val = (int64_t)std::ceil(frb_val);
2850 case kRoundToMinusInf:
2851 frt_val = (int64_t)std::floor(frb_val);
2854 frt_val = (int64_t)frb_val;
2855 UNIMPLEMENTED(); // Not used by V8.
2859 double* p = reinterpret_cast<double*>(&frt_val);
2860 set_d_register_from_double(frt, *p);
2864 int frt = instr->RTValue();
2865 int frb = instr->RBValue();
2866 double frb_val = get_double_from_d_register(frb);
2868 int64_t one = 1; // work-around gcc
2869 int64_t kMinLongLong = (one << 63);
2870 int64_t kMaxLongLong = kMinLongLong - 1;
2872 if (frb_val > kMaxLongLong) {
2873 frt_val = kMaxLongLong;
2874 } else if (frb_val < kMinLongLong) {
2875 frt_val = kMinLongLong;
2877 frt_val = (int64_t)frb_val;
2879 double* p = reinterpret_cast<double*>(&frt_val);
2880 set_d_register_from_double(frt, *p);
2885 int frt = instr->RTValue();
2886 int frb = instr->RBValue();
2887 double frb_val = get_double_from_d_register(frb);
2889 if (frb_val > kMaxInt) {
2891 } else if (frb_val < kMinInt) {
2894 if (opcode == FCTIWZ) {
2895 frt_val = (int64_t)frb_val;
2897 switch (fp_condition_reg_ & kFPRoundingModeMask) {
2899 frt_val = (int64_t)frb_val;
2901 case kRoundToPlusInf:
2902 frt_val = (int64_t)std::ceil(frb_val);
2904 case kRoundToMinusInf:
2905 frt_val = (int64_t)std::floor(frb_val);
2907 case kRoundToNearest:
2908 frt_val = (int64_t)lround(frb_val);
2910 // Round to even if exactly halfway. (lround rounds up)
2911 if (std::fabs(static_cast<double>(frt_val) - frb_val) == 0.5 &&
2913 frt_val += ((frt_val > 0) ? -1 : 1);
2919 frt_val = (int64_t)frb_val;
2924 double* p = reinterpret_cast<double*>(&frt_val);
2925 set_d_register_from_double(frt, *p);
2929 int frt = instr->RTValue();
2930 int frb = instr->RBValue();
2931 double frb_val = get_double_from_d_register(frb);
2932 double frt_val = -frb_val;
2933 set_d_register_from_double(frt, frt_val);
2937 int frt = instr->RTValue();
2938 int frb = instr->RBValue();
2939 int64_t frb_val = get_d_register(frb);
2940 set_d_register(frt, frb_val);
2944 int bf = instr->Bits(25, 23);
2945 int imm = instr->Bits(15, 12);
2946 int fp_condition_mask = 0xF0000000 >> (bf * 4);
2947 fp_condition_reg_ &= ~fp_condition_mask;
2948 fp_condition_reg_ |= (imm << (28 - (bf * 4)));
2949 if (instr->Bit(0)) { // RC bit set
2950 condition_reg_ &= 0xF0FFFFFF;
2951 condition_reg_ |= (imm << 23);
2956 int frb = instr->RBValue();
2957 int64_t frb_dval = get_d_register(frb);
2958 int32_t frb_ival = static_cast<int32_t>((frb_dval)&0xffffffff);
2959 int l = instr->Bits(25, 25);
2961 fp_condition_reg_ = frb_ival;
2965 if (instr->Bit(0)) { // RC bit set
2967 // int w = instr->Bits(16, 16);
2968 // int flm = instr->Bits(24, 17);
2973 int frt = instr->RTValue();
2974 int64_t lval = static_cast<int64_t>(fp_condition_reg_);
2975 set_d_register(frt, lval);
2979 int frt = instr->RTValue();
2980 int frb = instr->RBValue();
2981 double frb_val = get_double_from_d_register(frb);
2982 double frt_val = std::fabs(frb_val);
2983 set_d_register_from_double(frt, frt_val);
2987 UNIMPLEMENTED(); // Not used by V8.
2990 #if V8_TARGET_ARCH_PPC64
2991 void Simulator::ExecuteExt5(Instruction* instr) {
2992 switch (instr->Bits(4, 2) << 2) {
2994 int ra = instr->RAValue();
2995 int rs = instr->RSValue();
2996 uintptr_t rs_val = get_register(rs);
2997 int sh = (instr->Bits(15, 11) | (instr->Bit(1) << 5));
2998 int mb = (instr->Bits(10, 6) | (instr->Bit(5) << 5));
2999 DCHECK(sh >= 0 && sh <= 63);
3000 DCHECK(mb >= 0 && mb <= 63);
3002 uintptr_t result = (rs_val << sh) | (rs_val >> (64 - sh));
3003 uintptr_t mask = 0xffffffffffffffff >> mb;
3005 set_register(ra, result);
3006 if (instr->Bit(0)) { // RC bit set
3012 int ra = instr->RAValue();
3013 int rs = instr->RSValue();
3014 uintptr_t rs_val = get_register(rs);
3015 int sh = (instr->Bits(15, 11) | (instr->Bit(1) << 5));
3016 int me = (instr->Bits(10, 6) | (instr->Bit(5) << 5));
3017 DCHECK(sh >= 0 && sh <= 63);
3018 DCHECK(me >= 0 && me <= 63);
3020 uintptr_t result = (rs_val << sh) | (rs_val >> (64 - sh));
3021 uintptr_t mask = 0xffffffffffffffff << (63 - me);
3023 set_register(ra, result);
3024 if (instr->Bit(0)) { // RC bit set
3030 int ra = instr->RAValue();
3031 int rs = instr->RSValue();
3032 uintptr_t rs_val = get_register(rs);
3033 int sh = (instr->Bits(15, 11) | (instr->Bit(1) << 5));
3034 int mb = (instr->Bits(10, 6) | (instr->Bit(5) << 5));
3035 DCHECK(sh >= 0 && sh <= 63);
3036 DCHECK(mb >= 0 && mb <= 63);
3038 uintptr_t result = (rs_val << sh) | (rs_val >> (64 - sh));
3039 uintptr_t mask = (0xffffffffffffffff >> mb) & (0xffffffffffffffff << sh);
3041 set_register(ra, result);
3042 if (instr->Bit(0)) { // RC bit set
3048 int ra = instr->RAValue();
3049 int rs = instr->RSValue();
3050 uintptr_t rs_val = get_register(rs);
3051 intptr_t ra_val = get_register(ra);
3052 int sh = (instr->Bits(15, 11) | (instr->Bit(1) << 5));
3053 int mb = (instr->Bits(10, 6) | (instr->Bit(5) << 5));
3056 uintptr_t result = (rs_val << sh) | (rs_val >> (64 - sh));
3059 uintptr_t bit = 0x8000000000000000 >> mb;
3060 for (; mb <= me; mb++) {
3064 } else if (mb == me + 1) {
3065 mask = 0xffffffffffffffff;
3066 } else { // mb > me+1
3067 uintptr_t bit = 0x8000000000000000 >> (me + 1); // needs to be tested
3068 mask = 0xffffffffffffffff;
3069 for (; me < mb; me++) {
3077 set_register(ra, result);
3078 if (instr->Bit(0)) { // RC bit set
3084 switch (instr->Bits(4, 1) << 1) {
3086 int ra = instr->RAValue();
3087 int rs = instr->RSValue();
3088 int rb = instr->RBValue();
3089 uintptr_t rs_val = get_register(rs);
3090 uintptr_t rb_val = get_register(rb);
3091 int sh = (rb_val & 0x3f);
3092 int mb = (instr->Bits(10, 6) | (instr->Bit(5) << 5));
3093 DCHECK(sh >= 0 && sh <= 63);
3094 DCHECK(mb >= 0 && mb <= 63);
3096 uintptr_t result = (rs_val << sh) | (rs_val >> (64 - sh));
3097 uintptr_t mask = 0xffffffffffffffff >> mb;
3099 set_register(ra, result);
3100 if (instr->Bit(0)) { // RC bit set
3106 UNIMPLEMENTED(); // Not used by V8.
3111 void Simulator::ExecuteGeneric(Instruction* instr) {
3112 int opcode = instr->OpcodeValue() << 26;
3115 int rt = instr->RTValue();
3116 int ra = instr->RAValue();
3117 intptr_t ra_val = get_register(ra);
3118 int32_t im_val = instr->Bits(15, 0);
3119 im_val = SIGN_EXT_IMM16(im_val);
3120 intptr_t alu_out = im_val - ra_val;
3121 set_register(rt, alu_out);
3122 // todo - handle RC bit
3126 int ra = instr->RAValue();
3127 uint32_t im_val = instr->Bits(15, 0);
3128 int cr = instr->Bits(25, 23);
3130 #if V8_TARGET_ARCH_PPC64
3131 int L = instr->Bit(21);
3134 uintptr_t ra_val = get_register(ra);
3135 if (ra_val < im_val) {
3138 if (ra_val > im_val) {
3141 if (ra_val == im_val) {
3144 #if V8_TARGET_ARCH_PPC64
3146 uint32_t ra_val = get_register(ra);
3147 if (ra_val < im_val) {
3150 if (ra_val > im_val) {
3153 if (ra_val == im_val) {
3158 uint32_t condition_mask = 0xF0000000U >> (cr * 4);
3159 uint32_t condition = bf >> (cr * 4);
3160 condition_reg_ = (condition_reg_ & ~condition_mask) | condition;
3164 int ra = instr->RAValue();
3165 int32_t im_val = instr->Bits(15, 0);
3166 im_val = SIGN_EXT_IMM16(im_val);
3167 int cr = instr->Bits(25, 23);
3169 #if V8_TARGET_ARCH_PPC64
3170 int L = instr->Bit(21);
3173 intptr_t ra_val = get_register(ra);
3174 if (ra_val < im_val) {
3177 if (ra_val > im_val) {
3180 if (ra_val == im_val) {
3183 #if V8_TARGET_ARCH_PPC64
3185 int32_t ra_val = get_register(ra);
3186 if (ra_val < im_val) {
3189 if (ra_val > im_val) {
3192 if (ra_val == im_val) {
3197 uint32_t condition_mask = 0xF0000000U >> (cr * 4);
3198 uint32_t condition = bf >> (cr * 4);
3199 condition_reg_ = (condition_reg_ & ~condition_mask) | condition;
3203 int rt = instr->RTValue();
3204 int ra = instr->RAValue();
3205 uintptr_t ra_val = get_register(ra);
3206 uintptr_t im_val = SIGN_EXT_IMM16(instr->Bits(15, 0));
3207 uintptr_t alu_out = ra_val + im_val;
3209 if (~ra_val < im_val) {
3210 special_reg_xer_ = (special_reg_xer_ & ~0xF0000000) | 0x20000000;
3212 special_reg_xer_ &= ~0xF0000000;
3214 set_register(rt, alu_out);
3218 int rt = instr->RTValue();
3219 int ra = instr->RAValue();
3220 int32_t im_val = SIGN_EXT_IMM16(instr->Bits(15, 0));
3225 intptr_t ra_val = get_register(ra);
3226 alu_out = ra_val + im_val;
3228 set_register(rt, alu_out);
3229 // todo - handle RC bit
3233 int rt = instr->RTValue();
3234 int ra = instr->RAValue();
3235 int32_t im_val = (instr->Bits(15, 0) << 16);
3237 if (ra == 0) { // treat r0 as zero
3240 intptr_t ra_val = get_register(ra);
3241 alu_out = ra_val + im_val;
3243 set_register(rt, alu_out);
3247 ExecuteBranchConditional(instr);
3251 int offset = (instr->Bits(25, 2) << 8) >> 6;
3252 if (instr->Bit(0) == 1) { // LK flag set
3253 special_reg_lr_ = get_pc() + 4;
3255 set_pc(get_pc() + offset);
3264 int ra = instr->RAValue();
3265 int rs = instr->RSValue();
3266 uint32_t rs_val = get_register(rs);
3267 int32_t ra_val = get_register(ra);
3268 int sh = instr->Bits(15, 11);
3269 int mb = instr->Bits(10, 6);
3270 int me = instr->Bits(5, 1);
3272 uint32_t result = (rs_val << sh) | (rs_val >> (32 - sh));
3275 int bit = 0x80000000 >> mb;
3276 for (; mb <= me; mb++) {
3280 } else if (mb == me + 1) {
3282 } else { // mb > me+1
3283 int bit = 0x80000000 >> (me + 1); // needs to be tested
3285 for (; me < mb; me++) {
3293 set_register(ra, result);
3294 if (instr->Bit(0)) { // RC bit set
3301 int ra = instr->RAValue();
3302 int rs = instr->RSValue();
3303 uint32_t rs_val = get_register(rs);
3305 if (opcode == RLWINMX) {
3306 sh = instr->Bits(15, 11);
3308 int rb = instr->RBValue();
3309 uint32_t rb_val = get_register(rb);
3310 sh = (rb_val & 0x1f);
3312 int mb = instr->Bits(10, 6);
3313 int me = instr->Bits(5, 1);
3315 uint32_t result = (rs_val << sh) | (rs_val >> (32 - sh));
3318 int bit = 0x80000000 >> mb;
3319 for (; mb <= me; mb++) {
3323 } else if (mb == me + 1) {
3325 } else { // mb > me+1
3326 int bit = 0x80000000 >> (me + 1); // needs to be tested
3328 for (; me < mb; me++) {
3334 set_register(ra, result);
3335 if (instr->Bit(0)) { // RC bit set
3341 int rs = instr->RSValue();
3342 int ra = instr->RAValue();
3343 intptr_t rs_val = get_register(rs);
3344 uint32_t im_val = instr->Bits(15, 0);
3345 intptr_t alu_out = rs_val | im_val;
3346 set_register(ra, alu_out);
3350 int rs = instr->RSValue();
3351 int ra = instr->RAValue();
3352 intptr_t rs_val = get_register(rs);
3353 uint32_t im_val = instr->Bits(15, 0);
3354 intptr_t alu_out = rs_val | (im_val << 16);
3355 set_register(ra, alu_out);
3359 int rs = instr->RSValue();
3360 int ra = instr->RAValue();
3361 intptr_t rs_val = get_register(rs);
3362 uint32_t im_val = instr->Bits(15, 0);
3363 intptr_t alu_out = rs_val ^ im_val;
3364 set_register(ra, alu_out);
3365 // todo - set condition based SO bit
3369 int rs = instr->RSValue();
3370 int ra = instr->RAValue();
3371 intptr_t rs_val = get_register(rs);
3372 uint32_t im_val = instr->Bits(15, 0);
3373 intptr_t alu_out = rs_val ^ (im_val << 16);
3374 set_register(ra, alu_out);
3378 int rs = instr->RSValue();
3379 int ra = instr->RAValue();
3380 intptr_t rs_val = get_register(rs);
3381 uint32_t im_val = instr->Bits(15, 0);
3382 intptr_t alu_out = rs_val & im_val;
3383 set_register(ra, alu_out);
3388 int rs = instr->RSValue();
3389 int ra = instr->RAValue();
3390 intptr_t rs_val = get_register(rs);
3391 uint32_t im_val = instr->Bits(15, 0);
3392 intptr_t alu_out = rs_val & (im_val << 16);
3393 set_register(ra, alu_out);
3404 int ra = instr->RAValue();
3405 int rt = instr->RTValue();
3406 intptr_t ra_val = ra == 0 ? 0 : get_register(ra);
3407 int offset = SIGN_EXT_IMM16(instr->Bits(15, 0));
3408 set_register(rt, ReadWU(ra_val + offset, instr));
3409 if (opcode == LWZU) {
3411 set_register(ra, ra_val + offset);
3418 int ra = instr->RAValue();
3419 int rt = instr->RTValue();
3420 intptr_t ra_val = ra == 0 ? 0 : get_register(ra);
3421 int offset = SIGN_EXT_IMM16(instr->Bits(15, 0));
3422 set_register(rt, ReadB(ra_val + offset) & 0xFF);
3423 if (opcode == LBZU) {
3425 set_register(ra, ra_val + offset);
3432 int ra = instr->RAValue();
3433 int rs = instr->RSValue();
3434 intptr_t ra_val = ra == 0 ? 0 : get_register(ra);
3435 int32_t rs_val = get_register(rs);
3436 int offset = SIGN_EXT_IMM16(instr->Bits(15, 0));
3437 WriteW(ra_val + offset, rs_val, instr);
3438 if (opcode == STWU) {
3440 set_register(ra, ra_val + offset);
3442 // printf("r%d %08x -> %08x\n", rs, rs_val, offset); // 0xdead
3448 int ra = instr->RAValue();
3449 int rs = instr->RSValue();
3450 intptr_t ra_val = ra == 0 ? 0 : get_register(ra);
3451 int8_t rs_val = get_register(rs);
3452 int offset = SIGN_EXT_IMM16(instr->Bits(15, 0));
3453 WriteB(ra_val + offset, rs_val);
3454 if (opcode == STBU) {
3456 set_register(ra, ra_val + offset);
3463 int ra = instr->RAValue();
3464 int rt = instr->RTValue();
3465 intptr_t ra_val = ra == 0 ? 0 : get_register(ra);
3466 int offset = SIGN_EXT_IMM16(instr->Bits(15, 0));
3467 uintptr_t result = ReadHU(ra_val + offset, instr) & 0xffff;
3468 set_register(rt, result);
3469 if (opcode == LHZU) {
3470 set_register(ra, ra_val + offset);
3477 int ra = instr->RAValue();
3478 int rt = instr->RTValue();
3479 intptr_t ra_val = ra == 0 ? 0 : get_register(ra);
3480 int offset = SIGN_EXT_IMM16(instr->Bits(15, 0));
3481 intptr_t result = ReadH(ra_val + offset, instr);
3482 set_register(rt, result);
3483 if (opcode == LHAU) {
3484 set_register(ra, ra_val + offset);
3491 int ra = instr->RAValue();
3492 int rs = instr->RSValue();
3493 intptr_t ra_val = ra == 0 ? 0 : get_register(ra);
3494 int16_t rs_val = get_register(rs);
3495 int offset = SIGN_EXT_IMM16(instr->Bits(15, 0));
3496 WriteH(ra_val + offset, rs_val, instr);
3497 if (opcode == STHU) {
3499 set_register(ra, ra_val + offset);
3512 int frt = instr->RTValue();
3513 int ra = instr->RAValue();
3514 int32_t offset = SIGN_EXT_IMM16(instr->Bits(15, 0));
3515 intptr_t ra_val = ra == 0 ? 0 : get_register(ra);
3516 int32_t val = ReadW(ra_val + offset, instr);
3517 float* fptr = reinterpret_cast<float*>(&val);
3518 set_d_register_from_double(frt, static_cast<double>(*fptr));
3519 if (opcode == LFSU) {
3521 set_register(ra, ra_val + offset);
3528 int frt = instr->RTValue();
3529 int ra = instr->RAValue();
3530 int32_t offset = SIGN_EXT_IMM16(instr->Bits(15, 0));
3531 intptr_t ra_val = ra == 0 ? 0 : get_register(ra);
3532 int64_t* dptr = reinterpret_cast<int64_t*>(ReadDW(ra_val + offset));
3533 set_d_register(frt, *dptr);
3534 if (opcode == LFDU) {
3536 set_register(ra, ra_val + offset);
3543 int frs = instr->RSValue();
3544 int ra = instr->RAValue();
3545 int32_t offset = SIGN_EXT_IMM16(instr->Bits(15, 0));
3546 intptr_t ra_val = ra == 0 ? 0 : get_register(ra);
3547 float frs_val = static_cast<float>(get_double_from_d_register(frs));
3548 int32_t* p = reinterpret_cast<int32_t*>(&frs_val);
3549 WriteW(ra_val + offset, *p, instr);
3550 if (opcode == STFSU) {
3552 set_register(ra, ra_val + offset);
3559 int frs = instr->RSValue();
3560 int ra = instr->RAValue();
3561 int32_t offset = SIGN_EXT_IMM16(instr->Bits(15, 0));
3562 intptr_t ra_val = ra == 0 ? 0 : get_register(ra);
3563 int64_t frs_val = get_d_register(frs);
3564 WriteDW(ra_val + offset, frs_val);
3565 if (opcode == STFDU) {
3567 set_register(ra, ra_val + offset);
3579 #if V8_TARGET_ARCH_PPC64
3585 int ra = instr->RAValue();
3586 int rt = instr->RTValue();
3587 int64_t ra_val = ra == 0 ? 0 : get_register(ra);
3588 int offset = SIGN_EXT_IMM16(instr->Bits(15, 0) & ~3);
3589 switch (instr->Bits(1, 0)) {
3591 intptr_t* result = ReadDW(ra_val + offset);
3592 set_register(rt, *result);
3596 intptr_t* result = ReadDW(ra_val + offset);
3597 set_register(rt, *result);
3599 set_register(ra, ra_val + offset);
3603 intptr_t result = ReadW(ra_val + offset, instr);
3604 set_register(rt, result);
3612 int ra = instr->RAValue();
3613 int rs = instr->RSValue();
3614 int64_t ra_val = ra == 0 ? 0 : get_register(ra);
3615 int64_t rs_val = get_register(rs);
3616 int offset = SIGN_EXT_IMM16(instr->Bits(15, 0) & ~3);
3617 WriteDW(ra_val + offset, rs_val);
3618 if (instr->Bit(0) == 1) { // This is the STDU form
3620 set_register(ra, ra_val + offset);
3634 void Simulator::Trace(Instruction* instr) {
3635 disasm::NameConverter converter;
3636 disasm::Disassembler dasm(converter);
3637 // use a reasonably large buffer
3638 v8::internal::EmbeddedVector<char, 256> buffer;
3639 dasm.InstructionDecode(buffer, reinterpret_cast<byte*>(instr));
3640 PrintF("%05d %08" V8PRIxPTR " %s\n", icount_,
3641 reinterpret_cast<intptr_t>(instr), buffer.start());
3645 // Executes the current instruction.
3646 void Simulator::ExecuteInstruction(Instruction* instr) {
3647 if (v8::internal::FLAG_check_icache) {
3648 CheckICache(isolate_->simulator_i_cache(), instr);
3650 pc_modified_ = false;
3651 if (::v8::internal::FLAG_trace_sim) {
3654 int opcode = instr->OpcodeValue() << 26;
3655 if (opcode == TWI) {
3656 SoftwareInterrupt(instr);
3658 ExecuteGeneric(instr);
3660 if (!pc_modified_) {
3661 set_pc(reinterpret_cast<intptr_t>(instr) + Instruction::kInstrSize);
3666 void Simulator::Execute() {
3667 // Get the PC to simulate. Cannot use the accessor here as we need the
3668 // raw PC value and not the one used as input to arithmetic instructions.
3669 intptr_t program_counter = get_pc();
3671 if (::v8::internal::FLAG_stop_sim_at == 0) {
3672 // Fast version of the dispatch loop without checking whether the simulator
3673 // should be stopping at a particular executed instruction.
3674 while (program_counter != end_sim_pc) {
3675 Instruction* instr = reinterpret_cast<Instruction*>(program_counter);
3677 ExecuteInstruction(instr);
3678 program_counter = get_pc();
3681 // FLAG_stop_sim_at is at the non-default value. Stop in the debugger when
3682 // we reach the particular instuction count.
3683 while (program_counter != end_sim_pc) {
3684 Instruction* instr = reinterpret_cast<Instruction*>(program_counter);
3686 if (icount_ == ::v8::internal::FLAG_stop_sim_at) {
3687 PPCDebugger dbg(this);
3690 ExecuteInstruction(instr);
3692 program_counter = get_pc();
3698 void Simulator::CallInternal(byte* entry) {
3699 // Prepare to execute the code at entry
3700 #if ABI_USES_FUNCTION_DESCRIPTORS
3701 // entry is the function descriptor
3702 set_pc(*(reinterpret_cast<intptr_t*>(entry)));
3704 // entry is the instruction address
3705 set_pc(reinterpret_cast<intptr_t>(entry));
3708 // Put down marker for end of simulation. The simulator will stop simulation
3709 // when the PC reaches this value. By saving the "end simulation" value into
3710 // the LR the simulation stops when returning to this call point.
3711 special_reg_lr_ = end_sim_pc;
3713 // Remember the values of non-volatile registers.
3714 intptr_t r2_val = get_register(r2);
3715 intptr_t r13_val = get_register(r13);
3716 intptr_t r14_val = get_register(r14);
3717 intptr_t r15_val = get_register(r15);
3718 intptr_t r16_val = get_register(r16);
3719 intptr_t r17_val = get_register(r17);
3720 intptr_t r18_val = get_register(r18);
3721 intptr_t r19_val = get_register(r19);
3722 intptr_t r20_val = get_register(r20);
3723 intptr_t r21_val = get_register(r21);
3724 intptr_t r22_val = get_register(r22);
3725 intptr_t r23_val = get_register(r23);
3726 intptr_t r24_val = get_register(r24);
3727 intptr_t r25_val = get_register(r25);
3728 intptr_t r26_val = get_register(r26);
3729 intptr_t r27_val = get_register(r27);
3730 intptr_t r28_val = get_register(r28);
3731 intptr_t r29_val = get_register(r29);
3732 intptr_t r30_val = get_register(r30);
3733 intptr_t r31_val = get_register(fp);
3735 // Set up the non-volatile registers with a known value. To be able to check
3736 // that they are preserved properly across JS execution.
3737 intptr_t callee_saved_value = icount_;
3738 set_register(r2, callee_saved_value);
3739 set_register(r13, callee_saved_value);
3740 set_register(r14, callee_saved_value);
3741 set_register(r15, callee_saved_value);
3742 set_register(r16, callee_saved_value);
3743 set_register(r17, callee_saved_value);
3744 set_register(r18, callee_saved_value);
3745 set_register(r19, callee_saved_value);
3746 set_register(r20, callee_saved_value);
3747 set_register(r21, callee_saved_value);
3748 set_register(r22, callee_saved_value);
3749 set_register(r23, callee_saved_value);
3750 set_register(r24, callee_saved_value);
3751 set_register(r25, callee_saved_value);
3752 set_register(r26, callee_saved_value);
3753 set_register(r27, callee_saved_value);
3754 set_register(r28, callee_saved_value);
3755 set_register(r29, callee_saved_value);
3756 set_register(r30, callee_saved_value);
3757 set_register(fp, callee_saved_value);
3759 // Start the simulation
3762 // Check that the non-volatile registers have been preserved.
3763 CHECK_EQ(callee_saved_value, get_register(r2));
3764 CHECK_EQ(callee_saved_value, get_register(r13));
3765 CHECK_EQ(callee_saved_value, get_register(r14));
3766 CHECK_EQ(callee_saved_value, get_register(r15));
3767 CHECK_EQ(callee_saved_value, get_register(r16));
3768 CHECK_EQ(callee_saved_value, get_register(r17));
3769 CHECK_EQ(callee_saved_value, get_register(r18));
3770 CHECK_EQ(callee_saved_value, get_register(r19));
3771 CHECK_EQ(callee_saved_value, get_register(r20));
3772 CHECK_EQ(callee_saved_value, get_register(r21));
3773 CHECK_EQ(callee_saved_value, get_register(r22));
3774 CHECK_EQ(callee_saved_value, get_register(r23));
3775 CHECK_EQ(callee_saved_value, get_register(r24));
3776 CHECK_EQ(callee_saved_value, get_register(r25));
3777 CHECK_EQ(callee_saved_value, get_register(r26));
3778 CHECK_EQ(callee_saved_value, get_register(r27));
3779 CHECK_EQ(callee_saved_value, get_register(r28));
3780 CHECK_EQ(callee_saved_value, get_register(r29));
3781 CHECK_EQ(callee_saved_value, get_register(r30));
3782 CHECK_EQ(callee_saved_value, get_register(fp));
3784 // Restore non-volatile registers with the original value.
3785 set_register(r2, r2_val);
3786 set_register(r13, r13_val);
3787 set_register(r14, r14_val);
3788 set_register(r15, r15_val);
3789 set_register(r16, r16_val);
3790 set_register(r17, r17_val);
3791 set_register(r18, r18_val);
3792 set_register(r19, r19_val);
3793 set_register(r20, r20_val);
3794 set_register(r21, r21_val);
3795 set_register(r22, r22_val);
3796 set_register(r23, r23_val);
3797 set_register(r24, r24_val);
3798 set_register(r25, r25_val);
3799 set_register(r26, r26_val);
3800 set_register(r27, r27_val);
3801 set_register(r28, r28_val);
3802 set_register(r29, r29_val);
3803 set_register(r30, r30_val);
3804 set_register(fp, r31_val);
3808 intptr_t Simulator::Call(byte* entry, int argument_count, ...) {
3810 va_start(parameters, argument_count);
3813 // First eight arguments passed in registers r3-r10.
3814 int reg_arg_count = (argument_count > 8) ? 8 : argument_count;
3815 int stack_arg_count = argument_count - reg_arg_count;
3816 for (int i = 0; i < reg_arg_count; i++) {
3817 set_register(i + 3, va_arg(parameters, intptr_t));
3820 // Remaining arguments passed on stack.
3821 intptr_t original_stack = get_register(sp);
3822 // Compute position of stack on entry to generated code.
3823 intptr_t entry_stack =
3825 (kNumRequiredStackFrameSlots + stack_arg_count) * sizeof(intptr_t));
3826 if (base::OS::ActivationFrameAlignment() != 0) {
3827 entry_stack &= -base::OS::ActivationFrameAlignment();
3829 // Store remaining arguments on stack, from low to high memory.
3830 // +2 is a hack for the LR slot + old SP on PPC
3831 intptr_t* stack_argument =
3832 reinterpret_cast<intptr_t*>(entry_stack) + kStackFrameExtraParamSlot;
3833 for (int i = 0; i < stack_arg_count; i++) {
3834 stack_argument[i] = va_arg(parameters, intptr_t);
3837 set_register(sp, entry_stack);
3839 CallInternal(entry);
3841 // Pop stack passed arguments.
3842 CHECK_EQ(entry_stack, get_register(sp));
3843 set_register(sp, original_stack);
3845 intptr_t result = get_register(r3);
3850 void Simulator::CallFP(byte* entry, double d0, double d1) {
3851 set_d_register_from_double(1, d0);
3852 set_d_register_from_double(2, d1);
3853 CallInternal(entry);
3857 int32_t Simulator::CallFPReturnsInt(byte* entry, double d0, double d1) {
3858 CallFP(entry, d0, d1);
3859 int32_t result = get_register(r3);
3864 double Simulator::CallFPReturnsDouble(byte* entry, double d0, double d1) {
3865 CallFP(entry, d0, d1);
3866 return get_double_from_d_register(1);
3870 uintptr_t Simulator::PushAddress(uintptr_t address) {
3871 uintptr_t new_sp = get_register(sp) - sizeof(uintptr_t);
3872 uintptr_t* stack_slot = reinterpret_cast<uintptr_t*>(new_sp);
3873 *stack_slot = address;
3874 set_register(sp, new_sp);
3879 uintptr_t Simulator::PopAddress() {
3880 uintptr_t current_sp = get_register(sp);
3881 uintptr_t* stack_slot = reinterpret_cast<uintptr_t*>(current_sp);
3882 uintptr_t address = *stack_slot;
3883 set_register(sp, current_sp + sizeof(uintptr_t));
3887 } // namespace v8::internal
3889 #endif // USE_SIMULATOR
3890 #endif // V8_TARGET_ARCH_PPC