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3 // modification, are permitted provided that the following conditions are
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28 #ifndef V8_MIPS_MACRO_ASSEMBLER_MIPS_H_
29 #define V8_MIPS_MACRO_ASSEMBLER_MIPS_H_
31 #include "assembler.h"
32 #include "mips/assembler-mips.h"
33 #include "v8globals.h"
38 // Forward declaration.
41 // Reserved Register Usage Summary.
43 // Registers t8, t9, and at are reserved for use by the MacroAssembler.
45 // The programmer should know that the MacroAssembler may clobber these three,
46 // but won't touch other registers except in special cases.
48 // Per the MIPS ABI, register t9 must be used for indirect function call
49 // via 'jalr t9' or 'jr t9' instructions. This is relied upon by gcc when
50 // trying to update gp register for position-independent-code. Whenever
51 // MIPS generated code calls C code, it must be via t9 register.
54 // Flags used for AllocateHeapNumber
62 // Flags used for the ObjectToDoubleFPURegister function.
63 enum ObjectToDoubleFlags {
65 NO_OBJECT_TO_DOUBLE_FLAGS = 0,
66 // Object is known to be a non smi.
67 OBJECT_NOT_SMI = 1 << 0,
68 // Don't load NaNs or infinities, branch to the non number case instead.
69 AVOID_NANS_AND_INFINITIES = 1 << 1
72 // Allow programmer to use Branch Delay Slot of Branches, Jumps, Calls.
73 enum BranchDelaySlot {
78 // Flags used for the li macro-assembler function.
80 // If the constant value can be represented in just 16 bits, then
81 // optimize the li to use a single instruction, rather than lui/ori pair.
83 // Always use 2 instructions (lui/ori pair), even if the constant could
84 // be loaded with just one, so that this value is patchable later.
89 enum RememberedSetAction { EMIT_REMEMBERED_SET, OMIT_REMEMBERED_SET };
90 enum SmiCheck { INLINE_SMI_CHECK, OMIT_SMI_CHECK };
91 enum RAStatus { kRAHasNotBeenSaved, kRAHasBeenSaved };
93 bool AreAliased(Register r1, Register r2, Register r3, Register r4);
96 // -----------------------------------------------------------------------------
97 // Static helper functions.
99 inline MemOperand ContextOperand(Register context, int index) {
100 return MemOperand(context, Context::SlotOffset(index));
104 inline MemOperand GlobalObjectOperand() {
105 return ContextOperand(cp, Context::GLOBAL_OBJECT_INDEX);
109 // Generate a MemOperand for loading a field from an object.
110 inline MemOperand FieldMemOperand(Register object, int offset) {
111 return MemOperand(object, offset - kHeapObjectTag);
115 // Generate a MemOperand for storing arguments 5..N on the stack
116 // when calling CallCFunction().
117 inline MemOperand CFunctionArgumentOperand(int index) {
118 ASSERT(index > kCArgSlotCount);
119 // Argument 5 takes the slot just past the four Arg-slots.
120 int offset = (index - 5) * kPointerSize + kCArgsSlotsSize;
121 return MemOperand(sp, offset);
125 // MacroAssembler implements a collection of frequently used macros.
126 class MacroAssembler: public Assembler {
128 // The isolate parameter can be NULL if the macro assembler should
129 // not use isolate-dependent functionality. In this case, it's the
130 // responsibility of the caller to never invoke such function on the
132 MacroAssembler(Isolate* isolate, void* buffer, int size);
135 #define COND_TYPED_ARGS Condition cond, Register r1, const Operand& r2
136 #define COND_ARGS cond, r1, r2
138 // Cases when relocation is not needed.
139 #define DECLARE_NORELOC_PROTOTYPE(Name, target_type) \
140 void Name(target_type target, BranchDelaySlot bd = PROTECT); \
141 inline void Name(BranchDelaySlot bd, target_type target) { \
144 void Name(target_type target, \
146 BranchDelaySlot bd = PROTECT); \
147 inline void Name(BranchDelaySlot bd, \
148 target_type target, \
150 Name(target, COND_ARGS, bd); \
153 #define DECLARE_BRANCH_PROTOTYPES(Name) \
154 DECLARE_NORELOC_PROTOTYPE(Name, Label*) \
155 DECLARE_NORELOC_PROTOTYPE(Name, int16_t)
157 DECLARE_BRANCH_PROTOTYPES(Branch)
158 DECLARE_BRANCH_PROTOTYPES(BranchAndLink)
160 #undef DECLARE_BRANCH_PROTOTYPES
161 #undef COND_TYPED_ARGS
165 // Jump, Call, and Ret pseudo instructions implementing inter-working.
166 #define COND_ARGS Condition cond = al, Register rs = zero_reg, \
167 const Operand& rt = Operand(zero_reg), BranchDelaySlot bd = PROTECT
169 void Jump(Register target, COND_ARGS);
170 void Jump(intptr_t target, RelocInfo::Mode rmode, COND_ARGS);
171 void Jump(Address target, RelocInfo::Mode rmode, COND_ARGS);
172 void Jump(Handle<Code> code, RelocInfo::Mode rmode, COND_ARGS);
173 static int CallSize(Register target, COND_ARGS);
174 void Call(Register target, COND_ARGS);
175 static int CallSize(Address target, RelocInfo::Mode rmode, COND_ARGS);
176 void Call(Address target, RelocInfo::Mode rmode, COND_ARGS);
177 int CallSize(Handle<Code> code,
178 RelocInfo::Mode rmode = RelocInfo::CODE_TARGET,
179 TypeFeedbackId ast_id = TypeFeedbackId::None(),
181 void Call(Handle<Code> code,
182 RelocInfo::Mode rmode = RelocInfo::CODE_TARGET,
183 TypeFeedbackId ast_id = TypeFeedbackId::None(),
186 inline void Ret(BranchDelaySlot bd, Condition cond = al,
187 Register rs = zero_reg, const Operand& rt = Operand(zero_reg)) {
188 Ret(cond, rs, rt, bd);
191 void Branch(Label* L,
194 Heap::RootListIndex index,
195 BranchDelaySlot bdslot = PROTECT);
199 // Emit code to discard a non-negative number of pointer-sized elements
200 // from the stack, clobbering only the sp register.
202 Condition cond = cc_always,
203 Register reg = no_reg,
204 const Operand& op = Operand(no_reg));
206 // Trivial case of DropAndRet that utilizes the delay slot and only emits
208 void DropAndRet(int drop);
210 void DropAndRet(int drop,
215 // Swap two registers. If the scratch register is omitted then a slightly
216 // less efficient form using xor instead of mov is emitted.
217 void Swap(Register reg1, Register reg2, Register scratch = no_reg);
219 void Call(Label* target);
221 inline void Move(Register dst, Register src) {
227 inline void Move(FPURegister dst, FPURegister src) {
233 inline void Move(Register dst_low, Register dst_high, FPURegister src) {
235 mfc1(dst_high, FPURegister::from_code(src.code() + 1));
238 inline void Move(FPURegister dst, Register src_low, Register src_high) {
240 mtc1(src_high, FPURegister::from_code(dst.code() + 1));
244 void Move(FPURegister dst, double imm);
245 void Movz(Register rd, Register rs, Register rt);
246 void Movn(Register rd, Register rs, Register rt);
247 void Movt(Register rd, Register rs, uint16_t cc = 0);
248 void Movf(Register rd, Register rs, uint16_t cc = 0);
250 void Clz(Register rd, Register rs);
252 // Jump unconditionally to given label.
253 // We NEED a nop in the branch delay slot, as it used by v8, for example in
254 // CodeGenerator::ProcessDeferred().
255 // Currently the branch delay slot is filled by the MacroAssembler.
256 // Use rather b(Label) for code generation.
261 // Load an object from the root table.
262 void LoadRoot(Register destination,
263 Heap::RootListIndex index);
264 void LoadRoot(Register destination,
265 Heap::RootListIndex index,
266 Condition cond, Register src1, const Operand& src2);
268 // Store an object to the root table.
269 void StoreRoot(Register source,
270 Heap::RootListIndex index);
271 void StoreRoot(Register source,
272 Heap::RootListIndex index,
273 Condition cond, Register src1, const Operand& src2);
275 void LoadHeapObject(Register dst, Handle<HeapObject> object);
277 void LoadObject(Register result, Handle<Object> object) {
278 AllowDeferredHandleDereference heap_object_check;
279 if (object->IsHeapObject()) {
280 LoadHeapObject(result, Handle<HeapObject>::cast(object));
286 // ---------------------------------------------------------------------------
289 void IncrementalMarkingRecordWriteHelper(Register object,
293 enum RememberedSetFinalAction {
299 // Record in the remembered set the fact that we have a pointer to new space
300 // at the address pointed to by the addr register. Only works if addr is not
302 void RememberedSetHelper(Register object, // Used for debug code.
305 SaveFPRegsMode save_fp,
306 RememberedSetFinalAction and_then);
308 void CheckPageFlag(Register object,
312 Label* condition_met);
314 void CheckMapDeprecated(Handle<Map> map,
316 Label* if_deprecated);
318 // Check if object is in new space. Jumps if the object is not in new space.
319 // The register scratch can be object itself, but it will be clobbered.
320 void JumpIfNotInNewSpace(Register object,
323 InNewSpace(object, scratch, ne, branch);
326 // Check if object is in new space. Jumps if the object is in new space.
327 // The register scratch can be object itself, but scratch will be clobbered.
328 void JumpIfInNewSpace(Register object,
331 InNewSpace(object, scratch, eq, branch);
334 // Check if an object has a given incremental marking color.
335 void HasColor(Register object,
342 void JumpIfBlack(Register object,
347 // Checks the color of an object. If the object is already grey or black
348 // then we just fall through, since it is already live. If it is white and
349 // we can determine that it doesn't need to be scanned, then we just mark it
350 // black and fall through. For the rest we jump to the label so the
351 // incremental marker can fix its assumptions.
352 void EnsureNotWhite(Register object,
356 Label* object_is_white_and_not_data);
358 // Detects conservatively whether an object is data-only, i.e. it does need to
359 // be scanned by the garbage collector.
360 void JumpIfDataObject(Register value,
362 Label* not_data_object);
364 // Notify the garbage collector that we wrote a pointer into an object.
365 // |object| is the object being stored into, |value| is the object being
366 // stored. value and scratch registers are clobbered by the operation.
367 // The offset is the offset from the start of the object, not the offset from
368 // the tagged HeapObject pointer. For use with FieldOperand(reg, off).
369 void RecordWriteField(
375 SaveFPRegsMode save_fp,
376 RememberedSetAction remembered_set_action = EMIT_REMEMBERED_SET,
377 SmiCheck smi_check = INLINE_SMI_CHECK);
379 // As above, but the offset has the tag presubtracted. For use with
380 // MemOperand(reg, off).
381 inline void RecordWriteContextSlot(
387 SaveFPRegsMode save_fp,
388 RememberedSetAction remembered_set_action = EMIT_REMEMBERED_SET,
389 SmiCheck smi_check = INLINE_SMI_CHECK) {
390 RecordWriteField(context,
391 offset + kHeapObjectTag,
396 remembered_set_action,
400 // For a given |object| notify the garbage collector that the slot |address|
401 // has been written. |value| is the object being stored. The value and
402 // address registers are clobbered by the operation.
408 SaveFPRegsMode save_fp,
409 RememberedSetAction remembered_set_action = EMIT_REMEMBERED_SET,
410 SmiCheck smi_check = INLINE_SMI_CHECK);
413 // ---------------------------------------------------------------------------
414 // Inline caching support.
416 // Generate code for checking access rights - used for security checks
417 // on access to global objects across environments. The holder register
418 // is left untouched, whereas both scratch registers are clobbered.
419 void CheckAccessGlobalProxy(Register holder_reg,
423 void GetNumberHash(Register reg0, Register scratch);
425 void LoadFromNumberDictionary(Label* miss,
434 inline void MarkCode(NopMarkerTypes type) {
438 // Check if the given instruction is a 'type' marker.
439 // i.e. check if it is a sll zero_reg, zero_reg, <type> (referenced as
440 // nop(type)). These instructions are generated to mark special location in
441 // the code, like some special IC code.
442 static inline bool IsMarkedCode(Instr instr, int type) {
443 ASSERT((FIRST_IC_MARKER <= type) && (type < LAST_CODE_MARKER));
444 return IsNop(instr, type);
448 static inline int GetCodeMarker(Instr instr) {
449 uint32_t opcode = ((instr & kOpcodeMask));
450 uint32_t rt = ((instr & kRtFieldMask) >> kRtShift);
451 uint32_t rs = ((instr & kRsFieldMask) >> kRsShift);
452 uint32_t sa = ((instr & kSaFieldMask) >> kSaShift);
454 // Return <n> if we have a sll zero_reg, zero_reg, n
456 bool sllzz = (opcode == SLL &&
457 rt == static_cast<uint32_t>(ToNumber(zero_reg)) &&
458 rs == static_cast<uint32_t>(ToNumber(zero_reg)));
460 (sllzz && FIRST_IC_MARKER <= sa && sa < LAST_CODE_MARKER) ? sa : -1;
461 ASSERT((type == -1) ||
462 ((FIRST_IC_MARKER <= type) && (type < LAST_CODE_MARKER)));
468 // ---------------------------------------------------------------------------
469 // Allocation support.
471 // Allocate an object in new space or old pointer space. The object_size is
472 // specified either in bytes or in words if the allocation flag SIZE_IN_WORDS
473 // is passed. If the space is exhausted control continues at the gc_required
474 // label. The allocated object is returned in result. If the flag
475 // tag_allocated_object is true the result is tagged as as a heap object.
476 // All registers are clobbered also when control continues at the gc_required
478 void Allocate(int object_size,
483 AllocationFlags flags);
485 void Allocate(Register object_size,
490 AllocationFlags flags);
492 // Undo allocation in new space. The object passed and objects allocated after
493 // it will no longer be allocated. The caller must make sure that no pointers
494 // are left to the object(s) no longer allocated as they would be invalid when
495 // allocation is undone.
496 void UndoAllocationInNewSpace(Register object, Register scratch);
499 void AllocateTwoByteString(Register result,
505 void AllocateAsciiString(Register result,
511 void AllocateTwoByteConsString(Register result,
516 void AllocateAsciiConsString(Register result,
521 void AllocateTwoByteSlicedString(Register result,
526 void AllocateAsciiSlicedString(Register result,
532 // Allocates a heap number or jumps to the gc_required label if the young
533 // space is full and a scavenge is needed. All registers are clobbered also
534 // when control continues at the gc_required label.
535 void AllocateHeapNumber(Register result,
538 Register heap_number_map,
540 TaggingMode tagging_mode = TAG_RESULT);
541 void AllocateHeapNumberWithValue(Register result,
547 // ---------------------------------------------------------------------------
548 // Instruction macros.
550 #define DEFINE_INSTRUCTION(instr) \
551 void instr(Register rd, Register rs, const Operand& rt); \
552 void instr(Register rd, Register rs, Register rt) { \
553 instr(rd, rs, Operand(rt)); \
555 void instr(Register rs, Register rt, int32_t j) { \
556 instr(rs, rt, Operand(j)); \
559 #define DEFINE_INSTRUCTION2(instr) \
560 void instr(Register rs, const Operand& rt); \
561 void instr(Register rs, Register rt) { \
562 instr(rs, Operand(rt)); \
564 void instr(Register rs, int32_t j) { \
565 instr(rs, Operand(j)); \
568 DEFINE_INSTRUCTION(Addu);
569 DEFINE_INSTRUCTION(Subu);
570 DEFINE_INSTRUCTION(Mul);
571 DEFINE_INSTRUCTION2(Mult);
572 DEFINE_INSTRUCTION2(Multu);
573 DEFINE_INSTRUCTION2(Div);
574 DEFINE_INSTRUCTION2(Divu);
576 DEFINE_INSTRUCTION(And);
577 DEFINE_INSTRUCTION(Or);
578 DEFINE_INSTRUCTION(Xor);
579 DEFINE_INSTRUCTION(Nor);
580 DEFINE_INSTRUCTION2(Neg);
582 DEFINE_INSTRUCTION(Slt);
583 DEFINE_INSTRUCTION(Sltu);
585 // MIPS32 R2 instruction macro.
586 DEFINE_INSTRUCTION(Ror);
588 #undef DEFINE_INSTRUCTION
589 #undef DEFINE_INSTRUCTION2
592 // ---------------------------------------------------------------------------
593 // Pseudo-instructions.
595 void mov(Register rd, Register rt) { or_(rd, rt, zero_reg); }
597 // Load int32 in the rd register.
598 void li(Register rd, Operand j, LiFlags mode = OPTIMIZE_SIZE);
599 inline void li(Register rd, int32_t j, LiFlags mode = OPTIMIZE_SIZE) {
600 li(rd, Operand(j), mode);
602 inline void li(Register dst, Handle<Object> value,
603 LiFlags mode = OPTIMIZE_SIZE) {
604 li(dst, Operand(value), mode);
607 // Push multiple registers on the stack.
608 // Registers are saved in numerical order, with higher numbered registers
609 // saved in higher memory addresses.
610 void MultiPush(RegList regs);
611 void MultiPushReversed(RegList regs);
613 void MultiPushFPU(RegList regs);
614 void MultiPushReversedFPU(RegList regs);
616 void push(Register src) {
617 Addu(sp, sp, Operand(-kPointerSize));
618 sw(src, MemOperand(sp, 0));
620 void Push(Register src) { push(src); }
623 void Push(Handle<Object> handle);
624 void Push(Smi* smi) { Push(Handle<Smi>(smi, isolate())); }
626 // Push two registers. Pushes leftmost register first (to highest address).
627 void Push(Register src1, Register src2) {
628 Subu(sp, sp, Operand(2 * kPointerSize));
629 sw(src1, MemOperand(sp, 1 * kPointerSize));
630 sw(src2, MemOperand(sp, 0 * kPointerSize));
633 // Push three registers. Pushes leftmost register first (to highest address).
634 void Push(Register src1, Register src2, Register src3) {
635 Subu(sp, sp, Operand(3 * kPointerSize));
636 sw(src1, MemOperand(sp, 2 * kPointerSize));
637 sw(src2, MemOperand(sp, 1 * kPointerSize));
638 sw(src3, MemOperand(sp, 0 * kPointerSize));
641 // Push four registers. Pushes leftmost register first (to highest address).
642 void Push(Register src1, Register src2, Register src3, Register src4) {
643 Subu(sp, sp, Operand(4 * kPointerSize));
644 sw(src1, MemOperand(sp, 3 * kPointerSize));
645 sw(src2, MemOperand(sp, 2 * kPointerSize));
646 sw(src3, MemOperand(sp, 1 * kPointerSize));
647 sw(src4, MemOperand(sp, 0 * kPointerSize));
650 void Push(Register src, Condition cond, Register tst1, Register tst2) {
651 // Since we don't have conditional execution we use a Branch.
652 Branch(3, cond, tst1, Operand(tst2));
653 Subu(sp, sp, Operand(kPointerSize));
654 sw(src, MemOperand(sp, 0));
657 // Pops multiple values from the stack and load them in the
658 // registers specified in regs. Pop order is the opposite as in MultiPush.
659 void MultiPop(RegList regs);
660 void MultiPopReversed(RegList regs);
662 void MultiPopFPU(RegList regs);
663 void MultiPopReversedFPU(RegList regs);
665 void pop(Register dst) {
666 lw(dst, MemOperand(sp, 0));
667 Addu(sp, sp, Operand(kPointerSize));
669 void Pop(Register dst) { pop(dst); }
671 // Pop two registers. Pops rightmost register first (from lower address).
672 void Pop(Register src1, Register src2) {
673 ASSERT(!src1.is(src2));
674 lw(src2, MemOperand(sp, 0 * kPointerSize));
675 lw(src1, MemOperand(sp, 1 * kPointerSize));
676 Addu(sp, sp, 2 * kPointerSize);
679 // Pop three registers. Pops rightmost register first (from lower address).
680 void Pop(Register src1, Register src2, Register src3) {
681 lw(src3, MemOperand(sp, 0 * kPointerSize));
682 lw(src2, MemOperand(sp, 1 * kPointerSize));
683 lw(src1, MemOperand(sp, 2 * kPointerSize));
684 Addu(sp, sp, 3 * kPointerSize);
687 void Pop(uint32_t count = 1) {
688 Addu(sp, sp, Operand(count * kPointerSize));
691 // Push and pop the registers that can hold pointers, as defined by the
692 // RegList constant kSafepointSavedRegisters.
693 void PushSafepointRegisters();
694 void PopSafepointRegisters();
695 void PushSafepointRegistersAndDoubles();
696 void PopSafepointRegistersAndDoubles();
697 // Store value in register src in the safepoint stack slot for
699 void StoreToSafepointRegisterSlot(Register src, Register dst);
700 void StoreToSafepointRegistersAndDoublesSlot(Register src, Register dst);
701 // Load the value of the src register from its safepoint stack slot
702 // into register dst.
703 void LoadFromSafepointRegisterSlot(Register dst, Register src);
705 // Flush the I-cache from asm code. You should use CPU::FlushICache from C.
706 // Does not handle errors.
707 void FlushICache(Register address, unsigned instructions);
709 // MIPS32 R2 instruction macro.
710 void Ins(Register rt, Register rs, uint16_t pos, uint16_t size);
711 void Ext(Register rt, Register rs, uint16_t pos, uint16_t size);
713 // ---------------------------------------------------------------------------
714 // FPU macros. These do not handle special cases like NaN or +- inf.
716 // Convert unsigned word to double.
717 void Cvt_d_uw(FPURegister fd, FPURegister fs, FPURegister scratch);
718 void Cvt_d_uw(FPURegister fd, Register rs, FPURegister scratch);
720 // Convert double to unsigned word.
721 void Trunc_uw_d(FPURegister fd, FPURegister fs, FPURegister scratch);
722 void Trunc_uw_d(FPURegister fd, Register rs, FPURegister scratch);
724 void Trunc_w_d(FPURegister fd, FPURegister fs);
725 void Round_w_d(FPURegister fd, FPURegister fs);
726 void Floor_w_d(FPURegister fd, FPURegister fs);
727 void Ceil_w_d(FPURegister fd, FPURegister fs);
728 // Wrapper function for the different cmp/branch types.
729 void BranchF(Label* target,
734 BranchDelaySlot bd = PROTECT);
736 // Alternate (inline) version for better readability with USE_DELAY_SLOT.
737 inline void BranchF(BranchDelaySlot bd,
743 BranchF(target, nan, cc, cmp1, cmp2, bd);
746 // Convert the HeapNumber pointed to by source to a 32bits signed integer
747 // dest. If the HeapNumber does not fit into a 32bits signed integer branch
748 // to not_int32 label. If FPU is available double_scratch is used but not
750 void ConvertToInt32(Register source,
754 FPURegister double_scratch,
757 // Truncates a double using a specific rounding mode, and writes the value
758 // to the result register.
759 // The except_flag will contain any exceptions caused by the instruction.
760 // If check_inexact is kDontCheckForInexactConversion, then the inexact
761 // exception is masked.
762 void EmitFPUTruncate(FPURoundingMode rounding_mode,
764 DoubleRegister double_input,
766 DoubleRegister double_scratch,
767 Register except_flag,
768 CheckForInexactConversion check_inexact
769 = kDontCheckForInexactConversion);
771 // Helper for EmitECMATruncate.
772 // This will truncate a floating-point value outside of the singed 32bit
773 // integer range to a 32bit signed integer.
774 // Expects the double value loaded in input_high and input_low.
775 // Exits with the answer in 'result'.
776 // Note that this code does not work for values in the 32bit range!
777 void EmitOutOfInt32RangeTruncate(Register result,
782 // Performs a truncating conversion of a floating point number as used by
783 // the JS bitwise operations. See ECMA-262 9.5: ToInt32.
784 // Exits with 'result' holding the answer and all other registers clobbered.
785 void EmitECMATruncate(Register result,
786 FPURegister double_input,
787 FPURegister single_scratch,
793 // argc - argument count to be dropped by LeaveExitFrame.
794 // save_doubles - saves FPU registers on stack, currently disabled.
795 // stack_space - extra stack space.
796 void EnterExitFrame(bool save_doubles,
797 int stack_space = 0);
799 // Leave the current exit frame.
800 void LeaveExitFrame(bool save_doubles,
802 bool do_return = false);
804 // Get the actual activation frame alignment for target environment.
805 static int ActivationFrameAlignment();
807 // Make sure the stack is aligned. Only emits code in debug mode.
808 void AssertStackIsAligned();
810 void LoadContext(Register dst, int context_chain_length);
812 // Conditionally load the cached Array transitioned map of type
813 // transitioned_kind from the native context if the map in register
814 // map_in_out is the cached Array map in the native context of
816 void LoadTransitionedArrayMapConditional(
817 ElementsKind expected_kind,
818 ElementsKind transitioned_kind,
821 Label* no_map_match);
823 // Load the initial map for new Arrays from a JSFunction.
824 void LoadInitialArrayMap(Register function_in,
827 bool can_have_holes);
829 void LoadGlobalFunction(int index, Register function);
830 void LoadArrayFunction(Register function);
832 // Load the initial map from the global function. The registers
833 // function and map can be the same, function is then overwritten.
834 void LoadGlobalFunctionInitialMap(Register function,
838 void InitializeRootRegister() {
839 ExternalReference roots_array_start =
840 ExternalReference::roots_array_start(isolate());
841 li(kRootRegister, Operand(roots_array_start));
844 // -------------------------------------------------------------------------
845 // JavaScript invokes.
847 // Set up call kind marking in t1. The method takes t1 as an
848 // explicit first parameter to make the code more readable at the
850 void SetCallKind(Register dst, CallKind kind);
852 // Invoke the JavaScript function code by either calling or jumping.
853 void InvokeCode(Register code,
854 const ParameterCount& expected,
855 const ParameterCount& actual,
857 const CallWrapper& call_wrapper,
860 void InvokeCode(Handle<Code> code,
861 const ParameterCount& expected,
862 const ParameterCount& actual,
863 RelocInfo::Mode rmode,
867 // Invoke the JavaScript function in the given register. Changes the
868 // current context to the context in the function before invoking.
869 void InvokeFunction(Register function,
870 const ParameterCount& actual,
872 const CallWrapper& call_wrapper,
875 void InvokeFunction(Handle<JSFunction> function,
876 const ParameterCount& expected,
877 const ParameterCount& actual,
879 const CallWrapper& call_wrapper,
883 void IsObjectJSObjectType(Register heap_object,
888 void IsInstanceJSObjectType(Register map,
892 void IsObjectJSStringType(Register object,
896 void IsObjectNameType(Register object,
900 #ifdef ENABLE_DEBUGGER_SUPPORT
901 // -------------------------------------------------------------------------
908 // -------------------------------------------------------------------------
909 // Exception handling.
911 // Push a new try handler and link into try handler chain.
912 void PushTryHandler(StackHandler::Kind kind, int handler_index);
914 // Unlink the stack handler on top of the stack from the try handler chain.
915 // Must preserve the result register.
916 void PopTryHandler();
918 // Passes thrown value to the handler of top of the try handler chain.
919 void Throw(Register value);
921 // Propagates an uncatchable exception to the top of the current JS stack's
923 void ThrowUncatchable(Register value);
925 // Copies a fixed number of fields of heap objects from src to dst.
926 void CopyFields(Register dst, Register src, RegList temps, int field_count);
928 // Copies a number of bytes from src to dst. All registers are clobbered. On
929 // exit src and dst will point to the place just after where the last byte was
930 // read or written and length will be zero.
931 void CopyBytes(Register src,
936 // Initialize fields with filler values. Fields starting at |start_offset|
937 // not including end_offset are overwritten with the value in |filler|. At
938 // the end the loop, |start_offset| takes the value of |end_offset|.
939 void InitializeFieldsWithFiller(Register start_offset,
943 // -------------------------------------------------------------------------
944 // Support functions.
946 // Try to get function prototype of a function and puts the value in
947 // the result register. Checks that the function really is a
948 // function and jumps to the miss label if the fast checks fail. The
949 // function register will be untouched; the other registers may be
951 void TryGetFunctionPrototype(Register function,
955 bool miss_on_bound_function = false);
957 void GetObjectType(Register function,
961 // Check if a map for a JSObject indicates that the object has fast elements.
962 // Jump to the specified label if it does not.
963 void CheckFastElements(Register map,
967 // Check if a map for a JSObject indicates that the object can have both smi
968 // and HeapObject elements. Jump to the specified label if it does not.
969 void CheckFastObjectElements(Register map,
973 // Check if a map for a JSObject indicates that the object has fast smi only
974 // elements. Jump to the specified label if it does not.
975 void CheckFastSmiElements(Register map,
979 // Check to see if maybe_number can be stored as a double in
980 // FastDoubleElements. If it can, store it at the index specified by key in
981 // the FastDoubleElements array elements. Otherwise jump to fail, in which
982 // case scratch2, scratch3 and scratch4 are unmodified.
983 void StoreNumberToDoubleElements(Register value_reg,
985 // All regs below here overwritten.
986 Register elements_reg,
992 int elements_offset = 0);
994 // Compare an object's map with the specified map and its transitioned
995 // elements maps if mode is ALLOW_ELEMENT_TRANSITION_MAPS. Jumps to
996 // "branch_to" if the result of the comparison is "cond". If multiple map
997 // compares are required, the compare sequences branches to early_success.
998 void CompareMapAndBranch(Register obj,
1001 Label* early_success,
1005 // As above, but the map of the object is already loaded into the register
1006 // which is preserved by the code generated.
1007 void CompareMapAndBranch(Register obj_map,
1009 Label* early_success,
1013 // Check if the map of an object is equal to a specified map and branch to
1014 // label if not. Skip the smi check if not required (object is known to be a
1015 // heap object). If mode is ALLOW_ELEMENT_TRANSITION_MAPS, then also match
1016 // against maps that are ElementsKind transition maps of the specificed map.
1017 void CheckMap(Register obj,
1021 SmiCheckType smi_check_type);
1024 void CheckMap(Register obj,
1026 Heap::RootListIndex index,
1028 SmiCheckType smi_check_type);
1030 // Check if the map of an object is equal to a specified map and branch to a
1031 // specified target if equal. Skip the smi check if not required (object is
1032 // known to be a heap object)
1033 void DispatchMap(Register obj,
1036 Handle<Code> success,
1037 SmiCheckType smi_check_type);
1039 // Generates code for reporting that an illegal operation has
1041 void IllegalOperation(int num_arguments);
1044 // Load and check the instance type of an object for being a string.
1045 // Loads the type into the second argument register.
1046 // Returns a condition that will be enabled if the object was a string.
1047 Condition IsObjectStringType(Register obj,
1050 lw(type, FieldMemOperand(obj, HeapObject::kMapOffset));
1051 lbu(type, FieldMemOperand(type, Map::kInstanceTypeOffset));
1052 And(type, type, Operand(kIsNotStringMask));
1053 ASSERT_EQ(0, kStringTag);
1058 // Picks out an array index from the hash field.
1060 // hash - holds the index's hash. Clobbered.
1061 // index - holds the overwritten index on exit.
1062 void IndexFromHash(Register hash, Register index);
1064 // Get the number of least significant bits from a register.
1065 void GetLeastBitsFromSmi(Register dst, Register src, int num_least_bits);
1066 void GetLeastBitsFromInt32(Register dst, Register src, int mun_least_bits);
1068 // Load the value of a number object into a FPU double register. If the
1069 // object is not a number a jump to the label not_number is performed
1070 // and the FPU double register is unchanged.
1071 void ObjectToDoubleFPURegister(
1076 Register heap_number_map,
1078 ObjectToDoubleFlags flags = NO_OBJECT_TO_DOUBLE_FLAGS);
1080 // Load the value of a smi object into a FPU double register. The register
1081 // scratch1 can be the same register as smi in which case smi will hold the
1082 // untagged value afterwards.
1083 void SmiToDoubleFPURegister(Register smi,
1087 // -------------------------------------------------------------------------
1088 // Overflow handling functions.
1089 // Usage: first call the appropriate arithmetic function, then call one of the
1090 // jump functions with the overflow_dst register as the second parameter.
1092 void AdduAndCheckForOverflow(Register dst,
1095 Register overflow_dst,
1096 Register scratch = at);
1098 void SubuAndCheckForOverflow(Register dst,
1101 Register overflow_dst,
1102 Register scratch = at);
1104 void BranchOnOverflow(Label* label,
1105 Register overflow_check,
1106 BranchDelaySlot bd = PROTECT) {
1107 Branch(label, lt, overflow_check, Operand(zero_reg), bd);
1110 void BranchOnNoOverflow(Label* label,
1111 Register overflow_check,
1112 BranchDelaySlot bd = PROTECT) {
1113 Branch(label, ge, overflow_check, Operand(zero_reg), bd);
1116 void RetOnOverflow(Register overflow_check, BranchDelaySlot bd = PROTECT) {
1117 Ret(lt, overflow_check, Operand(zero_reg), bd);
1120 void RetOnNoOverflow(Register overflow_check, BranchDelaySlot bd = PROTECT) {
1121 Ret(ge, overflow_check, Operand(zero_reg), bd);
1124 // -------------------------------------------------------------------------
1127 // See comments at the beginning of CEntryStub::Generate.
1128 inline void PrepareCEntryArgs(int num_args) {
1130 li(s1, (num_args - 1) * kPointerSize);
1133 inline void PrepareCEntryFunction(const ExternalReference& ref) {
1134 li(s2, Operand(ref));
1137 // Call a code stub.
1138 void CallStub(CodeStub* stub,
1139 TypeFeedbackId ast_id = TypeFeedbackId::None(),
1140 Condition cond = cc_always,
1141 Register r1 = zero_reg,
1142 const Operand& r2 = Operand(zero_reg),
1143 BranchDelaySlot bd = PROTECT);
1145 // Tail call a code stub (jump).
1146 void TailCallStub(CodeStub* stub);
1148 void CallJSExitStub(CodeStub* stub);
1150 // Call a runtime routine.
1151 void CallRuntime(const Runtime::Function* f, int num_arguments);
1152 void CallRuntimeSaveDoubles(Runtime::FunctionId id);
1154 // Convenience function: Same as above, but takes the fid instead.
1155 void CallRuntime(Runtime::FunctionId fid, int num_arguments);
1157 // Convenience function: call an external reference.
1158 void CallExternalReference(const ExternalReference& ext,
1160 BranchDelaySlot bd = PROTECT);
1162 // Tail call of a runtime routine (jump).
1163 // Like JumpToExternalReference, but also takes care of passing the number
1165 void TailCallExternalReference(const ExternalReference& ext,
1169 // Convenience function: tail call a runtime routine (jump).
1170 void TailCallRuntime(Runtime::FunctionId fid,
1174 int CalculateStackPassedWords(int num_reg_arguments,
1175 int num_double_arguments);
1177 // Before calling a C-function from generated code, align arguments on stack
1178 // and add space for the four mips argument slots.
1179 // After aligning the frame, non-register arguments must be stored on the
1180 // stack, after the argument-slots using helper: CFunctionArgumentOperand().
1181 // The argument count assumes all arguments are word sized.
1182 // Some compilers/platforms require the stack to be aligned when calling
1184 // Needs a scratch register to do some arithmetic. This register will be
1186 void PrepareCallCFunction(int num_reg_arguments,
1187 int num_double_registers,
1189 void PrepareCallCFunction(int num_reg_arguments,
1192 // Arguments 1-4 are placed in registers a0 thru a3 respectively.
1193 // Arguments 5..n are stored to stack using following:
1194 // sw(t0, CFunctionArgumentOperand(5));
1196 // Calls a C function and cleans up the space for arguments allocated
1197 // by PrepareCallCFunction. The called function is not allowed to trigger a
1198 // garbage collection, since that might move the code and invalidate the
1199 // return address (unless this is somehow accounted for by the called
1201 void CallCFunction(ExternalReference function, int num_arguments);
1202 void CallCFunction(Register function, int num_arguments);
1203 void CallCFunction(ExternalReference function,
1204 int num_reg_arguments,
1205 int num_double_arguments);
1206 void CallCFunction(Register function,
1207 int num_reg_arguments,
1208 int num_double_arguments);
1209 void GetCFunctionDoubleResult(const DoubleRegister dst);
1211 // There are two ways of passing double arguments on MIPS, depending on
1212 // whether soft or hard floating point ABI is used. These functions
1213 // abstract parameter passing for the three different ways we call
1214 // C functions from generated code.
1215 void SetCallCDoubleArguments(DoubleRegister dreg);
1216 void SetCallCDoubleArguments(DoubleRegister dreg1, DoubleRegister dreg2);
1217 void SetCallCDoubleArguments(DoubleRegister dreg, Register reg);
1219 // Calls an API function. Allocates HandleScope, extracts returned value
1220 // from handle and propagates exceptions. Restores context. stack_space
1221 // - space to be unwound on exit (includes the call JS arguments space and
1222 // the additional space allocated for the fast call).
1223 void CallApiFunctionAndReturn(ExternalReference function,
1224 Address function_address,
1225 ExternalReference thunk_ref,
1226 Register thunk_last_arg,
1228 bool returns_handle,
1229 int return_value_offset_from_fp);
1231 // Jump to the builtin routine.
1232 void JumpToExternalReference(const ExternalReference& builtin,
1233 BranchDelaySlot bd = PROTECT);
1235 // Invoke specified builtin JavaScript function. Adds an entry to
1236 // the unresolved list if the name does not resolve.
1237 void InvokeBuiltin(Builtins::JavaScript id,
1239 const CallWrapper& call_wrapper = NullCallWrapper());
1241 // Store the code object for the given builtin in the target register and
1242 // setup the function in a1.
1243 void GetBuiltinEntry(Register target, Builtins::JavaScript id);
1245 // Store the function for the given builtin in the target register.
1246 void GetBuiltinFunction(Register target, Builtins::JavaScript id);
1250 uint32_t flags; // See Bootstrapper::FixupFlags decoders/encoders.
1254 Handle<Object> CodeObject() {
1255 ASSERT(!code_object_.is_null());
1256 return code_object_;
1259 // -------------------------------------------------------------------------
1260 // StatsCounter support.
1262 void SetCounter(StatsCounter* counter, int value,
1263 Register scratch1, Register scratch2);
1264 void IncrementCounter(StatsCounter* counter, int value,
1265 Register scratch1, Register scratch2);
1266 void DecrementCounter(StatsCounter* counter, int value,
1267 Register scratch1, Register scratch2);
1270 // -------------------------------------------------------------------------
1273 // Calls Abort(msg) if the condition cc is not satisfied.
1274 // Use --debug_code to enable.
1275 void Assert(Condition cc, BailoutReason reason, Register rs, Operand rt);
1276 void AssertRegisterIsRoot(Register reg, Heap::RootListIndex index);
1277 void AssertFastElements(Register elements);
1279 // Like Assert(), but always enabled.
1280 void Check(Condition cc, BailoutReason reason, Register rs, Operand rt);
1282 // Print a message to stdout and abort execution.
1283 void Abort(BailoutReason msg);
1285 // Verify restrictions about code generated in stubs.
1286 void set_generating_stub(bool value) { generating_stub_ = value; }
1287 bool generating_stub() { return generating_stub_; }
1288 void set_allow_stub_calls(bool value) { allow_stub_calls_ = value; }
1289 bool allow_stub_calls() { return allow_stub_calls_; }
1290 void set_has_frame(bool value) { has_frame_ = value; }
1291 bool has_frame() { return has_frame_; }
1292 inline bool AllowThisStubCall(CodeStub* stub);
1294 // ---------------------------------------------------------------------------
1295 // Number utilities.
1297 // Check whether the value of reg is a power of two and not zero. If not
1298 // control continues at the label not_power_of_two. If reg is a power of two
1299 // the register scratch contains the value of (reg - 1) when control falls
1301 void JumpIfNotPowerOfTwoOrZero(Register reg,
1303 Label* not_power_of_two_or_zero);
1305 // -------------------------------------------------------------------------
1308 void SmiTag(Register reg) {
1309 Addu(reg, reg, reg);
1312 // Test for overflow < 0: use BranchOnOverflow() or BranchOnNoOverflow().
1313 void SmiTagCheckOverflow(Register reg, Register overflow);
1314 void SmiTagCheckOverflow(Register dst, Register src, Register overflow);
1316 void SmiTag(Register dst, Register src) {
1317 Addu(dst, src, src);
1320 void SmiUntag(Register reg) {
1321 sra(reg, reg, kSmiTagSize);
1324 void SmiUntag(Register dst, Register src) {
1325 sra(dst, src, kSmiTagSize);
1328 // Untag the source value into destination and jump if source is a smi.
1329 // Souce and destination can be the same register.
1330 void UntagAndJumpIfSmi(Register dst, Register src, Label* smi_case);
1332 // Untag the source value into destination and jump if source is not a smi.
1333 // Souce and destination can be the same register.
1334 void UntagAndJumpIfNotSmi(Register dst, Register src, Label* non_smi_case);
1336 // Jump the register contains a smi.
1337 void JumpIfSmi(Register value,
1339 Register scratch = at,
1340 BranchDelaySlot bd = PROTECT);
1342 // Jump if the register contains a non-smi.
1343 void JumpIfNotSmi(Register value,
1344 Label* not_smi_label,
1345 Register scratch = at,
1346 BranchDelaySlot bd = PROTECT);
1348 // Jump if either of the registers contain a non-smi.
1349 void JumpIfNotBothSmi(Register reg1, Register reg2, Label* on_not_both_smi);
1350 // Jump if either of the registers contain a smi.
1351 void JumpIfEitherSmi(Register reg1, Register reg2, Label* on_either_smi);
1353 // Abort execution if argument is a smi, enabled via --debug-code.
1354 void AssertNotSmi(Register object);
1355 void AssertSmi(Register object);
1357 // Abort execution if argument is not a string, enabled via --debug-code.
1358 void AssertString(Register object);
1360 // Abort execution if argument is not a name, enabled via --debug-code.
1361 void AssertName(Register object);
1363 // Abort execution if argument is not the root value with the given index,
1364 // enabled via --debug-code.
1365 void AssertRootValue(Register src,
1366 Heap::RootListIndex root_value_index,
1367 BailoutReason reason);
1369 // ---------------------------------------------------------------------------
1370 // HeapNumber utilities.
1372 void JumpIfNotHeapNumber(Register object,
1373 Register heap_number_map,
1375 Label* on_not_heap_number);
1377 // -------------------------------------------------------------------------
1378 // String utilities.
1380 // Checks if both instance types are sequential ASCII strings and jumps to
1381 // label if either is not.
1382 void JumpIfBothInstanceTypesAreNotSequentialAscii(
1383 Register first_object_instance_type,
1384 Register second_object_instance_type,
1389 // Check if instance type is sequential ASCII string and jump to label if
1391 void JumpIfInstanceTypeIsNotSequentialAscii(Register type,
1395 void JumpIfNotUniqueName(Register reg, Label* not_unique_name);
1397 // Test that both first and second are sequential ASCII strings.
1398 // Assume that they are non-smis.
1399 void JumpIfNonSmisNotBothSequentialAsciiStrings(Register first,
1405 // Test that both first and second are sequential ASCII strings.
1406 // Check that they are non-smis.
1407 void JumpIfNotBothSequentialAsciiStrings(Register first,
1413 void ClampUint8(Register output_reg, Register input_reg);
1415 void ClampDoubleToUint8(Register result_reg,
1416 DoubleRegister input_reg,
1417 DoubleRegister temp_double_reg);
1420 void LoadInstanceDescriptors(Register map, Register descriptors);
1421 void EnumLength(Register dst, Register map);
1422 void NumberOfOwnDescriptors(Register dst, Register map);
1424 template<typename Field>
1425 void DecodeField(Register reg) {
1426 static const int shift = Field::kShift;
1427 static const int mask = (Field::kMask >> shift) << kSmiTagSize;
1428 srl(reg, reg, shift);
1429 And(reg, reg, Operand(mask));
1432 // Activation support.
1433 void EnterFrame(StackFrame::Type type);
1434 void LeaveFrame(StackFrame::Type type);
1436 // Patch the relocated value (lui/ori pair).
1437 void PatchRelocatedValue(Register li_location,
1439 Register new_value);
1440 // Get the relocatad value (loaded data) from the lui/ori pair.
1441 void GetRelocatedValue(Register li_location,
1445 // Expects object in a0 and returns map with validated enum cache
1446 // in a0. Assumes that any other register can be used as a scratch.
1447 void CheckEnumCache(Register null_value, Label* call_runtime);
1449 // AllocationMemento support. Arrays may have an associated
1450 // AllocationMemento object that can be checked for in order to pretransition
1452 // On entry, receiver_reg should point to the array object.
1453 // scratch_reg gets clobbered.
1454 // If allocation info is present, jump to allocation_info_present
1455 void TestJSArrayForAllocationMemento(Register receiver_reg,
1456 Register scratch_reg,
1458 Label* allocation_memento_present);
1461 void CallCFunctionHelper(Register function,
1462 int num_reg_arguments,
1463 int num_double_arguments);
1465 void BranchShort(int16_t offset, BranchDelaySlot bdslot = PROTECT);
1466 void BranchShort(int16_t offset, Condition cond, Register rs,
1468 BranchDelaySlot bdslot = PROTECT);
1469 void BranchShort(Label* L, BranchDelaySlot bdslot = PROTECT);
1470 void BranchShort(Label* L, Condition cond, Register rs,
1472 BranchDelaySlot bdslot = PROTECT);
1473 void BranchAndLinkShort(int16_t offset, BranchDelaySlot bdslot = PROTECT);
1474 void BranchAndLinkShort(int16_t offset, Condition cond, Register rs,
1476 BranchDelaySlot bdslot = PROTECT);
1477 void BranchAndLinkShort(Label* L, BranchDelaySlot bdslot = PROTECT);
1478 void BranchAndLinkShort(Label* L, Condition cond, Register rs,
1480 BranchDelaySlot bdslot = PROTECT);
1481 void J(Label* L, BranchDelaySlot bdslot);
1482 void Jr(Label* L, BranchDelaySlot bdslot);
1483 void Jalr(Label* L, BranchDelaySlot bdslot);
1485 // Helper functions for generating invokes.
1486 void InvokePrologue(const ParameterCount& expected,
1487 const ParameterCount& actual,
1488 Handle<Code> code_constant,
1491 bool* definitely_mismatches,
1493 const CallWrapper& call_wrapper,
1494 CallKind call_kind);
1496 // Get the code for the given builtin. Returns if able to resolve
1497 // the function in the 'resolved' flag.
1498 Handle<Code> ResolveBuiltin(Builtins::JavaScript id, bool* resolved);
1500 void InitializeNewString(Register string,
1502 Heap::RootListIndex map_index,
1506 // Helper for implementing JumpIfNotInNewSpace and JumpIfInNewSpace.
1507 void InNewSpace(Register object,
1509 Condition cond, // eq for new space, ne otherwise.
1512 // Helper for finding the mark bits for an address. Afterwards, the
1513 // bitmap register points at the word with the mark bits and the mask
1514 // the position of the first bit. Leaves addr_reg unchanged.
1515 inline void GetMarkBits(Register addr_reg,
1516 Register bitmap_reg,
1519 // Helper for throwing exceptions. Compute a handler address and jump to
1520 // it. See the implementation for register usage.
1521 void JumpToHandlerEntry();
1523 // Compute memory operands for safepoint stack slots.
1524 static int SafepointRegisterStackIndex(int reg_code);
1525 MemOperand SafepointRegisterSlot(Register reg);
1526 MemOperand SafepointRegistersAndDoublesSlot(Register reg);
1528 bool generating_stub_;
1529 bool allow_stub_calls_;
1531 // This handle will be patched with the code object on installation.
1532 Handle<Object> code_object_;
1534 // Needs access to SafepointRegisterStackIndex for compiled frame
1536 friend class StandardFrame;
1540 // The code patcher is used to patch (typically) small parts of code e.g. for
1541 // debugging and other types of instrumentation. When using the code patcher
1542 // the exact number of bytes specified must be emitted. It is not legal to emit
1543 // relocation information. If any of these constraints are violated it causes
1544 // an assertion to fail.
1547 CodePatcher(byte* address, int instructions);
1548 virtual ~CodePatcher();
1550 // Macro assembler to emit code.
1551 MacroAssembler* masm() { return &masm_; }
1553 // Emit an instruction directly.
1554 void Emit(Instr instr);
1556 // Emit an address directly.
1557 void Emit(Address addr);
1559 // Change the condition part of an instruction leaving the rest of the current
1560 // instruction unchanged.
1561 void ChangeBranchCondition(Condition cond);
1564 byte* address_; // The address of the code being patched.
1565 int size_; // Number of bytes of the expected patch size.
1566 MacroAssembler masm_; // Macro assembler used to generate the code.
1571 #ifdef GENERATED_CODE_COVERAGE
1572 #define CODE_COVERAGE_STRINGIFY(x) #x
1573 #define CODE_COVERAGE_TOSTRING(x) CODE_COVERAGE_STRINGIFY(x)
1574 #define __FILE_LINE__ __FILE__ ":" CODE_COVERAGE_TOSTRING(__LINE__)
1575 #define ACCESS_MASM(masm) masm->stop(__FILE_LINE__); masm->
1577 #define ACCESS_MASM(masm) masm->
1580 } } // namespace v8::internal
1582 #endif // V8_MIPS_MACRO_ASSEMBLER_MIPS_H_