2 // Copyright (c) 1994-2006 Sun Microsystems Inc.
3 // All Rights Reserved.
5 // Redistribution and use in source and binary forms, with or without
6 // modification, are permitted provided that the following conditions are
9 // - Redistributions of source code must retain the above copyright notice,
10 // this list of conditions and the following disclaimer.
12 // - Redistribution in binary form must reproduce the above copyright
13 // notice, this list of conditions and the following disclaimer in the
14 // documentation and/or other materials provided with the distribution.
16 // - Neither the name of Sun Microsystems or the names of contributors may
17 // be used to endorse or promote products derived from this software without
18 // specific prior written permission.
20 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
21 // IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
22 // THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 // PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
24 // CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
25 // EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
26 // PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
27 // PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
28 // LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
29 // NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
30 // SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 // The original source code covered by the above license above has been
33 // modified significantly by Google Inc.
34 // Copyright 2012 the V8 project authors. All rights reserved.
37 #ifndef V8_MIPS_ASSEMBLER_MIPS_INL_H_
38 #define V8_MIPS_ASSEMBLER_MIPS_INL_H_
40 #include "src/mips/assembler-mips.h"
42 #include "src/assembler.h"
43 #include "src/debug.h"
50 bool CpuFeatures::SupportsCrankshaft() { return IsSupported(FPU); }
53 // -----------------------------------------------------------------------------
54 // Operand and MemOperand.
56 Operand::Operand(int32_t immediate, RelocInfo::Mode rmode) {
63 Operand::Operand(const ExternalReference& f) {
65 imm32_ = reinterpret_cast<int32_t>(f.address());
66 rmode_ = RelocInfo::EXTERNAL_REFERENCE;
70 Operand::Operand(Smi* value) {
72 imm32_ = reinterpret_cast<intptr_t>(value);
73 rmode_ = RelocInfo::NONE32;
77 Operand::Operand(Register rm) {
82 bool Operand::is_reg() const {
83 return rm_.is_valid();
87 int Register::NumAllocatableRegisters() {
88 return kMaxNumAllocatableRegisters;
92 int DoubleRegister::NumRegisters() {
93 return FPURegister::kMaxNumRegisters;
97 int DoubleRegister::NumAllocatableRegisters() {
98 return FPURegister::kMaxNumAllocatableRegisters;
102 int DoubleRegister::NumAllocatableAliasedRegisters() {
103 return NumAllocatableRegisters();
107 int FPURegister::ToAllocationIndex(FPURegister reg) {
108 DCHECK(reg.code() % 2 == 0);
109 DCHECK(reg.code() / 2 < kMaxNumAllocatableRegisters);
110 DCHECK(reg.is_valid());
111 DCHECK(!reg.is(kDoubleRegZero));
112 DCHECK(!reg.is(kLithiumScratchDouble));
113 return (reg.code() / 2);
117 // -----------------------------------------------------------------------------
120 void RelocInfo::apply(intptr_t delta, ICacheFlushMode icache_flush_mode) {
121 if (IsCodeTarget(rmode_)) {
122 uint32_t scope1 = (uint32_t) target_address() & ~kImm28Mask;
123 uint32_t scope2 = reinterpret_cast<uint32_t>(pc_) & ~kImm28Mask;
125 if (scope1 != scope2) {
126 Assembler::JumpLabelToJumpRegister(pc_);
129 if (IsInternalReference(rmode_) || IsInternalReferenceEncoded(rmode_)) {
130 // Absolute code pointer inside code object moves with the code object.
131 byte* p = reinterpret_cast<byte*>(pc_);
132 int count = Assembler::RelocateInternalReference(rmode_, p, delta);
133 CpuFeatures::FlushICache(p, count * sizeof(uint32_t));
138 Address RelocInfo::target_address() {
139 DCHECK(IsCodeTarget(rmode_) || IsRuntimeEntry(rmode_));
140 return Assembler::target_address_at(pc_, host_);
144 Address RelocInfo::target_address_address() {
145 DCHECK(IsCodeTarget(rmode_) ||
146 IsRuntimeEntry(rmode_) ||
147 rmode_ == EMBEDDED_OBJECT ||
148 rmode_ == EXTERNAL_REFERENCE);
149 // Read the address of the word containing the target_address in an
150 // instruction stream.
151 // The only architecture-independent user of this function is the serializer.
152 // The serializer uses it to find out how many raw bytes of instruction to
153 // output before the next target.
154 // For an instruction like LUI/ORI where the target bits are mixed into the
155 // instruction bits, the size of the target will be zero, indicating that the
156 // serializer should not step forward in memory after a target is resolved
157 // and written. In this case the target_address_address function should
158 // return the end of the instructions to be patched, allowing the
159 // deserializer to deserialize the instructions as raw bytes and put them in
160 // place, ready to be patched with the target. After jump optimization,
161 // that is the address of the instruction that follows J/JAL/JR/JALR
163 return reinterpret_cast<Address>(
164 pc_ + Assembler::kInstructionsFor32BitConstant * Assembler::kInstrSize);
168 Address RelocInfo::constant_pool_entry_address() {
174 int RelocInfo::target_address_size() {
175 return Assembler::kSpecialTargetSize;
179 void RelocInfo::set_target_address(Address target,
180 WriteBarrierMode write_barrier_mode,
181 ICacheFlushMode icache_flush_mode) {
182 DCHECK(IsCodeTarget(rmode_) || IsRuntimeEntry(rmode_));
183 Assembler::set_target_address_at(pc_, host_, target, icache_flush_mode);
184 if (write_barrier_mode == UPDATE_WRITE_BARRIER &&
185 host() != NULL && IsCodeTarget(rmode_)) {
186 Object* target_code = Code::GetCodeFromTargetAddress(target);
187 host()->GetHeap()->incremental_marking()->RecordWriteIntoCode(
188 host(), this, HeapObject::cast(target_code));
193 Address Assembler::target_address_from_return_address(Address pc) {
194 return pc - kCallTargetAddressOffset;
198 Address Assembler::break_address_from_return_address(Address pc) {
199 return pc - Assembler::kPatchDebugBreakSlotReturnOffset;
203 Object* RelocInfo::target_object() {
204 DCHECK(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT);
205 return reinterpret_cast<Object*>(Assembler::target_address_at(pc_, host_));
209 Handle<Object> RelocInfo::target_object_handle(Assembler* origin) {
210 DCHECK(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT);
211 return Handle<Object>(reinterpret_cast<Object**>(
212 Assembler::target_address_at(pc_, host_)));
216 void RelocInfo::set_target_object(Object* target,
217 WriteBarrierMode write_barrier_mode,
218 ICacheFlushMode icache_flush_mode) {
219 DCHECK(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT);
220 Assembler::set_target_address_at(pc_, host_,
221 reinterpret_cast<Address>(target),
223 if (write_barrier_mode == UPDATE_WRITE_BARRIER &&
225 target->IsHeapObject()) {
226 host()->GetHeap()->incremental_marking()->RecordWrite(
227 host(), &Memory::Object_at(pc_), HeapObject::cast(target));
232 Address RelocInfo::target_reference() {
233 DCHECK(rmode_ == EXTERNAL_REFERENCE);
234 return Assembler::target_address_at(pc_, host_);
238 Address RelocInfo::target_runtime_entry(Assembler* origin) {
239 DCHECK(IsRuntimeEntry(rmode_));
240 return target_address();
244 void RelocInfo::set_target_runtime_entry(Address target,
245 WriteBarrierMode write_barrier_mode,
246 ICacheFlushMode icache_flush_mode) {
247 DCHECK(IsRuntimeEntry(rmode_));
248 if (target_address() != target)
249 set_target_address(target, write_barrier_mode, icache_flush_mode);
253 Handle<Cell> RelocInfo::target_cell_handle() {
254 DCHECK(rmode_ == RelocInfo::CELL);
255 Address address = Memory::Address_at(pc_);
256 return Handle<Cell>(reinterpret_cast<Cell**>(address));
260 Cell* RelocInfo::target_cell() {
261 DCHECK(rmode_ == RelocInfo::CELL);
262 return Cell::FromValueAddress(Memory::Address_at(pc_));
266 void RelocInfo::set_target_cell(Cell* cell,
267 WriteBarrierMode write_barrier_mode,
268 ICacheFlushMode icache_flush_mode) {
269 DCHECK(rmode_ == RelocInfo::CELL);
270 Address address = cell->address() + Cell::kValueOffset;
271 Memory::Address_at(pc_) = address;
272 if (write_barrier_mode == UPDATE_WRITE_BARRIER && host() != NULL) {
273 // TODO(1550) We are passing NULL as a slot because cell can never be on
274 // evacuation candidate.
275 host()->GetHeap()->incremental_marking()->RecordWrite(
281 static const int kNoCodeAgeSequenceLength = 7 * Assembler::kInstrSize;
284 Handle<Object> RelocInfo::code_age_stub_handle(Assembler* origin) {
285 UNREACHABLE(); // This should never be reached on Arm.
286 return Handle<Object>();
290 Code* RelocInfo::code_age_stub() {
291 DCHECK(rmode_ == RelocInfo::CODE_AGE_SEQUENCE);
292 return Code::GetCodeFromTargetAddress(
293 Assembler::target_address_at(pc_ + Assembler::kInstrSize, host_));
297 void RelocInfo::set_code_age_stub(Code* stub,
298 ICacheFlushMode icache_flush_mode) {
299 DCHECK(rmode_ == RelocInfo::CODE_AGE_SEQUENCE);
300 Assembler::set_target_address_at(pc_ + Assembler::kInstrSize,
302 stub->instruction_start());
306 Address RelocInfo::call_address() {
307 DCHECK((IsJSReturn(rmode()) && IsPatchedReturnSequence()) ||
308 (IsDebugBreakSlot(rmode()) && IsPatchedDebugBreakSlotSequence()));
309 // The pc_ offset of 0 assumes mips patched return sequence per
310 // debug-mips.cc BreakLocationIterator::SetDebugBreakAtReturn(), or
311 // debug break slot per BreakLocationIterator::SetDebugBreakAtSlot().
312 return Assembler::target_address_at(pc_, host_);
316 void RelocInfo::set_call_address(Address target) {
317 DCHECK((IsJSReturn(rmode()) && IsPatchedReturnSequence()) ||
318 (IsDebugBreakSlot(rmode()) && IsPatchedDebugBreakSlotSequence()));
319 // The pc_ offset of 0 assumes mips patched return sequence per
320 // debug-mips.cc BreakLocationIterator::SetDebugBreakAtReturn(), or
321 // debug break slot per BreakLocationIterator::SetDebugBreakAtSlot().
322 Assembler::set_target_address_at(pc_, host_, target);
323 if (host() != NULL) {
324 Object* target_code = Code::GetCodeFromTargetAddress(target);
325 host()->GetHeap()->incremental_marking()->RecordWriteIntoCode(
326 host(), this, HeapObject::cast(target_code));
331 Object* RelocInfo::call_object() {
332 return *call_object_address();
336 Object** RelocInfo::call_object_address() {
337 DCHECK((IsJSReturn(rmode()) && IsPatchedReturnSequence()) ||
338 (IsDebugBreakSlot(rmode()) && IsPatchedDebugBreakSlotSequence()));
339 return reinterpret_cast<Object**>(pc_ + 2 * Assembler::kInstrSize);
343 void RelocInfo::set_call_object(Object* target) {
344 *call_object_address() = target;
348 void RelocInfo::WipeOut() {
349 DCHECK(IsEmbeddedObject(rmode_) ||
350 IsCodeTarget(rmode_) ||
351 IsRuntimeEntry(rmode_) ||
352 IsExternalReference(rmode_));
353 Assembler::set_target_address_at(pc_, host_, NULL);
357 bool RelocInfo::IsPatchedReturnSequence() {
358 Instr instr0 = Assembler::instr_at(pc_);
359 Instr instr1 = Assembler::instr_at(pc_ + 1 * Assembler::kInstrSize);
360 Instr instr2 = Assembler::instr_at(pc_ + 2 * Assembler::kInstrSize);
361 bool patched_return = ((instr0 & kOpcodeMask) == LUI &&
362 (instr1 & kOpcodeMask) == ORI &&
363 ((instr2 & kOpcodeMask) == JAL ||
364 ((instr2 & kOpcodeMask) == SPECIAL &&
365 (instr2 & kFunctionFieldMask) == JALR)));
366 return patched_return;
370 bool RelocInfo::IsPatchedDebugBreakSlotSequence() {
371 Instr current_instr = Assembler::instr_at(pc_);
372 return !Assembler::IsNop(current_instr, Assembler::DEBUG_BREAK_NOP);
376 void RelocInfo::Visit(Isolate* isolate, ObjectVisitor* visitor) {
377 RelocInfo::Mode mode = rmode();
378 if (mode == RelocInfo::EMBEDDED_OBJECT) {
379 visitor->VisitEmbeddedPointer(this);
380 } else if (RelocInfo::IsCodeTarget(mode)) {
381 visitor->VisitCodeTarget(this);
382 } else if (mode == RelocInfo::CELL) {
383 visitor->VisitCell(this);
384 } else if (mode == RelocInfo::EXTERNAL_REFERENCE) {
385 visitor->VisitExternalReference(this);
386 } else if (RelocInfo::IsCodeAgeSequence(mode)) {
387 visitor->VisitCodeAgeSequence(this);
388 } else if (((RelocInfo::IsJSReturn(mode) &&
389 IsPatchedReturnSequence()) ||
390 (RelocInfo::IsDebugBreakSlot(mode) &&
391 IsPatchedDebugBreakSlotSequence())) &&
392 isolate->debug()->has_break_points()) {
393 visitor->VisitDebugTarget(this);
394 } else if (RelocInfo::IsRuntimeEntry(mode)) {
395 visitor->VisitRuntimeEntry(this);
400 template<typename StaticVisitor>
401 void RelocInfo::Visit(Heap* heap) {
402 RelocInfo::Mode mode = rmode();
403 if (mode == RelocInfo::EMBEDDED_OBJECT) {
404 StaticVisitor::VisitEmbeddedPointer(heap, this);
405 } else if (RelocInfo::IsCodeTarget(mode)) {
406 StaticVisitor::VisitCodeTarget(heap, this);
407 } else if (mode == RelocInfo::CELL) {
408 StaticVisitor::VisitCell(heap, this);
409 } else if (mode == RelocInfo::EXTERNAL_REFERENCE) {
410 StaticVisitor::VisitExternalReference(this);
411 } else if (RelocInfo::IsCodeAgeSequence(mode)) {
412 StaticVisitor::VisitCodeAgeSequence(heap, this);
413 } else if (heap->isolate()->debug()->has_break_points() &&
414 ((RelocInfo::IsJSReturn(mode) &&
415 IsPatchedReturnSequence()) ||
416 (RelocInfo::IsDebugBreakSlot(mode) &&
417 IsPatchedDebugBreakSlotSequence()))) {
418 StaticVisitor::VisitDebugTarget(heap, this);
419 } else if (RelocInfo::IsRuntimeEntry(mode)) {
420 StaticVisitor::VisitRuntimeEntry(this);
425 // -----------------------------------------------------------------------------
429 void Assembler::CheckBuffer() {
430 if (buffer_space() <= kGap) {
436 void Assembler::CheckTrampolinePoolQuick() {
437 if (pc_offset() >= next_buffer_check_) {
438 CheckTrampolinePool();
443 void Assembler::emit(Instr x) {
444 if (!is_buffer_growth_blocked()) {
447 *reinterpret_cast<Instr*>(pc_) = x;
449 CheckTrampolinePoolQuick();
453 } } // namespace v8::internal
455 #endif // V8_MIPS_ASSEMBLER_MIPS_INL_H_