1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file.
5 #ifndef V8_COMPILER_X64_INSTRUCTION_CODES_X64_H_
6 #define V8_COMPILER_X64_INSTRUCTION_CODES_X64_H_
12 // X64-specific opcodes that specify which assembly sequence to emit.
13 // Most opcodes specify a single instruction.
14 #define TARGET_ARCH_OPCODE_LIST(V) \
58 V(SSEFloat64RoundTruncate) \
61 V(SSEFloat64ToInt32) \
62 V(SSEFloat64ToUint32) \
63 V(SSEInt32ToFloat64) \
64 V(SSEUint32ToFloat64) \
85 V(X64StoreWriteBarrier)
88 // Addressing modes represent the "shape" of inputs to an instruction.
89 // Many instructions support multiple addressing modes. Addressing modes
90 // are encoded into the InstructionCode of the instruction and tell the
91 // code generator after register allocation which assembler method to call.
93 // We use the following local notation for addressing modes:
97 // N = index register * N for N in {1, 2, 4, 8}
98 // I = immediate displacement (32-bit signed integer)
100 #define TARGET_ADDRESSING_MODE_LIST(V) \
102 V(MRI) /* [%r1 + K] */ \
103 V(MR1) /* [%r1 + %r2*1 ] */ \
104 V(MR2) /* [%r1 + %r2*2 ] */ \
105 V(MR4) /* [%r1 + %r2*4 ] */ \
106 V(MR8) /* [%r1 + %r2*8 ] */ \
107 V(MR1I) /* [%r1 + %r2*1 + K] */ \
108 V(MR2I) /* [%r1 + %r2*2 + K] */ \
109 V(MR4I) /* [%r1 + %r2*3 + K] */ \
110 V(MR8I) /* [%r1 + %r2*4 + K] */ \
111 V(M1) /* [ %r2*1 ] */ \
112 V(M2) /* [ %r2*2 ] */ \
113 V(M4) /* [ %r2*4 ] */ \
114 V(M8) /* [ %r2*8 ] */ \
115 V(M1I) /* [ %r2*1 + K] */ \
116 V(M2I) /* [ %r2*2 + K] */ \
117 V(M4I) /* [ %r2*4 + K] */ \
118 V(M8I) /* [ %r2*8 + K] */
120 } // namespace compiler
121 } // namespace internal
124 #endif // V8_COMPILER_X64_INSTRUCTION_CODES_X64_H_