1 // Copyright 2013 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file.
5 #include "src/base/cpu.h"
8 #include <intrin.h> // __cpuid()
11 #include <linux/auxvec.h> // AT_HWCAP
13 #if V8_GLIBC_PREREQ(2, 16)
14 #include <sys/auxv.h> // getauxval()
17 #include <sys/syspage.h> // cpuinfo
19 #if V8_OS_LINUX && V8_HOST_ARCH_PPC
23 #include <sys/systemcfg.h> // _system_configuration
25 #define POWER_8 0x10000
29 #include <unistd.h> // sysconf()
39 #include "src/base/logging.h"
41 #include "src/base/win32-headers.h" // NOLINT
47 #if defined(__pnacl__)
48 // Portable host shouldn't do feature detection.
49 #elif V8_HOST_ARCH_IA32 || V8_HOST_ARCH_X64
51 // Define __cpuid() for non-MSVC libraries.
54 static V8_INLINE void __cpuid(int cpu_info[4], int info_type) {
55 #if defined(__i386__) && defined(__pic__)
56 // Make sure to preserve ebx, which contains the pointer
57 // to the GOT in case we're generating PIC.
59 "mov %%ebx, %%edi\n\t"
61 "xchg %%edi, %%ebx\n\t"
62 : "=a"(cpu_info[0]), "=D"(cpu_info[1]), "=c"(cpu_info[2]), "=d"(cpu_info[3])
68 : "=a"(cpu_info[0]), "=b"(cpu_info[1]), "=c"(cpu_info[2]), "=d"(cpu_info[3])
71 #endif // defined(__i386__) && defined(__pic__)
74 #endif // !V8_LIBC_MSVCRT
76 #elif V8_HOST_ARCH_ARM || V8_HOST_ARCH_ARM64 \
77 || V8_HOST_ARCH_MIPS || V8_HOST_ARCH_MIPS64
83 // See <uapi/asm/hwcap.h> kernel header.
85 * HWCAP flags - for elf_hwcap (in kernel) and AT_HWCAP
87 #define HWCAP_SWP (1 << 0)
88 #define HWCAP_HALF (1 << 1)
89 #define HWCAP_THUMB (1 << 2)
90 #define HWCAP_26BIT (1 << 3) /* Play it safe */
91 #define HWCAP_FAST_MULT (1 << 4)
92 #define HWCAP_FPA (1 << 5)
93 #define HWCAP_VFP (1 << 6)
94 #define HWCAP_EDSP (1 << 7)
95 #define HWCAP_JAVA (1 << 8)
96 #define HWCAP_IWMMXT (1 << 9)
97 #define HWCAP_CRUNCH (1 << 10)
98 #define HWCAP_THUMBEE (1 << 11)
99 #define HWCAP_NEON (1 << 12)
100 #define HWCAP_VFPv3 (1 << 13)
101 #define HWCAP_VFPv3D16 (1 << 14) /* also set for VFPv4-D16 */
102 #define HWCAP_TLS (1 << 15)
103 #define HWCAP_VFPv4 (1 << 16)
104 #define HWCAP_IDIVA (1 << 17)
105 #define HWCAP_IDIVT (1 << 18)
106 #define HWCAP_VFPD32 (1 << 19) /* set if VFP has 32 regs (not 16) */
107 #define HWCAP_IDIV (HWCAP_IDIVA | HWCAP_IDIVT)
108 #define HWCAP_LPAE (1 << 20)
110 static uint32_t ReadELFHWCaps() {
112 #if V8_GLIBC_PREREQ(2, 16)
113 result = static_cast<uint32_t>(getauxval(AT_HWCAP));
115 // Read the ELF HWCAP flags by parsing /proc/self/auxv.
116 FILE* fp = fopen("/proc/self/auxv", "r");
118 struct { uint32_t tag; uint32_t value; } entry;
120 size_t n = fread(&entry, sizeof(entry), 1, fp);
121 if (n == 0 || (entry.tag == 0 && entry.value == 0)) {
124 if (entry.tag == AT_HWCAP) {
125 result = entry.value;
135 #endif // V8_HOST_ARCH_ARM
137 #if V8_HOST_ARCH_MIPS
138 int __detect_fp64_mode(void) {
140 // Bit representation of (double)1 is 0x3FF0000000000000.
145 "lui $t0, 0x3FF0\n\t"
152 : "t0", "$f0", "$f1", "memory");
154 return !(result == 1);
158 int __detect_mips_arch_revision(void) {
159 // TODO(dusmil): Do the specific syscall as soon as it is implemented in mips
163 "move $v0, $zero\n\t"
164 // Encoding for "addi $v0, $v0, 1" on non-r6,
165 // which is encoding for "bovc $v0, %v0, 1" on r6.
166 // Use machine code directly to avoid compilation errors with different
167 // toolchains and maintain compatibility.
168 ".word 0x20420001\n\t"
173 // Result is 0 on r6 architectures, 1 on other architecture revisions.
174 // Fall-back to the least common denominator which is mips32 revision 1.
175 return result ? 1 : 6;
179 // Extract the information exposed by the kernel via /proc/cpuinfo.
180 class CPUInfo FINAL {
182 CPUInfo() : datalen_(0) {
183 // Get the size of the cpuinfo file by reading it until the end. This is
184 // required because files under /proc do not always return a valid size
185 // when using fseek(0, SEEK_END) + ftell(). Nor can the be mmap()-ed.
186 static const char PATHNAME[] = "/proc/cpuinfo";
187 FILE* fp = fopen(PATHNAME, "r");
191 size_t n = fread(buffer, 1, sizeof(buffer), fp);
200 // Read the contents of the cpuinfo file.
201 data_ = new char[datalen_ + 1];
202 fp = fopen(PATHNAME, "r");
204 for (size_t offset = 0; offset < datalen_; ) {
205 size_t n = fread(data_ + offset, 1, datalen_ - offset, fp);
214 // Zero-terminate the data.
215 data_[datalen_] = '\0';
222 // Extract the content of a the first occurence of a given field in
223 // the content of the cpuinfo file and return it as a heap-allocated
224 // string that must be freed by the caller using delete[].
225 // Return NULL if not found.
226 char* ExtractField(const char* field) const {
227 DCHECK(field != NULL);
229 // Look for first field occurence, and ensure it starts the line.
230 size_t fieldlen = strlen(field);
233 p = strstr(p, field);
237 if (p == data_ || p[-1] == '\n') {
243 // Skip to the first colon followed by a space.
244 p = strchr(p + fieldlen, ':');
245 if (p == NULL || !isspace(p[1])) {
250 // Find the end of the line.
251 char* q = strchr(p, '\n');
253 q = data_ + datalen_;
256 // Copy the line into a heap-allocated buffer.
258 char* result = new char[len + 1];
259 if (result != NULL) {
260 memcpy(result, p, len);
271 #if V8_HOST_ARCH_ARM || V8_HOST_ARCH_MIPS || V8_HOST_ARCH_MIPS64
273 // Checks that a space-separated list of items contains one given 'item'.
274 static bool HasListItem(const char* list, const char* item) {
275 ssize_t item_len = strlen(item);
276 const char* p = list;
280 while (isspace(*p)) ++p;
282 // Find end of current list item.
284 while (*q != '\0' && !isspace(*q)) ++q;
286 if (item_len == q - p && memcmp(p, item, item_len) == 0) {
290 // Skip to next item.
297 #endif // V8_HOST_ARCH_ARM || V8_HOST_ARCH_MIPS || V8_HOST_ARCH_MIPS64
299 #endif // V8_OS_LINUX
301 #endif // V8_HOST_ARCH_IA32 || V8_HOST_ARCH_X64
333 has_vfp3_d32_(false),
334 is_fp64_mode_(false) {
335 memcpy(vendor_, "Unknown", 8);
337 // Portable host shouldn't do feature detection.
338 // TODO(jfb): Remove the hardcoded ARM simulator flags in the build, and
339 // hardcode them here instead.
340 #elif V8_HOST_ARCH_IA32 || V8_HOST_ARCH_X64
343 // __cpuid with an InfoType argument of 0 returns the number of
344 // valid Ids in CPUInfo[0] and the CPU identification string in
345 // the other three array elements. The CPU identification string is
346 // not in linear order. The code below arranges the information
347 // in a human readable form. The human readable order is CPUInfo[1] |
348 // CPUInfo[3] | CPUInfo[2]. CPUInfo[2] and CPUInfo[3] are swapped
349 // before using memcpy to copy these three array elements to cpu_string.
350 __cpuid(cpu_info, 0);
351 unsigned num_ids = cpu_info[0];
352 std::swap(cpu_info[2], cpu_info[3]);
353 memcpy(vendor_, cpu_info + 1, 12);
356 // Interpret CPU feature information.
358 __cpuid(cpu_info, 1);
359 stepping_ = cpu_info[0] & 0xf;
360 model_ = ((cpu_info[0] >> 4) & 0xf) + ((cpu_info[0] >> 12) & 0xf0);
361 family_ = (cpu_info[0] >> 8) & 0xf;
362 type_ = (cpu_info[0] >> 12) & 0x3;
363 ext_model_ = (cpu_info[0] >> 16) & 0xf;
364 ext_family_ = (cpu_info[0] >> 20) & 0xff;
365 has_fpu_ = (cpu_info[3] & 0x00000001) != 0;
366 has_cmov_ = (cpu_info[3] & 0x00008000) != 0;
367 has_mmx_ = (cpu_info[3] & 0x00800000) != 0;
368 has_sse_ = (cpu_info[3] & 0x02000000) != 0;
369 has_sse2_ = (cpu_info[3] & 0x04000000) != 0;
370 has_sse3_ = (cpu_info[2] & 0x00000001) != 0;
371 has_ssse3_ = (cpu_info[2] & 0x00000200) != 0;
372 has_sse41_ = (cpu_info[2] & 0x00080000) != 0;
373 has_sse42_ = (cpu_info[2] & 0x00100000) != 0;
374 has_osxsave_ = (cpu_info[2] & 0x08000000) != 0;
375 has_avx_ = (cpu_info[2] & 0x10000000) != 0;
376 has_fma3_ = (cpu_info[2] & 0x00001000) != 0;
378 if (family_ == 0x6) {
393 #if V8_HOST_ARCH_IA32
394 // SAHF is always available in compat/legacy mode,
397 // Query extended IDs.
398 __cpuid(cpu_info, 0x80000000);
399 unsigned num_ext_ids = cpu_info[0];
401 // Interpret extended CPU feature information.
402 if (num_ext_ids > 0x80000000) {
403 __cpuid(cpu_info, 0x80000001);
404 // SAHF must be probed in long mode.
405 has_sahf_ = (cpu_info[2] & 0x00000001) != 0;
409 #elif V8_HOST_ARCH_ARM
415 // Extract implementor from the "CPU implementer" field.
416 char* implementer = cpu_info.ExtractField("CPU implementer");
417 if (implementer != NULL) {
419 implementer_ = strtol(implementer, &end, 0);
420 if (end == implementer) {
423 delete[] implementer;
426 char* variant = cpu_info.ExtractField("CPU variant");
427 if (variant != NULL) {
429 variant_ = strtol(variant, &end, 0);
430 if (end == variant) {
436 // Extract part number from the "CPU part" field.
437 char* part = cpu_info.ExtractField("CPU part");
440 part_ = strtol(part, &end, 0);
447 // Extract architecture from the "CPU Architecture" field.
448 // The list is well-known, unlike the the output of
449 // the 'Processor' field which can vary greatly.
450 // See the definition of the 'proc_arch' array in
451 // $KERNEL/arch/arm/kernel/setup.c and the 'c_show' function in
453 char* architecture = cpu_info.ExtractField("CPU architecture");
454 if (architecture != NULL) {
456 architecture_ = strtol(architecture, &end, 10);
457 if (end == architecture) {
460 delete[] architecture;
462 // Unfortunately, it seems that certain ARMv6-based CPUs
463 // report an incorrect architecture number of 7!
465 // See http://code.google.com/p/android/issues/detail?id=10812
467 // We try to correct this by looking at the 'elf_platform'
468 // field reported by the 'Processor' field, which is of the
469 // form of "(v7l)" for an ARMv7-based CPU, and "(v6l)" for
470 // an ARMv6-one. For example, the Raspberry Pi is one popular
471 // ARMv6 device that reports architecture 7.
472 if (architecture_ == 7) {
473 char* processor = cpu_info.ExtractField("Processor");
474 if (HasListItem(processor, "(v6l)")) {
480 // elf_platform moved to the model name field in Linux v3.8.
481 if (architecture_ == 7) {
482 char* processor = cpu_info.ExtractField("model name");
483 if (HasListItem(processor, "(v6l)")) {
490 // Try to extract the list of CPU features from ELF hwcaps.
491 uint32_t hwcaps = ReadELFHWCaps();
493 has_idiva_ = (hwcaps & HWCAP_IDIVA) != 0;
494 has_neon_ = (hwcaps & HWCAP_NEON) != 0;
495 has_vfp_ = (hwcaps & HWCAP_VFP) != 0;
496 has_vfp3_ = (hwcaps & (HWCAP_VFPv3 | HWCAP_VFPv3D16 | HWCAP_VFPv4)) != 0;
497 has_vfp3_d32_ = (has_vfp3_ && ((hwcaps & HWCAP_VFPv3D16) == 0 ||
498 (hwcaps & HWCAP_VFPD32) != 0));
500 // Try to fallback to "Features" CPUInfo field.
501 char* features = cpu_info.ExtractField("Features");
502 has_idiva_ = HasListItem(features, "idiva");
503 has_neon_ = HasListItem(features, "neon");
504 has_thumb2_ = HasListItem(features, "thumb2");
505 has_vfp_ = HasListItem(features, "vfp");
506 if (HasListItem(features, "vfpv3d16")) {
508 } else if (HasListItem(features, "vfpv3")) {
510 has_vfp3_d32_ = true;
515 // Some old kernels will report vfp not vfpv3. Here we make an attempt
516 // to detect vfpv3 by checking for vfp *and* neon, since neon is only
517 // available on architectures with vfpv3. Checking neon on its own is
518 // not enough as it is possible to have neon without vfp.
519 if (has_vfp_ && has_neon_) {
523 // VFPv3 implies ARMv7, see ARM DDI 0406B, page A1-6.
524 if (architecture_ < 7 && has_vfp3_) {
528 // ARMv7 implies Thumb2.
529 if (architecture_ >= 7) {
533 // The earliest architecture with Thumb2 is ARMv6T2.
534 if (has_thumb2_ && architecture_ < 6) {
538 // We don't support any FPUs other than VFP.
543 uint32_t cpu_flags = SYSPAGE_ENTRY(cpuinfo)->flags;
544 if (cpu_flags & ARM_CPU_FLAG_V7) {
547 } else if (cpu_flags & ARM_CPU_FLAG_V6) {
549 // QNX doesn't say if Thumb2 is available.
550 // Assume false for the architectures older than ARMv7.
552 DCHECK(architecture_ >= 6);
553 has_fpu_ = (cpu_flags & CPU_FLAG_FPU) != 0;
555 if (cpu_flags & ARM_CPU_FLAG_NEON) {
557 has_vfp3_ = has_vfp_;
558 #ifdef ARM_CPU_FLAG_VFP_D32
559 has_vfp3_d32_ = (cpu_flags & ARM_CPU_FLAG_VFP_D32) != 0;
562 has_idiva_ = (cpu_flags & ARM_CPU_FLAG_IDIV) != 0;
564 #endif // V8_OS_LINUX
566 #elif V8_HOST_ARCH_MIPS || V8_HOST_ARCH_MIPS64
568 // Simple detection of FPU at runtime for Linux.
569 // It is based on /proc/cpuinfo, which reveals hardware configuration
570 // to user-space applications. According to MIPS (early 2010), no similar
571 // facility is universally available on the MIPS architectures,
572 // so it's up to individual OSes to provide such.
574 char* cpu_model = cpu_info.ExtractField("cpu model");
575 has_fpu_ = HasListItem(cpu_model, "FPU");
577 #ifdef V8_HOST_ARCH_MIPS
578 is_fp64_mode_ = __detect_fp64_mode();
579 architecture_ = __detect_mips_arch_revision();
582 #elif V8_HOST_ARCH_ARM64
586 // Extract implementor from the "CPU implementer" field.
587 char* implementer = cpu_info.ExtractField("CPU implementer");
588 if (implementer != NULL) {
590 implementer_ = strtol(implementer, &end, 0);
591 if (end == implementer) {
594 delete[] implementer;
597 char* variant = cpu_info.ExtractField("CPU variant");
598 if (variant != NULL) {
600 variant_ = strtol(variant, &end, 0);
601 if (end == variant) {
607 // Extract part number from the "CPU part" field.
608 char* part = cpu_info.ExtractField("CPU part");
611 part_ = strtol(part, &end, 0);
618 #elif V8_HOST_ARCH_PPC
620 #ifndef USE_SIMULATOR
622 // Read processor info from /proc/self/auxv.
623 char* auxv_cpu_type = NULL;
624 FILE* fp = fopen("/proc/self/auxv", "r");
626 #if V8_TARGET_ARCH_PPC64
632 size_t n = fread(&entry, sizeof(entry), 1, fp);
633 if (n == 0 || entry.a_type == AT_NULL) {
636 if (entry.a_type == AT_PLATFORM) {
637 auxv_cpu_type = reinterpret_cast<char*>(entry.a_un.a_val);
646 if (strcmp(auxv_cpu_type, "power8") == 0) {
648 } else if (strcmp(auxv_cpu_type, "power7") == 0) {
650 } else if (strcmp(auxv_cpu_type, "power6") == 0) {
652 } else if (strcmp(auxv_cpu_type, "power5") == 0) {
654 } else if (strcmp(auxv_cpu_type, "ppc970") == 0) {
656 } else if (strcmp(auxv_cpu_type, "ppc7450") == 0) {
658 } else if (strcmp(auxv_cpu_type, "pa6t") == 0) {
664 switch (_system_configuration.implementation) {
679 #endif // !USE_SIMULATOR
680 #endif // V8_HOST_ARCH_PPC
683 } } // namespace v8::base