1 // Copyright 2006-2009 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file.
5 // CPU specific code for arm independent of OS goes here.
8 #include <sys/mman.h> // for cache flushing.
11 #include <sys/syscall.h> // for cache flushing.
17 #if V8_TARGET_ARCH_ARM
19 #include "src/assembler.h"
20 #include "src/macro-assembler.h"
21 #include "src/simulator.h" // for cache flushing.
27 void CpuFeatures::FlushICache(void* start, size_t size) {
28 if (size == 0) return;
30 if (CpuFeatures::IsSupported(COHERENT_CACHE)) return;
32 #if defined(USE_SIMULATOR)
33 // Not generating ARM instructions for C-code. This means that we are
34 // building an ARM emulator based target. We should notify the simulator
35 // that the Icache was flushed.
36 // None of this code ends up in the snapshot so there are no issues
37 // around whether or not to generate the code when building snapshots.
38 Simulator::FlushICache(Isolate::Current()->simulator_i_cache(), start, size);
41 msync(start, size, MS_SYNC | MS_INVALIDATE_ICACHE);
44 register uint32_t beg asm("r0") = reinterpret_cast<uint32_t>(start);
45 register uint32_t end asm("r1") = beg + size;
46 register uint32_t flg asm("r2") = 0;
49 // This assembly works for both ARM and Thumb targets.
51 // Preserve r7; it is callee-saved, and GCC uses it as a frame pointer for
57 " ldr r7, =%c[scno]\n" // r7 = syscall number
62 : "r" (beg), "r" (end), "r" (flg), [scno] "i" (__ARM_NR_cacheflush)
67 } } // namespace v8::internal
69 #endif // V8_TARGET_ARCH_ARM