1 /*********************************************************************/
2 /* Copyright 2009, 2010 The University of Texas at Austin. */
3 /* All rights reserved. */
5 /* Redistribution and use in source and binary forms, with or */
6 /* without modification, are permitted provided that the following */
7 /* conditions are met: */
9 /* 1. Redistributions of source code must retain the above */
10 /* copyright notice, this list of conditions and the following */
13 /* 2. Redistributions in binary form must reproduce the above */
14 /* copyright notice, this list of conditions and the following */
15 /* disclaimer in the documentation and/or other materials */
16 /* provided with the distribution. */
18 /* THIS SOFTWARE IS PROVIDED BY THE UNIVERSITY OF TEXAS AT */
19 /* AUSTIN ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, */
20 /* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
21 /* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE */
22 /* DISCLAIMED. IN NO EVENT SHALL THE UNIVERSITY OF TEXAS AT */
23 /* AUSTIN OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, */
24 /* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES */
25 /* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE */
26 /* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR */
27 /* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */
28 /* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT */
29 /* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT */
30 /* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE */
31 /* POSSIBILITY OF SUCH DAMAGE. */
33 /* The views and conclusions contained in the software and */
34 /* documentation are those of the authors and should not be */
35 /* interpreted as representing official policies, either expressed */
36 /* or implied, of The University of Texas at Austin. */
37 /*********************************************************************/
42 #if defined(__i386__) || defined(__x86_64__) || defined(_M_IX86) || defined(_M_X64)
46 #define VENDOR_INTEL 1
49 #define VENDOR_CYRIX 4
50 #define VENDOR_NEXGEN 5
51 #define VENDOR_CENTAUR 6
54 #define VENDOR_TRANSMETA 9
56 #define VENDOR_HYGON 11
57 #define VENDOR_UNKNOWN 99
59 #define BITMASK(a, b, c) ((((a) >> (b)) & (c)))
61 #define FAMILY_80486 4
68 #define GET_EXFAMILY 1
76 #define GET_STEPPING 9
77 #define GET_BLANDID 10
78 #define GET_FEATURE 11
79 #define GET_NUMSHARE 12
80 #define GET_NUMCORES 13
87 #define GET_REVISION 4
91 #define CORE_UNKNOWN 0
96 #define CORE_COPPERMINE 5
97 #define CORE_NORTHWOOD 6
98 #define CORE_PRESCOTT 7
100 #define CORE_ATHLON 9
101 #define CORE_OPTERON 10
102 #define CORE_BARCELONA 11
103 #define CORE_VIAC3 12
104 #define CORE_YONAH 13
105 #define CORE_CORE2 14
106 #define CORE_PENRYN 15
107 #define CORE_DUNNINGTON 16
108 #define CORE_NEHALEM 17
111 #define CORE_SANDYBRIDGE 20
112 #define CORE_BOBCAT 21
113 #define CORE_BULLDOZER 22
114 #define CORE_PILEDRIVER 23
115 #define CORE_HASWELL 24
116 #define CORE_STEAMROLLER 25
117 #define CORE_EXCAVATOR 26
119 #define CORE_SKYLAKEX 28
120 #define CORE_DHYANA 29
121 #define CORE_COOPERLAKE 30
123 #define HAVE_SSE (1 << 0)
124 #define HAVE_SSE2 (1 << 1)
125 #define HAVE_SSE3 (1 << 2)
126 #define HAVE_SSSE3 (1 << 3)
127 #define HAVE_SSE4_1 (1 << 4)
128 #define HAVE_SSE4_2 (1 << 5)
129 #define HAVE_SSE4A (1 << 6)
130 #define HAVE_SSE5 (1 << 7)
131 #define HAVE_MMX (1 << 8)
132 #define HAVE_3DNOW (1 << 9)
133 #define HAVE_3DNOWEX (1 << 10)
134 #define HAVE_CMOV (1 << 11)
135 #define HAVE_PSE (1 << 12)
136 #define HAVE_CFLUSH (1 << 13)
137 #define HAVE_HIT (1 << 14)
138 #define HAVE_MISALIGNSSE (1 << 15)
139 #define HAVE_128BITFPU (1 << 16)
140 #define HAVE_FASTMOVU (1 << 17)
141 #define HAVE_AVX (1 << 18)
142 #define HAVE_FMA4 (1 << 19)
143 #define HAVE_FMA3 (1 << 20)
144 #define HAVE_AVX512VL (1 << 21)
145 #define HAVE_AVX2 (1 << 22)
146 #define HAVE_AVX512BF16 (1 << 23)
148 #define CACHE_INFO_L1_I 1
149 #define CACHE_INFO_L1_D 2
150 #define CACHE_INFO_L2 3
151 #define CACHE_INFO_L3 4
152 #define CACHE_INFO_L1_ITB 5
153 #define CACHE_INFO_L1_DTB 6
154 #define CACHE_INFO_L1_LITB 7
155 #define CACHE_INFO_L1_LDTB 8
156 #define CACHE_INFO_L2_ITB 9
157 #define CACHE_INFO_L2_DTB 10
158 #define CACHE_INFO_L2_LITB 11
159 #define CACHE_INFO_L2_LDTB 12
168 #define CPUTYPE_UNKNOWN 0
169 #define CPUTYPE_INTEL_UNKNOWN 1
170 #define CPUTYPE_UMC_UNKNOWN 2
171 #define CPUTYPE_AMD_UNKNOWN 3
172 #define CPUTYPE_CYRIX_UNKNOWN 4
173 #define CPUTYPE_NEXGEN_UNKNOWN 5
174 #define CPUTYPE_CENTAUR_UNKNOWN 6
175 #define CPUTYPE_RISE_UNKNOWN 7
176 #define CPUTYPE_SIS_UNKNOWN 8
177 #define CPUTYPE_TRANSMETA_UNKNOWN 9
178 #define CPUTYPE_NSC_UNKNOWN 10
180 #define CPUTYPE_80386 11
181 #define CPUTYPE_80486 12
182 #define CPUTYPE_PENTIUM 13
183 #define CPUTYPE_PENTIUM2 14
184 #define CPUTYPE_PENTIUM3 15
185 #define CPUTYPE_PENTIUMM 16
186 #define CPUTYPE_PENTIUM4 17
187 #define CPUTYPE_CORE2 18
188 #define CPUTYPE_PENRYN 19
189 #define CPUTYPE_DUNNINGTON 20
190 #define CPUTYPE_NEHALEM 21
191 #define CPUTYPE_ATOM 22
192 #define CPUTYPE_ITANIUM 23
193 #define CPUTYPE_ITANIUM2 24
194 #define CPUTYPE_AMD5X86 25
195 #define CPUTYPE_AMDK6 26
196 #define CPUTYPE_ATHLON 27
197 #define CPUTYPE_DURON 28
198 #define CPUTYPE_OPTERON 29
199 #define CPUTYPE_BARCELONA 30
200 #define CPUTYPE_SHANGHAI 31
201 #define CPUTYPE_ISTANBUL 32
202 #define CPUTYPE_CYRIX5X86 33
203 #define CPUTYPE_CYRIXM1 34
204 #define CPUTYPE_CYRIXM2 35
205 #define CPUTYPE_NEXGENNX586 36
206 #define CPUTYPE_CENTAURC6 37
207 #define CPUTYPE_RISEMP6 38
208 #define CPUTYPE_SYS55X 39
209 #define CPUTYPE_CRUSOETM3X 40
210 #define CPUTYPE_NSGEODE 41
211 #define CPUTYPE_VIAC3 42
212 #define CPUTYPE_NANO 43
213 #define CPUTYPE_SANDYBRIDGE 44
214 #define CPUTYPE_BOBCAT 45
215 #define CPUTYPE_BULLDOZER 46
216 #define CPUTYPE_PILEDRIVER 47
217 #define CPUTYPE_HASWELL 48
218 #define CPUTYPE_STEAMROLLER 49
219 #define CPUTYPE_EXCAVATOR 50
220 #define CPUTYPE_ZEN 51
221 #define CPUTYPE_SKYLAKEX 52
222 #define CPUTYPE_DHYANA 53
223 #define CPUTYPE_COOPERLAKE 54
225 #define CPUTYPE_HYGON_UNKNOWN 99