2 * emulator main execution loop
4 * Copyright (c) 2003-2005 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
22 #include "disas/disas.h"
24 #include "qemu/atomic.h"
25 #include "sysemu/qtest.h"
26 #include "qemu/timer.h"
27 #include "sysemu/hax.h"
29 /* -icount align implementation. */
31 typedef struct SyncClocks {
33 int64_t last_cpu_icount;
34 int64_t realtime_clock;
37 #if !defined(CONFIG_USER_ONLY)
38 /* Allow the guest to have a max 3ms advance.
39 * The difference between the 2 clocks could therefore
42 #define VM_CLOCK_ADVANCE 3000000
43 #define THRESHOLD_REDUCE 1.5
44 #define MAX_DELAY_PRINT_RATE 2000000000LL
45 #define MAX_NB_PRINTS 100
47 static void align_clocks(SyncClocks *sc, const CPUState *cpu)
51 if (!icount_align_option) {
55 cpu_icount = cpu->icount_extra + cpu->icount_decr.u16.low;
56 sc->diff_clk += cpu_icount_to_ns(sc->last_cpu_icount - cpu_icount);
57 sc->last_cpu_icount = cpu_icount;
59 if (sc->diff_clk > VM_CLOCK_ADVANCE) {
61 struct timespec sleep_delay, rem_delay;
62 sleep_delay.tv_sec = sc->diff_clk / 1000000000LL;
63 sleep_delay.tv_nsec = sc->diff_clk % 1000000000LL;
64 if (nanosleep(&sleep_delay, &rem_delay) < 0) {
65 sc->diff_clk -= (sleep_delay.tv_sec - rem_delay.tv_sec) * 1000000000LL;
66 sc->diff_clk -= sleep_delay.tv_nsec - rem_delay.tv_nsec;
71 Sleep(sc->diff_clk / SCALE_MS);
77 static void print_delay(const SyncClocks *sc)
79 static float threshold_delay;
80 static int64_t last_realtime_clock;
83 if (icount_align_option &&
84 sc->realtime_clock - last_realtime_clock >= MAX_DELAY_PRINT_RATE &&
85 nb_prints < MAX_NB_PRINTS) {
86 if ((-sc->diff_clk / (float)1000000000LL > threshold_delay) ||
87 (-sc->diff_clk / (float)1000000000LL <
88 (threshold_delay - THRESHOLD_REDUCE))) {
89 threshold_delay = (-sc->diff_clk / 1000000000LL) + 1;
90 printf("Warning: The guest is now late by %.1f to %.1f seconds\n",
94 last_realtime_clock = sc->realtime_clock;
99 static void init_delay_params(SyncClocks *sc,
102 if (!icount_align_option) {
105 sc->realtime_clock = qemu_clock_get_ns(QEMU_CLOCK_REALTIME);
106 sc->diff_clk = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) -
108 cpu_get_clock_offset();
109 sc->last_cpu_icount = cpu->icount_extra + cpu->icount_decr.u16.low;
110 if (sc->diff_clk < max_delay) {
111 max_delay = sc->diff_clk;
113 if (sc->diff_clk > max_advance) {
114 max_advance = sc->diff_clk;
117 /* Print every 2s max if the guest is late. We limit the number
118 of printed messages to NB_PRINT_MAX(currently 100) */
122 static void align_clocks(SyncClocks *sc, const CPUState *cpu)
126 static void init_delay_params(SyncClocks *sc, const CPUState *cpu)
129 #endif /* CONFIG USER ONLY */
131 void cpu_loop_exit(CPUState *cpu)
133 cpu->current_tb = NULL;
134 siglongjmp(cpu->jmp_env, 1);
137 /* exit the current TB from a signal handler. The host registers are
138 restored in a state compatible with the CPU emulator
140 #if defined(CONFIG_SOFTMMU)
141 void cpu_resume_from_signal(CPUState *cpu, void *puc)
143 /* XXX: restore cpu registers saved in host registers */
145 cpu->exception_index = -1;
146 siglongjmp(cpu->jmp_env, 1);
150 /* Execute a TB, and fix up the CPU state afterwards if necessary */
151 static inline tcg_target_ulong cpu_tb_exec(CPUState *cpu, uint8_t *tb_ptr)
153 CPUArchState *env = cpu->env_ptr;
156 #if defined(DEBUG_DISAS)
157 if (qemu_loglevel_mask(CPU_LOG_TB_CPU)) {
158 #if defined(TARGET_I386)
159 log_cpu_state(cpu, CPU_DUMP_CCOP);
160 #elif defined(TARGET_M68K)
161 /* ??? Should not modify env state for dumping. */
162 cpu_m68k_flush_flags(env, env->cc_op);
163 env->cc_op = CC_OP_FLAGS;
164 env->sr = (env->sr & 0xffe0) | env->cc_dest | (env->cc_x << 4);
165 log_cpu_state(cpu, 0);
167 log_cpu_state(cpu, 0);
170 #endif /* DEBUG_DISAS */
172 next_tb = tcg_qemu_tb_exec(env, tb_ptr);
173 trace_exec_tb_exit((void *) (next_tb & ~TB_EXIT_MASK),
174 next_tb & TB_EXIT_MASK);
176 if ((next_tb & TB_EXIT_MASK) > TB_EXIT_IDX1) {
177 /* We didn't start executing this TB (eg because the instruction
178 * counter hit zero); we must restore the guest PC to the address
179 * of the start of the TB.
181 CPUClass *cc = CPU_GET_CLASS(cpu);
182 TranslationBlock *tb = (TranslationBlock *)(next_tb & ~TB_EXIT_MASK);
183 if (cc->synchronize_from_tb) {
184 cc->synchronize_from_tb(cpu, tb);
187 cc->set_pc(cpu, tb->pc);
190 if ((next_tb & TB_EXIT_MASK) == TB_EXIT_REQUESTED) {
191 /* We were asked to stop executing TBs (probably a pending
192 * interrupt. We've now stopped, so clear the flag.
194 cpu->tcg_exit_req = 0;
199 /* Execute the code without caching the generated code. An interpreter
200 could be used if available. */
201 static void cpu_exec_nocache(CPUArchState *env, int max_cycles,
202 TranslationBlock *orig_tb)
204 CPUState *cpu = ENV_GET_CPU(env);
205 TranslationBlock *tb;
207 /* Should never happen.
208 We only end up here when an existing TB is too long. */
209 if (max_cycles > CF_COUNT_MASK)
210 max_cycles = CF_COUNT_MASK;
212 tb = tb_gen_code(cpu, orig_tb->pc, orig_tb->cs_base, orig_tb->flags,
214 cpu->current_tb = tb;
215 /* execute the generated code */
216 trace_exec_tb_nocache(tb, tb->pc);
217 cpu_tb_exec(cpu, tb->tc_ptr);
218 cpu->current_tb = NULL;
219 tb_phys_invalidate(tb, -1);
223 static TranslationBlock *tb_find_slow(CPUArchState *env,
225 target_ulong cs_base,
228 CPUState *cpu = ENV_GET_CPU(env);
229 TranslationBlock *tb, **ptb1;
231 tb_page_addr_t phys_pc, phys_page1;
232 target_ulong virt_page2;
234 tcg_ctx.tb_ctx.tb_invalidated_flag = 0;
236 /* find translated block using physical mappings */
237 phys_pc = get_page_addr_code(env, pc);
238 phys_page1 = phys_pc & TARGET_PAGE_MASK;
239 h = tb_phys_hash_func(phys_pc);
240 ptb1 = &tcg_ctx.tb_ctx.tb_phys_hash[h];
246 tb->page_addr[0] == phys_page1 &&
247 tb->cs_base == cs_base &&
248 tb->flags == flags) {
249 /* check next page if needed */
250 if (tb->page_addr[1] != -1) {
251 tb_page_addr_t phys_page2;
253 virt_page2 = (pc & TARGET_PAGE_MASK) +
255 phys_page2 = get_page_addr_code(env, virt_page2);
256 if (tb->page_addr[1] == phys_page2)
262 ptb1 = &tb->phys_hash_next;
265 /* if no translated code available, then translate it now */
266 tb = tb_gen_code(cpu, pc, cs_base, flags, 0);
269 /* Move the last found TB to the head of the list */
271 *ptb1 = tb->phys_hash_next;
272 tb->phys_hash_next = tcg_ctx.tb_ctx.tb_phys_hash[h];
273 tcg_ctx.tb_ctx.tb_phys_hash[h] = tb;
275 /* we add the TB in the virtual pc hash table */
276 cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)] = tb;
280 static inline TranslationBlock *tb_find_fast(CPUArchState *env)
282 CPUState *cpu = ENV_GET_CPU(env);
283 TranslationBlock *tb;
284 target_ulong cs_base, pc;
287 /* we record a subset of the CPU state. It will
288 always be the same before a given translated block
290 cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags);
291 tb = cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)];
292 if (unlikely(!tb || tb->pc != pc || tb->cs_base != cs_base ||
293 tb->flags != flags)) {
294 tb = tb_find_slow(env, pc, cs_base, flags);
299 static void cpu_handle_debug_exception(CPUArchState *env)
301 CPUState *cpu = ENV_GET_CPU(env);
302 CPUClass *cc = CPU_GET_CLASS(cpu);
305 if (!cpu->watchpoint_hit) {
306 QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
307 wp->flags &= ~BP_WATCHPOINT_HIT;
311 cc->debug_excp_handler(cpu);
314 /* main execution loop */
316 volatile sig_atomic_t exit_request;
319 * QEMU emulate can happens because of MMIO or emulation mode, i.e. non-PG mode,
320 * when it's because of MMIO, the MMIO, the interrupt should not be emulated,
321 * because MMIO is emulated for only one instruction now and then back to
324 static int need_handle_intr_request(CPUState *cpu)
327 if (!hax_enabled() || hax_vcpu_emulation_mode(cpu))
328 return cpu->interrupt_request;
331 return cpu->interrupt_request;
336 int cpu_exec(CPUArchState *env)
338 CPUState *cpu = ENV_GET_CPU(env);
339 CPUClass *cc = CPU_GET_CLASS(cpu);
341 X86CPU *x86_cpu = X86_CPU(cpu);
343 int ret, interrupt_request;
344 TranslationBlock *tb;
349 /* This must be volatile so it is not trashed by longjmp() */
350 volatile bool have_tb_lock = false;
353 if (!cpu_has_work(cpu)) {
362 /* As long as current_cpu is null, up to the assignment just above,
363 * requests by other threads to exit the execution loop are expected to
364 * be issued using the exit_request global. We must make sure that our
365 * evaluation of the global value is performed past the current_cpu
366 * value transition point, which requires a memory barrier as well as
367 * an instruction scheduling constraint on modern architectures. */
370 if (unlikely(exit_request)) {
371 cpu->exit_request = 1;
374 cc->cpu_exec_enter(cpu);
375 cpu->exception_index = -1;
377 /* Calculate difference between guest clock and host clock.
378 * This delay includes the delay of the last cycle, so
379 * what we have to do is sleep until it is 0. As for the
380 * advance/delay we gain here, we try to fix it next time.
382 init_delay_params(&sc, cpu);
384 /* prepare setjmp context for exception handling */
386 if (sigsetjmp(cpu->jmp_env, 0) == 0) {
387 /* if an exception is pending, we execute it here */
388 if (cpu->exception_index >= 0) {
389 if (cpu->exception_index >= EXCP_INTERRUPT) {
390 /* exit request from the cpu execution loop */
391 ret = cpu->exception_index;
392 if (ret == EXCP_DEBUG) {
393 cpu_handle_debug_exception(env);
397 #if defined(CONFIG_USER_ONLY)
398 /* if user mode only, we simulate a fake exception
399 which will be handled outside the cpu execution
401 #if defined(TARGET_I386)
402 cc->do_interrupt(cpu);
404 ret = cpu->exception_index;
407 cc->do_interrupt(cpu);
408 cpu->exception_index = -1;
414 if (hax_enabled() && !hax_vcpu_exec(cpu))
415 longjmp(cpu->jmp_env, 1);
418 next_tb = 0; /* force lookup of first TB */
420 interrupt_request = need_handle_intr_request(cpu);
421 if (unlikely(interrupt_request)) {
422 if (unlikely(cpu->singlestep_enabled & SSTEP_NOIRQ)) {
423 /* Mask out external interrupts for this step. */
424 interrupt_request &= ~CPU_INTERRUPT_SSTEP_MASK;
426 if (interrupt_request & CPU_INTERRUPT_DEBUG) {
427 cpu->interrupt_request &= ~CPU_INTERRUPT_DEBUG;
428 cpu->exception_index = EXCP_DEBUG;
431 if (interrupt_request & CPU_INTERRUPT_HALT) {
432 cpu->interrupt_request &= ~CPU_INTERRUPT_HALT;
434 cpu->exception_index = EXCP_HLT;
437 #if defined(TARGET_I386)
438 if (interrupt_request & CPU_INTERRUPT_INIT) {
439 cpu_svm_check_intercept_param(env, SVM_EXIT_INIT, 0);
440 do_cpu_init(x86_cpu);
441 cpu->exception_index = EXCP_HALTED;
445 if (interrupt_request & CPU_INTERRUPT_RESET) {
449 /* The target hook has 3 exit conditions:
450 False when the interrupt isn't processed,
451 True when it is, and we should restart on a new TB,
452 and via longjmp via cpu_loop_exit. */
453 if (cc->cpu_exec_interrupt(cpu, interrupt_request)) {
456 /* Don't use the cached interrupt_request value,
457 do_interrupt may have updated the EXITTB flag. */
458 if (cpu->interrupt_request & CPU_INTERRUPT_EXITTB) {
459 cpu->interrupt_request &= ~CPU_INTERRUPT_EXITTB;
460 /* ensure that no TB jump will be modified as
461 the program flow was changed */
465 if (unlikely(cpu->exit_request)) {
466 cpu->exit_request = 0;
467 cpu->exception_index = EXCP_INTERRUPT;
470 spin_lock(&tcg_ctx.tb_ctx.tb_lock);
472 tb = tb_find_fast(env);
473 /* Note: we do it here to avoid a gcc bug on Mac OS X when
474 doing it in tb_find_slow */
475 if (tcg_ctx.tb_ctx.tb_invalidated_flag) {
476 /* as some TB could have been invalidated because
477 of memory exceptions while generating the code, we
478 must recompute the hash index here */
480 tcg_ctx.tb_ctx.tb_invalidated_flag = 0;
482 if (qemu_loglevel_mask(CPU_LOG_EXEC)) {
483 qemu_log("Trace %p [" TARGET_FMT_lx "] %s\n",
484 tb->tc_ptr, tb->pc, lookup_symbol(tb->pc));
486 /* see if we can patch the calling TB. When the TB
487 spans two pages, we cannot safely do a direct
489 if (next_tb != 0 && tb->page_addr[1] == -1) {
490 tb_add_jump((TranslationBlock *)(next_tb & ~TB_EXIT_MASK),
491 next_tb & TB_EXIT_MASK, tb);
493 have_tb_lock = false;
494 spin_unlock(&tcg_ctx.tb_ctx.tb_lock);
496 /* cpu_interrupt might be called while translating the
497 TB, but before it is linked into a potentially
498 infinite loop and becomes env->current_tb. Avoid
499 starting execution if there is a pending interrupt. */
500 cpu->current_tb = tb;
502 if (likely(!cpu->exit_request)) {
503 trace_exec_tb(tb, tb->pc);
505 /* execute the generated code */
506 next_tb = cpu_tb_exec(cpu, tc_ptr);
507 switch (next_tb & TB_EXIT_MASK) {
508 case TB_EXIT_REQUESTED:
509 /* Something asked us to stop executing
510 * chained TBs; just continue round the main
511 * loop. Whatever requested the exit will also
512 * have set something else (eg exit_request or
513 * interrupt_request) which we will handle
514 * next time around the loop.
516 tb = (TranslationBlock *)(next_tb & ~TB_EXIT_MASK);
519 case TB_EXIT_ICOUNT_EXPIRED:
521 /* Instruction counter expired. */
523 tb = (TranslationBlock *)(next_tb & ~TB_EXIT_MASK);
524 insns_left = cpu->icount_decr.u32;
525 if (cpu->icount_extra && insns_left >= 0) {
526 /* Refill decrementer and continue execution. */
527 cpu->icount_extra += insns_left;
528 if (cpu->icount_extra > 0xffff) {
531 insns_left = cpu->icount_extra;
533 cpu->icount_extra -= insns_left;
534 cpu->icount_decr.u16.low = insns_left;
536 if (insns_left > 0) {
537 /* Execute remaining instructions. */
538 cpu_exec_nocache(env, insns_left, tb);
539 align_clocks(&sc, cpu);
541 cpu->exception_index = EXCP_INTERRUPT;
551 cpu->current_tb = NULL;
553 if (hax_enabled() && hax_stop_emulation(cpu))
556 /* Try to align the host and virtual clocks
557 if the guest is in advance */
558 align_clocks(&sc, cpu);
559 /* reset soft MMU for next block (it can currently
560 only be set by a memory fault) */
563 /* Reload env after longjmp - the compiler may have smashed all
564 * local variables as longjmp is marked 'noreturn'. */
567 cc = CPU_GET_CLASS(cpu);
569 x86_cpu = X86_CPU(cpu);
572 spin_unlock(&tcg_ctx.tb_ctx.tb_lock);
573 have_tb_lock = false;
578 cc->cpu_exec_exit(cpu);
580 /* fail safe : never use current_cpu outside cpu_exec() */