2 * armboot - Startup Code for SA1100 CPU
4 * Copyright (C) 1998 Dan Malek <dmalek@jlc.net>
5 * Copyright (C) 1999 Magnus Damm <kieraypc01.p.y.kie.era.ericsson.se>
6 * Copyright (C) 2000 Wolfgang Denk <wd@denx.de>
7 * Copyright (c) 2001 Alex Züpke <azu@sysgo.de>
9 * See file CREDITS for list of people who contributed to this
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
34 *************************************************************************
36 * Jump vector table as in table 3.1 in [1]
38 *************************************************************************
44 ldr pc, _undefined_instruction
45 ldr pc, _software_interrupt
46 ldr pc, _prefetch_abort
52 _undefined_instruction: .word undefined_instruction
53 _software_interrupt: .word software_interrupt
54 _prefetch_abort: .word prefetch_abort
55 _data_abort: .word data_abort
56 _not_used: .word not_used
60 .balignl 16,0xdeadbeef
64 *************************************************************************
66 * Startup Code (reset vector)
68 * do important init only if we don't start from memory!
69 * relocate armboot to ram
71 * jump to second stage
73 *************************************************************************
84 * Note: _armboot_end_data and _armboot_end are defined
85 * by the (board-dependent) linker script.
86 * _armboot_end_data is the first usable FLASH address after armboot
88 .globl _armboot_end_data
90 .word armboot_end_data
96 * _armboot_real_end is the first usable RAM address behind armboot
97 * and the various stacks
99 .globl _armboot_real_end
103 #ifdef CONFIG_USE_IRQ
104 /* IRQ stack memory (calculated at run-time) */
105 .globl IRQ_STACK_START
109 /* IRQ stack memory (calculated at run-time) */
110 .globl FIQ_STACK_START
117 * the actual reset code
122 * set the cpu to SVC32 mode
130 * we do sys-critical inits only at reboot,
131 * not when booting from ram!
133 #ifdef CONFIG_INIT_CRITICAL
139 * relocate armboot to RAM
141 adr r0, _start /* r0 <- current position of code */
142 ldr r2, _armboot_start
144 sub r2, r3, r2 /* r2 <- size of armboot */
145 ldr r1, _TEXT_BASE /* r1 <- destination address */
146 add r2, r0, r2 /* r2 <- source end address */
149 * r0 = source address
150 * r1 = target address
151 * r2 = source end address
159 /* set up the stack */
161 add r0, r0, #CONFIG_STACKSIZE
162 sub sp, r0, #12 /* leave 3 words for abort-stack */
164 ldr pc, _start_armboot
166 _start_armboot: .word start_armboot
170 *************************************************************************
172 * CPU_init_critical registers
174 * setup important registers
175 * setup memory timing
177 *************************************************************************
181 /* Interupt-Controller base address */
182 IC_BASE: .word 0x90050000
186 /* Reset-Controller */
187 RST_BASE: .word 0x90030000
193 PWR_BASE: .word 0x90020000
196 cpuspeed: .word CFG_CPUSPEED
207 /* set clock speed */
213 * before relocating, we have to setup RAM timing
214 * because memory timing is board-dependend, you will
215 * find a memsetup.S in your board directory.
222 * disable MMU stuff and enable I-cache
225 bic r0, r0, #0x00002000 @ clear bit 13 (X)
226 bic r0, r0, #0x0000000f @ clear bits 3-0 (WCAM)
227 orr r0, r0, #0x00001000 @ set bit 12 (I) Icache
228 orr r0, r0, #0x00000002 @ set bit 2 (A) Align
232 * flush v4 I/D caches
235 mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */
236 mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */
242 *************************************************************************
246 *************************************************************************
252 #define S_FRAME_SIZE 72
274 #define MODE_SVC 0x13
278 * use bad_save_user_regs for abort/prefetch/undef/swi ...
279 * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
282 .macro bad_save_user_regs
283 sub sp, sp, #S_FRAME_SIZE
284 stmia sp, {r0 - r12} @ Calling r0-r12
288 add r2, r2, #CONFIG_STACKSIZE
290 ldmia r2, {r2 - r4} @ get pc, cpsr, old_r0
291 add r0, sp, #S_FRAME_SIZE @ restore sp_SVC
295 stmia r5, {r0 - r4} @ save sp_SVC, lr_SVC, pc, cpsr, old_r
299 .macro irq_save_user_regs
300 sub sp, sp, #S_FRAME_SIZE
301 stmia sp, {r0 - r12} @ Calling r0-r12
303 stmdb r8, {sp, lr}^ @ Calling SP, LR
304 str lr, [r8, #0] @ Save calling PC
306 str r6, [r8, #4] @ Save CPSR
307 str r0, [r8, #8] @ Save OLD_R0
311 .macro irq_restore_user_regs
312 ldmia sp, {r0 - lr}^ @ Calling r0 - lr
314 ldr lr, [sp, #S_PC] @ Get PC
315 add sp, sp, #S_FRAME_SIZE
316 subs pc, lr, #4 @ return & move spsr_svc into cpsr
320 ldr r13, _armboot_end @ setup our mode stack
321 add r13, r13, #CONFIG_STACKSIZE @ resides at top of normal stack
324 str lr, [r13] @ save caller lr / spsr
328 mov r13, #MODE_SVC @ prepare SVC-Mode
334 .macro get_irq_stack @ setup IRQ stack
335 ldr sp, IRQ_STACK_START
338 .macro get_fiq_stack @ setup FIQ stack
339 ldr sp, FIQ_STACK_START
346 undefined_instruction:
349 bl do_undefined_instruction
355 bl do_software_interrupt
375 #ifdef CONFIG_USE_IRQ
382 irq_restore_user_regs
387 /* someone ought to write a more effiction fiq_save_user_regs */
390 irq_restore_user_regs
412 mov r1, #0x0 @ set bit 3-0 ...
413 str r1, [r0, #RCSR] @ ... to clear in RCSR
415 str r1, [r0, #RSRR] @ and perform reset
416 b reset_cpu @ silly, but repeat endlessly