2 * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
3 * Scott McNutt <smcnutt@psyent.com>
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 #if defined(CFG_NIOS_EPCSBASE)
30 #include <nios2-epcs.h>
33 /*-----------------------------------------------------------------------*/
35 "epcs - read/write Cyclone EPCS configuration device.\n"
39 "epcs erase start [end]\n"\
40 " - erase sector start or sectors start through end.\n"\
42 " - display EPCS device information.\n"\
43 "epcs protect on | off\n"\
44 " - turn device protection on or off.\n"\
45 "epcs read addr offset count\n"\
46 " - read count bytes from offset to addr.\n"\
47 "epcs write addr offset count\n"\
48 " - write count bytes to offset from addr.\n"\
49 "epcs verify addr offset count\n"\
50 " - verify count bytes at offset from addr.\n"
53 /*-----------------------------------------------------------------------*/
54 /* Operation codes for serial configuration devices
56 #define EPCS_WRITE_ENA 0x06 /* Write enable */
57 #define EPCS_WRITE_DIS 0x04 /* Write disable */
58 #define EPCS_READ_STAT 0x05 /* Read status */
59 #define EPCS_READ_BYTES 0x03 /* Read bytes */
60 #define EPCS_READ_ID 0xab /* Read silicon id */
61 #define EPCS_WRITE_STAT 0x01 /* Write status */
62 #define EPCS_WRITE_BYTES 0x02 /* Write bytes */
63 #define EPCS_ERASE_BULK 0xc7 /* Erase entire device */
64 #define EPCS_ERASE_SECT 0xd8 /* Erase sector */
66 /* Device status register bits
68 #define EPCS_STATUS_WIP (1<<0) /* Write in progress */
69 #define EPCS_STATUS_WEL (1<<1) /* Write enable latch */
73 #define EPCS_TIMEOUT 100 /* 100 msec timeout */
75 static nios_spi_t *epcs =
76 (nios_spi_t *)CACHE_BYPASS(CFG_NIOS_EPCSBASE);
78 /***********************************************************************
80 ***********************************************************************/
81 static int epcs_cs (int assert)
86 epcs->control |= NIOS_SPI_SSO;
88 /* Let all bits shift out */
89 start = get_timer (0);
90 while ((epcs->status & NIOS_SPI_TMT) == 0)
91 if (get_timer (start) > EPCS_TIMEOUT)
93 epcs->control &= ~NIOS_SPI_SSO;
98 static int epcs_tx (unsigned char c)
102 start = get_timer (0);
103 while ((epcs->status & NIOS_SPI_TRDY) == 0)
104 if (get_timer (start) > EPCS_TIMEOUT)
110 static int epcs_rx (void)
114 start = get_timer (0);
115 while ((epcs->status & NIOS_SPI_RRDY) == 0)
116 if (get_timer (start) > EPCS_TIMEOUT)
118 return (epcs->rxdata);
121 static unsigned char bitrev[] = {
122 0x00, 0x08, 0x04, 0x0c, 0x02, 0x0a, 0x06, 0x0e,
123 0x01, 0x09, 0x05, 0x0d, 0x03, 0x0b, 0x07, 0x0f
126 static unsigned char epcs_bitrev (unsigned char c)
131 val |= bitrev[c & 0x0f]<<4;
135 static void epcs_rcv (unsigned char *dst, int len)
143 static void epcs_rrcv (unsigned char *dst, int len)
147 *dst++ = epcs_bitrev (epcs_rx ());
151 static void epcs_snd (unsigned char *src, int len)
159 static void epcs_rsnd (unsigned char *src, int len)
162 epcs_tx (epcs_bitrev (*src++));
167 static void epcs_wr_enable (void)
170 epcs_tx (EPCS_WRITE_ENA);
175 static unsigned char epcs_status_rd (void)
177 unsigned char status;
180 epcs_tx (EPCS_READ_STAT);
188 static void epcs_status_wr (unsigned char status)
192 epcs_tx (EPCS_WRITE_STAT);
200 /***********************************************************************
202 ***********************************************************************/
204 static struct epcs_devinfo_t devinfo[] = {
205 { "EPCS1 ", 0x10, 17, 4, 15, 8, 0x0c },
206 { "EPCS4 ", 0x12, 19, 8, 16, 8, 0x1c },
210 epcs_devinfo_t *epcs_dev_find (void)
212 unsigned char buf[4];
215 struct epcs_devinfo_t *dev = NULL;
217 /* Read silicon id requires 3 "dummy bytes" before it's put
220 buf[0] = EPCS_READ_ID;
228 if (epcs_cs (0) == -1)
232 /* Find the info struct */
234 while (devinfo[i].name) {
235 if (id == devinfo[i].id) {
245 /***********************************************************************
247 ***********************************************************************/
248 int epcs_cfgsz (void)
251 unsigned char buf[128];
253 struct epcs_devinfo_t *dev = epcs_dev_find ();
258 /* Read in the first 128 bytes of the device */
259 buf[0] = EPCS_READ_BYTES;
266 epcs_rrcv (buf, sizeof(buf));
269 /* Search for the starting 0x6a which is followed by the
270 * 4-byte 'register' and 4-byte bit-count.
273 while (p < buf + sizeof(buf)-8) {
275 /* Point to bit count and extract */
281 /* Convert to byte count */
284 } else if (*p == 0xff) {
285 /* 0xff is ok ... just skip */
289 /* Not 0xff or 0x6a ... something's not
290 * right ... report 'unknown' (sz=0).
298 int epcs_erase (unsigned start, unsigned end)
300 unsigned off, sectsz;
301 unsigned char buf[4];
302 struct epcs_devinfo_t *dev = epcs_dev_find ();
304 if (!dev || (start>end))
307 /* Erase the requested sectors. An address is required
308 * that lies within the requested sector -- we'll just
309 * use the first address in the sector.
311 printf ("epcs erasing sector %d ", start);
313 printf ("to %d ", end);
314 sectsz = (1 << dev->sz_sect);
315 while (start <= end) {
316 off = start * sectsz;
319 buf[0] = EPCS_ERASE_SECT;
329 printf ("."); /* Some user feedback */
331 /* Wait for erase to complete */
332 while (epcs_status_rd() & EPCS_STATUS_WIP)
339 int epcs_read (ulong addr, ulong off, ulong cnt)
341 unsigned char buf[4];
342 struct epcs_devinfo_t *dev = epcs_dev_find ();
347 buf[0] = EPCS_READ_BYTES;
354 epcs_rrcv ((unsigned char *)addr, cnt);
360 int epcs_write (ulong addr, ulong off, ulong cnt)
364 unsigned char buf[4];
365 struct epcs_devinfo_t *dev = epcs_dev_find ();
370 pgsz = (1<<dev->sz_page);
373 wrcnt = pgsz - (off % pgsz);
376 wrcnt = (wrcnt > cnt) ? cnt : wrcnt;
378 buf[0] = EPCS_WRITE_BYTES;
386 epcs_rsnd ((unsigned char *)addr, wrcnt);
389 /* Wait for write to complete */
390 while (epcs_status_rd() & EPCS_STATUS_WIP)
401 int epcs_verify (ulong addr, ulong off, ulong cnt, ulong *err)
404 unsigned char buf[256];
405 unsigned char *start,*end;
408 start = end = (unsigned char *)addr;
410 rdcnt = (cnt>sizeof(buf)) ? sizeof(buf) : cnt;
411 epcs_read ((ulong)buf, off, rdcnt);
412 for (i=0; i<rdcnt; i++) {
413 if (*end != buf[i]) {
425 static int epcs_sect_erased (int sect, unsigned *offset,
426 struct epcs_devinfo_t *dev)
428 unsigned char buf[128];
433 sectsz = (1 << dev->sz_sect);
438 epcs_read ((ulong)buf, off, sizeof(buf));
439 for (i=0; i < sizeof(buf); i++) {
440 if (buf[i] != 0xff) {
451 /***********************************************************************
453 ***********************************************************************/
455 void do_epcs_info (struct epcs_devinfo_t *dev, int argc, char *argv[])
462 /* Basic device info */
463 printf ("%s: %d kbytes (%d sectors x %d kbytes,"
465 dev->name, 1 << (dev->size-10),
466 dev->num_sects, 1 << (dev->sz_sect-10),
469 /* Status -- for now protection is all-or-nothing */
470 stat = epcs_status_rd();
471 printf ("status: 0x%02x (WIP:%d, WEL:%d, PROT:%s)\n",
473 (stat & EPCS_STATUS_WIP) ? 1 : 0,
474 (stat & EPCS_STATUS_WEL) ? 1 : 0,
475 (stat & dev->prot_mask) ? "on" : "off" );
480 printf ("config: 0x%06x (%d) bytes\n", tmp, tmp );
482 printf ("config: unknown\n" );
486 for (i=0; i<dev->num_sects; i++) {
487 erased = epcs_sect_erased (i, &tmp, dev);
488 printf (" %d: %06x ",
489 i, i*(1<<dev->sz_sect) );
493 printf ("data @ 0x%06x\n", tmp);
500 void do_epcs_erase (struct epcs_devinfo_t *dev, int argc, char *argv[])
504 if ((argc < 3) || (argc > 4)) {
505 printf ("USAGE: epcs erase sect [end]\n");
508 if ((epcs_status_rd() & dev->prot_mask) != 0) {
509 printf ( "epcs: device protected.\n");
513 start = simple_strtoul (argv[2], NULL, 10);
515 end = simple_strtoul (argv[3], NULL, 10);
518 if ((start >= dev->num_sects) || (start > end)) {
519 printf ("epcs: invalid sector range: [%d:%d]\n",
524 epcs_erase (start, end);
530 void do_epcs_protect (struct epcs_devinfo_t *dev, int argc, char *argv[])
534 /* For now protection is all-or-nothing to keep things
535 * simple. The protection bits don't map in a linear
536 * fashion ... and we would rather protect the bottom
537 * of the device since it contains the config data and
538 * leave the top unprotected for app use. But unfortunately
539 * protection works from top-to-bottom so it does
540 * really help very much from a software app point-of-view.
543 printf ("USAGE: epcs protect on | off\n");
549 /* Protection on/off is just a matter of setting/clearing
550 * all protection bits in the status register.
552 stat = epcs_status_rd ();
553 if (strcmp ("on", argv[2]) == 0) {
554 stat |= dev->prot_mask;
555 } else if (strcmp ("off", argv[2]) == 0 ) {
556 stat &= ~dev->prot_mask;
558 printf ("epcs: unknown protection: %s\n", argv[2]);
561 epcs_status_wr (stat);
566 void do_epcs_read (struct epcs_devinfo_t *dev, int argc, char *argv[])
572 printf ("USAGE: epcs read addr offset count\n");
577 addr = simple_strtoul (argv[2], NULL, 16);
578 off = simple_strtoul (argv[3], NULL, 16);
579 cnt = simple_strtoul (argv[4], NULL, 16);
581 printf ("offset is greater than device size"
585 if ((off + cnt) > sz) {
586 printf ("request exceeds device size"
587 "... truncating.\n");
590 printf ("epcs: read %08lx <- %06lx (0x%lx bytes)\n",
592 epcs_read (addr, off, cnt);
598 void do_epcs_write (struct epcs_devinfo_t *dev, int argc, char *argv[])
605 printf ("USAGE: epcs write addr offset count\n");
608 if ((epcs_status_rd() & dev->prot_mask) != 0) {
609 printf ( "epcs: device protected.\n");
614 addr = simple_strtoul (argv[2], NULL, 16);
615 off = simple_strtoul (argv[3], NULL, 16);
616 cnt = simple_strtoul (argv[4], NULL, 16);
618 printf ("offset is greater than device size"
622 if ((off + cnt) > sz) {
623 printf ("request exceeds device size"
624 "... truncating.\n");
627 printf ("epcs: write %08lx -> %06lx (0x%lx bytes)\n",
629 epcs_write (addr, off, cnt);
630 if (epcs_verify (addr, off, cnt, &err) != 0)
631 printf ("epcs: write error at offset %06lx\n", err);
637 void do_epcs_verify (struct epcs_devinfo_t *dev, int argc, char *argv[])
644 printf ("USAGE: epcs verify addr offset count\n");
649 addr = simple_strtoul (argv[2], NULL, 16);
650 off = simple_strtoul (argv[3], NULL, 16);
651 cnt = simple_strtoul (argv[4], NULL, 16);
653 printf ("offset is greater than device size"
657 if ((off + cnt) > sz) {
658 printf ("request exceeds device size"
659 "... truncating.\n");
662 printf ("epcs: verify %08lx -> %06lx (0x%lx bytes)\n",
664 if (epcs_verify (addr, off, cnt, &err) != 0)
665 printf ("epcs: verify error at offset %06lx\n", err);
670 /*-----------------------------------------------------------------------*/
671 int do_epcs (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
674 struct epcs_devinfo_t *dev = epcs_dev_find ();
677 printf ("epcs: device not found.\n");
682 do_epcs_info (dev, argc, argv);
686 len = strlen (argv[1]);
687 if (strncmp ("info", argv[1], len) == 0) {
688 do_epcs_info (dev, argc, argv);
689 } else if (strncmp ("erase", argv[1], len) == 0) {
690 do_epcs_erase (dev, argc, argv);
691 } else if (strncmp ("protect", argv[1], len) == 0) {
692 do_epcs_protect (dev, argc, argv);
693 } else if (strncmp ("read", argv[1], len) == 0) {
694 do_epcs_read (dev, argc, argv);
695 } else if (strncmp ("write", argv[1], len) == 0) {
696 do_epcs_write (dev, argc, argv);
697 } else if (strncmp ("verify", argv[1], len) == 0) {
698 do_epcs_verify (dev, argc, argv);
700 printf ("epcs: unknown operation: %s\n", argv[1]);
706 /*-----------------------------------------------------------------------*/
709 U_BOOT_CMD( epcs, 5, 0, do_epcs, SHORT_HELP, LONG_HELP );
711 #endif /* CONFIG_NIOS_EPCS */