Merge branch 'master' of rsync://rsync.denx.de/git/u-boot
[platform/kernel/u-boot.git] / cpu / mpc85xx / speed.c
1 /*
2  * Copyright 2004 Freescale Semiconductor.
3  * (C) Copyright 2003 Motorola Inc.
4  * Xianghua Xiao, (X.Xiao@motorola.com)
5  *
6  * (C) Copyright 2000
7  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
8  *
9  * See file CREDITS for list of people who contributed to this
10  * project.
11  *
12  * This program is free software; you can redistribute it and/or
13  * modify it under the terms of the GNU General Public License as
14  * published by the Free Software Foundation; either version 2 of
15  * the License, or (at your option) any later version.
16  *
17  * This program is distributed in the hope that it will be useful,
18  * but WITHOUT ANY WARRANTY; without even the implied warranty of
19  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
20  * GNU General Public License for more details.
21  *
22  * You should have received a copy of the GNU General Public License
23  * along with this program; if not, write to the Free Software
24  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25  * MA 02111-1307 USA
26  */
27
28 #include <common.h>
29 #include <ppc_asm.tmpl>
30 #include <asm/processor.h>
31
32 DECLARE_GLOBAL_DATA_PTR;
33
34 /* --------------------------------------------------------------- */
35
36 void get_sys_info (sys_info_t * sysInfo)
37 {
38         volatile immap_t    *immap = (immap_t *)CFG_IMMR;
39         volatile ccsr_gur_t *gur = &immap->im_gur;
40         uint plat_ratio,e500_ratio;
41
42         plat_ratio = (gur->porpllsr) & 0x0000003e;
43         plat_ratio >>= 1;
44         switch(plat_ratio) {
45         case 0x02:
46         case 0x03:
47         case 0x04:
48         case 0x05:
49         case 0x06:
50         case 0x08:
51         case 0x09:
52         case 0x0a:
53         case 0x0c:
54         case 0x10:
55                 sysInfo->freqSystemBus = plat_ratio * CONFIG_SYS_CLK_FREQ;
56                 break;
57         default:
58                 sysInfo->freqSystemBus = 0;
59                 break;
60         }
61
62         e500_ratio = (gur->porpllsr) & 0x003f0000;
63         e500_ratio >>= 16;
64         switch(e500_ratio) {
65         case 0x04:
66                 sysInfo->freqProcessor = 2*sysInfo->freqSystemBus;
67                 break;
68         case 0x05:
69                 sysInfo->freqProcessor = 5*sysInfo->freqSystemBus/2;
70                 break;
71         case 0x06:
72                 sysInfo->freqProcessor = 3*sysInfo->freqSystemBus;
73                 break;
74         case 0x07:
75                 sysInfo->freqProcessor = 7*sysInfo->freqSystemBus/2;
76                 break;
77         default:
78                 sysInfo->freqProcessor = 0;
79                 break;
80         }
81 }
82
83 int get_clocks (void)
84 {
85         sys_info_t sys_info;
86 #if defined(CONFIG_CPM2)
87         volatile immap_t *immap = (immap_t *) CFG_IMMR;
88         uint sccr, dfbrg;
89
90         /* set VCO = 4 * BRG */
91         immap->im_cpm.im_cpm_intctl.sccr &= 0xfffffffc;
92         sccr = immap->im_cpm.im_cpm_intctl.sccr;
93         dfbrg = (sccr & SCCR_DFBRG_MSK) >> SCCR_DFBRG_SHIFT;
94 #endif
95         get_sys_info (&sys_info);
96         gd->cpu_clk = sys_info.freqProcessor;
97         gd->bus_clk = sys_info.freqSystemBus;
98 #if defined(CONFIG_CPM2)
99         gd->vco_out = 2*sys_info.freqSystemBus;
100         gd->cpm_clk = gd->vco_out / 2;
101         gd->scc_clk = gd->vco_out / 4;
102         gd->brg_clk = gd->vco_out / (1 << (2 * (dfbrg + 1)));
103 #endif
104
105         if(gd->cpu_clk != 0) return (0);
106         else return (1);
107 }
108
109
110 /********************************************
111  * get_bus_freq
112  * return system bus freq in Hz
113  *********************************************/
114 ulong get_bus_freq (ulong dummy)
115 {
116         ulong val;
117
118         sys_info_t sys_info;
119
120         get_sys_info (&sys_info);
121         val = sys_info.freqSystemBus;
122
123         return val;
124 }